Commit d9ec4641 authored by Sylvain Lesne's avatar Sylvain Lesne Committed by Vinod Koul

dmaengine: altera: fix response FIFO emptying

Commit 6084fc2e ("dmaengine: altera: Use macros instead of structs
to describe the registers") introduced a minus sign before a register
offset.

This leads to soft-locks of the DMA controller, since reading the last
status byte is required to pop the response from the FIFO. Failing to
do so will lead to a full FIFO, which means that the DMA controller
will stop processing descriptors.
Signed-off-by: default avatarSylvain Lesne <lesne@alse-fr.com>
Reviewed-by: default avatarStefan Roese <sr@denx.de>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent 2ccb4837
......@@ -698,7 +698,7 @@ static void msgdma_tasklet(unsigned long data)
* bits. So we need to just drop these values.
*/
size = ioread32(mdev->resp + MSGDMA_RESP_BYTES_TRANSFERRED);
status = ioread32(mdev->resp - MSGDMA_RESP_STATUS);
status = ioread32(mdev->resp + MSGDMA_RESP_STATUS);
msgdma_complete_descriptor(mdev);
msgdma_chan_desc_cleanup(mdev);
......
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