Commit da8892d4 authored by Lars-Peter Clausen's avatar Lars-Peter Clausen Committed by Mauro Carvalho Chehab

[media] adv7604: Initialize drive strength to default when using DT

The adv7604 driver platform data contains fields for configuring the drive
strength of the output pins. When probing the driver through DT these
fields are not explicitly initialized, which means they are left at 0. This
is a reserved setting for the drive strength configuration though and can
cause signal integrity issues.

Whether these signal integrity issues are visible depends on the PCB
specifics (e.g. the higher the load capacitance for the output the more
visible the issue). But it has been observed on existing solutions at high
pixel clock rates.

Initialize the drive strength settings to the power-on-reset value of the
device when probing through devicetree to avoid this issue.

Fixes: 0e158be0162b ("adv7604: Add DT support")
Signed-off-by: default avatarLars-Peter Clausen <lars@metafoo.de>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@s-opensource.com>
parent 32dd9e87
...@@ -3133,6 +3133,9 @@ static int adv76xx_parse_dt(struct adv76xx_state *state) ...@@ -3133,6 +3133,9 @@ static int adv76xx_parse_dt(struct adv76xx_state *state)
state->pdata.blank_data = 1; state->pdata.blank_data = 1;
state->pdata.op_format_mode_sel = ADV7604_OP_FORMAT_MODE0; state->pdata.op_format_mode_sel = ADV7604_OP_FORMAT_MODE0;
state->pdata.bus_order = ADV7604_BUS_ORDER_RGB; state->pdata.bus_order = ADV7604_BUS_ORDER_RGB;
state->pdata.dr_str_data = ADV76XX_DR_STR_MEDIUM_HIGH;
state->pdata.dr_str_clk = ADV76XX_DR_STR_MEDIUM_HIGH;
state->pdata.dr_str_sync = ADV76XX_DR_STR_MEDIUM_HIGH;
return 0; return 0;
} }
......
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