Commit dc4e96ce authored by Steve Wise's avatar Steve Wise Committed by Roland Dreier

RDMA/cxgb3: Don't exceed the max HW CQ depth

The max depth supported by T3 is 64K entries.  This fixes a bug
introduced in commit 9918b28d ("RDMA/cxgb3: Increase the max CQ
depth") that causes stalls and possibly crashes in large MPI clusters.
Signed-off-by: default avatarSteve Wise <swise@opengridcomputing.com>
Cc: <stable@kernel.org>
Signed-off-by: default avatarRoland Dreier <rolandd@cisco.com>
parent 320b2b8d
......@@ -53,7 +53,7 @@
#define T3_MAX_PBL_SIZE 256
#define T3_MAX_RQ_SIZE 1024
#define T3_MAX_QP_DEPTH (T3_MAX_RQ_SIZE-1)
#define T3_MAX_CQ_DEPTH 262144
#define T3_MAX_CQ_DEPTH 65536
#define T3_MAX_NUM_STAG (1<<15)
#define T3_MAX_MR_SIZE 0x100000000ULL
#define T3_PAGESIZE_MASK 0xffff000 /* 4KB-128MB */
......
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