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Commit dcf397f0 authored by Linus Torvalds's avatar Linus Torvalds
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Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6 

* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (124 commits)
  sh: allow building for both r2d boards in same binary.
  sh: fix r2d board detection
  sh: Discard .exit.text/.exit.data at runtime.
  sh: Fix up some section alignments in linker script.
  sh: Fix SH-4 DMAC CHCR masking.
  sh: Rip out left-over nommu cond syscall cruft.
  sh: Make kgdb i-cache flushing less inept.
  sh: kgdb section mismatches and tidying.
  sh: cleanup struct irqaction initializers.
  sh: early_printk tidying.
  video: pvr2fb: Add TV (RGB) support to Dreamcast PVR driver.
  sh: Conditionalize gUSA support.
  sh: Follow gUSA preempt changes in __switch_to().
  sh: Tidy up gUSA preempt handling.
  sh: __copy_user() optimizations for small copies.
  sh: clkfwk: Support multi-level clock propagation.
  sh: Fix URAM start address on SH7785.
  sh: Use boot_cpu_data for CPU probe.
  sh: Support extended mode TLB on SH-X3.
  sh: Bump MAX_ACTIVE_REGIONS for SH7785.
  ...
parents 6faf035c 68ee0f9c
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Showing with 8759 additions and 3339 deletions
arch/sh/Kconfig
View file @ dcf397f0
......@@ -118,7 +118,7 @@ endchoice
config SH_FPU
bool "FPU support"
depends on CPU_SH4
depends on CPU_HAS_FPU
default y
help
Selecting this option will enable support for SH processors that
......@@ -178,12 +178,6 @@ config CPU_HAS_INTEVT
config CPU_HAS_MASKREG_IRQ
bool
config CPU_HAS_INTC_IRQ
bool
config CPU_HAS_INTC2_IRQ
bool
config CPU_HAS_IPR_IRQ
bool
......@@ -205,6 +199,9 @@ config CPU_HAS_PTEA
config CPU_HAS_DSP
bool
config CPU_HAS_FPU
bool
endmenu
menu "Board support"
......@@ -258,7 +255,6 @@ config SH_7780_SOLUTION_ENGINE
bool "SolutionEngine7780"
select SOLUTION_ENGINE
select SYS_SUPPORTS_PCI
select CPU_HAS_INTC2_IRQ
depends on CPU_SUBTYPE_SH7780
help
Select 7780 SolutionEngine if configuring for a Renesas SH7780
......@@ -309,7 +305,7 @@ config SH_MPC1211
config SH_SH03
bool "Interface CTP/PCI-SH03"
depends on CPU_SUBTYPE_SH7751 && BROKEN
depends on CPU_SUBTYPE_SH7751
select CPU_HAS_IPR_IRQ
select SYS_SUPPORTS_PCI
help
......@@ -395,11 +391,22 @@ config SH_LBOX_RE2
help
Select L-BOX RE2 if configuring for the NTT COMWARE L-BOX RE2.
config SH_X3PROTO
bool "SH-X3 Prototype board"
depends on CPU_SUBTYPE_SHX3
config SH_MAGIC_PANEL_R2
bool "Magic Panel R2"
depends on CPU_SUBTYPE_SH7720
help
Select Magic Panel R2 if configuring for Magic Panel R2.
endmenu
source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
source "arch/sh/boards/renesas/r7780rp/Kconfig"
source "arch/sh/boards/magicpanelr2/Kconfig"
menu "Timer and clock configuration"
......@@ -563,10 +570,19 @@ config NR_CPUS
source "kernel/Kconfig.preempt"
config NODES_SHIFT
int
default "1"
depends on NEED_MULTIPLE_NODES
config GUSA
def_bool y
depends on !SMP
help
This enables support for gUSA (general UserSpace Atomicity).
This is the default implementation for both UP and non-ll/sc
CPUs, and is used by the libc, amongst others.
For additional information, design information can be found
in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
This should only be disabled for special cases where alternate
atomicity implementations exist.
endmenu
......@@ -659,6 +675,17 @@ config SUPERHYWAY
tristate "SuperHyway Bus support"
depends on CPU_SUBTYPE_SH4_202
config MAPLE
bool "Maple Bus support"
depends on SH_DREAMCAST
help
The Maple Bus is SEGA's serial communication bus for peripherals
on the Dreamcast. Without this bus support you won't be able to
get your Dreamcast keyboard etc to work, so most users
probably want to say 'Y' here, unless you are only using the
Dreamcast with a serial line terminal or a remote network
connection.
config CF_ENABLER
bool "Compact Flash Enabler support"
depends on SOLUTION_ENGINE || SH_SH03
......
arch/sh/Kconfig.debug
View file @ dcf397f0
......@@ -28,13 +28,17 @@ config EARLY_SCIF_CONSOLE
serial I/O.
config EARLY_SCIF_CONSOLE_PORT
hex "SCIF port for early console"
hex
depends on EARLY_SCIF_CONSOLE
default "0xffe00000" if CPU_SUBTYPE_SH7780
default "0xffea0000" if CPU_SUBTYPE_SH7785
default "0xfffe9800" if CPU_SUBTYPE_SH7206
default "0xf8420000" if CPU_SUBTYPE_SH7619
default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705
default "0xa4430000" if CPU_SUBTYPE_SH7720
default "0xffc30000" if CPU_SUBTYPE_SHX3
default "0xffe80000" if CPU_SH4
default "0x00000000"
config EARLY_PRINTK
bool "Early printk support"
......
arch/sh/Makefile
View file @ dcf397f0
......@@ -118,6 +118,7 @@ machdir-$(CONFIG_SH_7751_SYSTEMH) += renesas/systemh
machdir-$(CONFIG_SH_EDOSK7705) += renesas/edosk7705
machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp
machdir-$(CONFIG_SH_7710VOIPGW) += renesas/sh7710voipgw
machdir-$(CONFIG_SH_X3PROTO) += renesas/x3proto
machdir-$(CONFIG_SH_SH4202_MICRODEV) += superh/microdev
machdir-$(CONFIG_SH_LANDISK) += landisk
machdir-$(CONFIG_SH_TITAN) += titan
......@@ -125,6 +126,7 @@ machdir-$(CONFIG_SH_SHMIN) += shmin
machdir-$(CONFIG_SH_7206_SOLUTION_ENGINE) += se/7206
machdir-$(CONFIG_SH_7619_SOLUTION_ENGINE) += se/7619
machdir-$(CONFIG_SH_LBOX_RE2) += lboxre2
machdir-$(CONFIG_SH_MAGIC_PANEL_R2) += magicpanelr2
incdir-y := $(notdir $(machdir-y))
......@@ -135,7 +137,7 @@ endif
# Companion chips
core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/
core-$(CONFIG_VOYAGERGX) += arch/sh/cchips/voyagergx/
core-$(CONFIG_MFD_SM501) += arch/sh/cchips/voyagergx/
cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2
cpuincdir-$(CONFIG_CPU_SH2A) := cpu-sh2a
......
arch/sh/boards/hp6xx/hp6xx_apm.c
View file @ dcf397f0
......@@ -20,9 +20,9 @@
#define APM_CRITICAL 10
#define APM_LOW 30
#define HP680_BATTERY_MAX 875
#define HP680_BATTERY_MIN 600
#define HP680_BATTERY_AC_ON 900
#define HP680_BATTERY_MAX 898
#define HP680_BATTERY_MIN 486
#define HP680_BATTERY_AC_ON 1023
#define MODNAME "hp6x0_apm"
......@@ -65,7 +65,7 @@ static void hp6x0_apm_get_power_status(struct apm_power_info *info)
static irqreturn_t hp6x0_apm_interrupt(int irq, void *dev)
{
if (!apm_suspended)
if (!APM_DISABLED)
apm_queue_event(APM_USER_SUSPEND);
return IRQ_HANDLED;
......@@ -91,7 +91,6 @@ static int __init hp6x0_apm_init(void)
static void __exit hp6x0_apm_exit(void)
{
free_irq(HP680_BTN_IRQ, 0);
apm_get_info = NULL;
}
module_init(hp6x0_apm_init);
......
arch/sh/boards/hp6xx/setup.c
View file @ dcf397f0
......@@ -7,7 +7,7 @@
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* Setup code for an HP680 (internal peripherials only)
* Setup code for HP620/HP660/HP680/HP690 (internal peripherials only)
*/
#include <linux/types.h>
#include <linux/init.h>
......@@ -19,7 +19,7 @@
#include <asm/cpu/dac.h>
#define SCPCR 0xa4000116
#define SCPDR 0xa4000136
#define SCPDR 0xa4000136
/* CF Slot */
static struct resource cf_ide_resources[] = {
......@@ -34,7 +34,7 @@ static struct resource cf_ide_resources[] = {
.flags = IORESOURCE_MEM,
},
[2] = {
.start = 93,
.start = 77,
.flags = IORESOURCE_IRQ,
},
};
......@@ -46,10 +46,22 @@ static struct platform_device cf_ide_device = {
.resource = cf_ide_resources,
};
static struct platform_device jornadakbd_device = {
.name = "jornada680_kbd",
.id = -1,
};
static struct platform_device *hp6xx_devices[] __initdata = {
&cf_ide_device,
&cf_ide_device,
&jornadakbd_device,
};
static void __init hp6xx_init_irq(void)
{
/* Gets touchscreen and powerbutton IRQ working */
plat_irq_setup_pins(IRQ_MODE_IRQ);
}
static int __init hp6xx_devices_setup(void)
{
return platform_add_devices(hp6xx_devices, ARRAY_SIZE(hp6xx_devices));
......@@ -61,11 +73,11 @@ static void __init hp6xx_setup(char **cmdline_p)
u16 v;
v = inw(HD64461_STBCR);
v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST |
HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST |
HD64461_STBCR_SAFEST | HD64461_STBCR_SPC0ST |
HD64461_STBCR_SMIAST | HD64461_STBCR_SAFECKE_OST |
HD64461_STBCR_SAFECKE_IST;
v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST |
HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST |
HD64461_STBCR_SAFEST | HD64461_STBCR_SPC0ST |
HD64461_STBCR_SMIAST | HD64461_STBCR_SAFECKE_OST|
HD64461_STBCR_SAFECKE_IST;
#ifndef CONFIG_HD64461_ENABLER
v |= HD64461_STBCR_SPC1ST;
#endif
......@@ -101,6 +113,9 @@ device_initcall(hp6xx_devices_setup);
static struct sh_machine_vector mv_hp6xx __initmv = {
.mv_name = "hp6xx",
.mv_setup = hp6xx_setup,
.mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM,
/* IRQ's : CPU(64) + CCHIP(16) + FREE_TO_USE(6) */
.mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM + 6,
.mv_irq_demux = hd64461_irq_demux,
/* Enable IRQ0 -> IRQ3 in IRQ_MODE */
.mv_init_irq = hp6xx_init_irq,
};
arch/sh/boards/magicpanelr2/Kconfig 0 → 100644
View file @ dcf397f0
if SH_MAGIC_PANEL_R2
menu "Magic Panel R2 options"
config SH_MAGIC_PANEL_R2_VERSION
int SH_MAGIC_PANEL_R2_VERSION
default "3"
help
Set the version of the Magic Panel R2
endmenu
endif
arch/sh/boards/magicpanelr2/Makefile 0 → 100644
View file @ dcf397f0
#
# Makefile for the Magic Panel specific parts
#
obj-y := setup.o
\ No newline at end of file
arch/sh/boards/magicpanelr2/setup.c 0 → 100644
View file @ dcf397f0
This diff is collapsed.
arch/sh/boards/mpc1211/setup.c
View file @ dcf397f0
......@@ -285,7 +285,7 @@ static int put_smb_blk(unsigned char *p, int address, int command, int no)
static struct resource heartbeat_resources[] = {
[0] = {
.start = 0xa2000000,
.end = 0xa2000000 + 8 - 1,
.end = 0xa2000000,
.flags = IORESOURCE_MEM,
},
};
......
arch/sh/boards/renesas/r7780rp/Makefile
View file @ dcf397f0
#
# Makefile for the R7780RP-1 specific parts of the kernel
#
irqinit-y := irq-r7780rp.o
irqinit-$(CONFIG_SH_R7780MP) := irq-r7780mp.o
irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o
obj-y := setup.o irq.o $(irqinit-y)
irqinit-$(CONFIG_SH_R7780RP) := irq-r7780rp.o irq.o
obj-y := setup.o $(irqinit-y)
ifneq ($(CONFIG_SH_R7785RP),y)
obj-$(CONFIG_PUSH_SWITCH) += psw.o
......
arch/sh/boards/renesas/r7780rp/irq-r7780mp.c 0 → 100644
View file @ dcf397f0
/*
* Renesas Solutions Highlander R7780MP Support.
*
* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
* Copyright (C) 2006 Paul Mundt
* Copyright (C) 2007 Magnus Damm
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/r7780rp.h>
enum {
UNUSED = 0,
/* board specific interrupt sources */
AX88796, /* Ethernet controller */
CF, /* Compact Flash */
PSW, /* Push Switch */
EXT1, /* EXT1n IRQ */
EXT4, /* EXT4n IRQ */
};
static struct intc_vect vectors[] __initdata = {
INTC_IRQ(CF, IRQ_CF),
INTC_IRQ(PSW, IRQ_PSW),
INTC_IRQ(AX88796, IRQ_AX88796),
INTC_IRQ(EXT1, IRQ_EXT1),
INTC_IRQ(EXT4, IRQ_EXT4),
};
static struct intc_mask_reg mask_registers[] __initdata = {
{ 0xa4000000, 0, 16, /* IRLMSK */
{ 0, 0, 0, 0, CF, 0, 0, 0,
0, 0, 0, EXT4, 0, EXT1, PSW, AX88796 } },
};
static unsigned char irl2irq[HL_NR_IRL] __initdata = {
0, IRQ_CF, 0, 0,
0, 0, 0, 0,
0, IRQ_EXT4, 0, IRQ_EXT1,
0, IRQ_AX88796, IRQ_PSW,
};
static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
NULL, NULL, mask_registers, NULL, NULL);
unsigned char * __init highlander_init_irq_r7780mp(void)
{
if ((ctrl_inw(0xa4000700) & 0xf000) == 0x2000) {
printk(KERN_INFO "Using r7780mp interrupt controller.\n");
register_intc_controller(&intc_desc);
return irl2irq;
}
return NULL;
}
arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
View file @ dcf397f0
......@@ -9,13 +9,15 @@
* for more details.
*/
#include <linux/init.h>
#include <asm/io.h>
#include <linux/io.h>
#include <asm/r7780rp.h>
void __init highlander_init_irq(void)
unsigned char * __init highlander_init_irq_r7780rp(void)
{
int i;
for (i = 0; i < 15; i++)
make_r7780rp_irq(i);
return NULL;
}
arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
View file @ dcf397f0
/*
* Renesas Solutions Highlander R7780RP-1 Support.
* Renesas Solutions Highlander R7785RP Support.
*
* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
* Copyright (C) 2006 Paul Mundt
* Copyright (C) 2007 Magnus Damm
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <asm/io.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/r7780rp.h>
void __init highlander_init_irq(void)
enum {
UNUSED = 0,
/* board specific interrupt sources */
AX88796, /* Ethernet controller */
CF, /* Compact Flash */
};
static struct intc_vect vectors[] __initdata = {
INTC_IRQ(CF, IRQ_CF),
INTC_IRQ(AX88796, IRQ_AX88796),
};
static struct intc_mask_reg mask_registers[] __initdata = {
{ 0xa4000010, 0, 16, /* IRLMCR1 */
{ 0, 0, 0, 0, CF, AX88796, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 } },
};
static unsigned char irl2irq[HL_NR_IRL] __initdata = {
0, IRQ_CF, 0, 0,
0, 0, 0, 0,
0, 0, IRQ_AX88796, 0,
0, 0, 0,
};
static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
NULL, NULL, mask_registers, NULL, NULL);
unsigned char * __init highlander_init_irq_r7785rp(void)
{
if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000)
return NULL;
printk(KERN_INFO "Using r7785rp interrupt controller.\n");
ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */
/* Setup the FPGA IRL */
......@@ -24,6 +60,6 @@ void __init highlander_init_irq(void)
ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */
ctrl_outw(0x0000, PA_IRLPRF); /* FPGA IRLF */
make_r7780rp_irq(1); /* CF card */
make_r7780rp_irq(10); /* On-board ethernet */
register_intc_controller(&intc_desc);
return irl2irq;
}
arch/sh/boards/renesas/r7780rp/setup.c
View file @ dcf397f0
......@@ -19,6 +19,7 @@
#include <asm/machvec.h>
#include <asm/r7780rp.h>
#include <asm/clock.h>
#include <asm/heartbeat.h>
#include <asm/io.h>
static struct resource r8a66597_usb_host_resources[] = {
......@@ -30,8 +31,8 @@ static struct resource r8a66597_usb_host_resources[] = {
},
[1] = {
.name = "r8a66597_hcd",
.start = 11, /* irq number */
.end = 11,
.start = IRQ_EXT1, /* irq number */
.end = IRQ_EXT1,
.flags = IORESOURCE_IRQ,
},
};
......@@ -56,8 +57,8 @@ static struct resource m66592_usb_peripheral_resources[] = {
},
[1] = {
.name = "m66592_udc",
.start = 9, /* irq number */
.end = 9,
.start = IRQ_EXT4, /* irq number */
.end = IRQ_EXT4,
.flags = IORESOURCE_IRQ,
},
};
......@@ -85,11 +86,7 @@ static struct resource cf_ide_resources[] = {
.flags = IORESOURCE_MEM,
},
[2] = {
#ifdef CONFIG_SH_R7780RP
.start = 4,
#else
.start = 1,
#endif
.start = IRQ_CF,
.flags = IORESOURCE_IRQ,
},
};
......@@ -108,16 +105,23 @@ static struct platform_device cf_ide_device = {
},
};
static unsigned char heartbeat_bit_pos[] = { 2, 1, 0, 3, 6, 5, 4, 7 };
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_OBLED,
.end = PA_OBLED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.end = PA_OBLED,
.flags = IORESOURCE_MEM,
},
};
#ifndef CONFIG_SH_R7785RP
static unsigned char heartbeat_bit_pos[] = { 2, 1, 0, 3, 6, 5, 4, 7 };
static struct heartbeat_data heartbeat_data = {
.bit_pos = heartbeat_bit_pos,
.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
};
#endif
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
......@@ -125,7 +129,7 @@ static struct platform_device heartbeat_device = {
/* R7785RP has a slightly more sensible FPGA.. */
#ifndef CONFIG_SH_R7785RP
.dev = {
.platform_data = heartbeat_bit_pos,
.platform_data = &heartbeat_data,
},
#endif
.num_resources = ARRAY_SIZE(heartbeat_resources),
......@@ -217,12 +221,50 @@ static void __init highlander_setup(char **cmdline_p)
pm_power_off = r7780rp_power_off;
}
static unsigned char irl2irq[HL_NR_IRL];
int highlander_irq_demux(int irq)
{
if (irq >= HL_NR_IRL || !irl2irq[irq])
return irq;
return irl2irq[irq];
}
void __init highlander_init_irq(void)
{
unsigned char *ucp = NULL;
do {
#ifdef CONFIG_SH_R7780MP
ucp = highlander_init_irq_r7780mp();
if (ucp)
break;
#endif
#ifdef CONFIG_SH_R7785RP
ucp = highlander_init_irq_r7785rp();
if (ucp)
break;
#endif
#ifdef CONFIG_SH_R7780RP
highlander_init_irq_r7780rp();
ucp = irl2irq;
break;
#endif
} while (0);
if (ucp) {
plat_irq_setup_pins(IRQ_MODE_IRL3210);
memcpy(irl2irq, ucp, HL_NR_IRL);
}
}
/*
* The Machine Vector
*/
static struct sh_machine_vector mv_highlander __initmv = {
.mv_name = "Highlander",
.mv_nr_irqs = 109,
.mv_setup = highlander_setup,
.mv_init_irq = highlander_init_irq,
.mv_irq_demux = highlander_irq_demux,
};
arch/sh/boards/renesas/rts7751r2d/Kconfig
View file @ dcf397f0
if SH_RTS7751R2D
menu "RTS7751R2D options"
menu "RTS7751R2D Board Revision"
config RTS7751R2D_REV11
bool "RTS7751R2D Rev. 1.1 board support"
config RTS7751R2D_PLUS
bool "R2D-PLUS"
help
Selecting this option will support version rev. 1.1.
Selecting this option will configure the kernel for R2D-PLUS.
R2D-PLUS is the smaller of the two R2D board versions, equipped
with a single PCI slot.
config RTS7751R2D_1
bool "R2D-1"
help
Selecting this option will configure the kernel for R2D-1.
R2D-1 is the larger of the two R2D board versions, equipped
with two PCI slots.
endmenu
endif
......
arch/sh/boards/renesas/rts7751r2d/irq.c
View file @ dcf397f0
/*
* linux/arch/sh/boards/renesas/rts7751r2d/irq.c
*
* Copyright (C) 2007 Magnus Damm
* Copyright (C) 2000 Kazumoto Kojima
*
* Renesas Technology Sales RTS7751R2D Support.
* Renesas Technology Sales RTS7751R2D Support, R2D-PLUS and R2D-1.
*
* Modified for RTS7751R2D by
* Atom Create Engineering Co., Ltd. 2002.
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/voyagergx.h>
#include <asm/rts7751r2d.h>
#if defined(CONFIG_RTS7751R2D_REV11)
static int mask_pos[] = {11, 9, 8, 12, 10, 6, 5, 4, 7, 14, 13, 0, 0, 0, 0};
#else
static int mask_pos[] = {6, 11, 9, 8, 12, 10, 5, 4, 7, 14, 13, 0, 0, 0, 0};
#endif
#define R2D_NR_IRL 13
extern int voyagergx_irq_demux(int irq);
extern void setup_voyagergx_irq(void);
enum {
UNUSED = 0,
static void enable_rts7751r2d_irq(unsigned int irq)
{
/* Set priority in IPR back to original value */
ctrl_outw(ctrl_inw(IRLCNTR1) | (1 << mask_pos[irq]), IRLCNTR1);
}
/* board specific interrupt sources (R2D-1 and R2D-PLUS) */
EXT, /* EXT_INT0-3 */
RTC_T, RTC_A, /* Real Time Clock */
AX88796, /* Ethernet controller (R2D-1 board) */
KEY, /* Key input (R2D-PLUS board) */
SDCARD, /* SD Card */
CF_CD, CF_IDE, /* CF Card Detect + CF IDE */
SM501, /* SM501 aka Voyager */
PCI_INTD_RTL8139, /* Ethernet controller */
PCI_INTC_PCI1520, /* Cardbus/PCMCIA bridge */
PCI_INTB_RTL8139, /* Ethernet controller with HUB (R2D-PLUS board) */
PCI_INTB_SLOT, /* PCI Slot 3.3v (R2D-1 board) */
PCI_INTA_SLOT, /* PCI Slot 3.3v */
TP, /* Touch Panel */
};
static void disable_rts7751r2d_irq(unsigned int irq)
{
/* Set the priority in IPR to 0 */
ctrl_outw(ctrl_inw(IRLCNTR1) & (0xffff ^ (1 << mask_pos[irq])),
IRLCNTR1);
}
#ifdef CONFIG_RTS7751R2D_1
/* Vectors for R2D-1 */
static struct intc_vect vectors_r2d_1[] __initdata = {
INTC_IRQ(EXT, IRQ_EXT),
INTC_IRQ(RTC_T, IRQ_RTC_T), INTC_IRQ(RTC_A, IRQ_RTC_A),
INTC_IRQ(AX88796, IRQ_AX88796), INTC_IRQ(SDCARD, IRQ_SDCARD),
INTC_IRQ(CF_CD, IRQ_CF_CD), INTC_IRQ(CF_IDE, IRQ_CF_IDE), /* ng */
INTC_IRQ(SM501, IRQ_VOYAGER),
INTC_IRQ(PCI_INTD_RTL8139, IRQ_PCI_INTD),
INTC_IRQ(PCI_INTC_PCI1520, IRQ_PCI_INTC),
INTC_IRQ(PCI_INTB_SLOT, IRQ_PCI_INTB),
INTC_IRQ(PCI_INTA_SLOT, IRQ_PCI_INTA),
INTC_IRQ(TP, IRQ_TP),
};
/* IRLMSK mask register layout for R2D-1 */
static struct intc_mask_reg mask_registers_r2d_1[] __initdata = {
{ 0xa4000000, 0, 16, /* IRLMSK */
{ TP, PCI_INTA_SLOT, PCI_INTB_SLOT,
PCI_INTC_PCI1520, PCI_INTD_RTL8139,
SM501, CF_IDE, CF_CD, SDCARD, AX88796,
RTC_A, RTC_T, 0, 0, 0, EXT } },
};
/* IRLn to IRQ table for R2D-1 */
static unsigned char irl2irq_r2d_1[R2D_NR_IRL] __initdata = {
IRQ_PCI_INTD, IRQ_CF_IDE, IRQ_CF_CD, IRQ_PCI_INTC,
IRQ_VOYAGER, IRQ_AX88796, IRQ_RTC_A, IRQ_RTC_T,
IRQ_SDCARD, IRQ_PCI_INTA, IRQ_PCI_INTB, IRQ_EXT,
IRQ_TP,
};
static DECLARE_INTC_DESC(intc_desc_r2d_1, "r2d-1", vectors_r2d_1,
NULL, NULL, mask_registers_r2d_1, NULL, NULL);
#endif /* CONFIG_RTS7751R2D_1 */
#ifdef CONFIG_RTS7751R2D_PLUS
/* Vectors for R2D-PLUS */
static struct intc_vect vectors_r2d_plus[] __initdata = {
INTC_IRQ(EXT, IRQ_EXT),
INTC_IRQ(RTC_T, IRQ_RTC_T), INTC_IRQ(RTC_A, IRQ_RTC_A),
INTC_IRQ(KEY, IRQ_KEY), INTC_IRQ(SDCARD, IRQ_SDCARD),
INTC_IRQ(CF_CD, IRQ_CF_CD), INTC_IRQ(CF_IDE, IRQ_CF_IDE),
INTC_IRQ(SM501, IRQ_VOYAGER),
INTC_IRQ(PCI_INTD_RTL8139, IRQ_PCI_INTD),
INTC_IRQ(PCI_INTC_PCI1520, IRQ_PCI_INTC),
INTC_IRQ(PCI_INTB_RTL8139, IRQ_PCI_INTB),
INTC_IRQ(PCI_INTA_SLOT, IRQ_PCI_INTA),
INTC_IRQ(TP, IRQ_TP),
};
/* IRLMSK mask register layout for R2D-PLUS */
static struct intc_mask_reg mask_registers_r2d_plus[] __initdata = {
{ 0xa4000000, 0, 16, /* IRLMSK */
{ TP, PCI_INTA_SLOT, PCI_INTB_RTL8139,
PCI_INTC_PCI1520, PCI_INTD_RTL8139,
SM501, CF_IDE, CF_CD, SDCARD, KEY,
RTC_A, RTC_T, 0, 0, 0, EXT } },
};
/* IRLn to IRQ table for R2D-PLUS */
static unsigned char irl2irq_r2d_plus[R2D_NR_IRL] __initdata = {
IRQ_PCI_INTD, IRQ_CF_IDE, IRQ_CF_CD, IRQ_PCI_INTC,
IRQ_VOYAGER, IRQ_KEY, IRQ_RTC_A, IRQ_RTC_T,
IRQ_SDCARD, IRQ_PCI_INTA, IRQ_PCI_INTB, IRQ_EXT,
IRQ_TP,
};
static DECLARE_INTC_DESC(intc_desc_r2d_plus, "r2d-plus", vectors_r2d_plus,
NULL, NULL, mask_registers_r2d_plus, NULL, NULL);
#endif /* CONFIG_RTS7751R2D_PLUS */
static unsigned char irl2irq[R2D_NR_IRL];
int rts7751r2d_irq_demux(int irq)
{
return voyagergx_irq_demux(irq);
}
if (irq >= R2D_NR_IRL || !irl2irq[irq])
return irq;
static struct irq_chip rts7751r2d_irq_chip __read_mostly = {
.name = "rts7751r2d",
.mask = disable_rts7751r2d_irq,
.unmask = enable_rts7751r2d_irq,
.mask_ack = disable_rts7751r2d_irq,
};
return irl2irq[irq];
}
/*
* Initialize IRQ setting
*/
void __init init_rts7751r2d_IRQ(void)
{
int i;
/* IRL0=KEY Input
* IRL1=Ethernet
* IRL2=CF Card
* IRL3=CF Card Insert
* IRL4=PCMCIA
* IRL5=VOYAGER
* IRL6=RTC Alarm
* IRL7=RTC Timer
* IRL8=SD Card
* IRL9=PCI Slot #1
* IRL10=PCI Slot #2
* IRL11=Extention #0
* IRL12=Extention #1
* IRL13=Extention #2
* IRL14=Extention #3
*/
for (i=0; i<15; i++) {
disable_irq_nosync(i);
set_irq_chip_and_handler_name(i, &rts7751r2d_irq_chip,
handle_level_irq, "level");
enable_rts7751r2d_irq(i);
struct intc_desc *d;
switch (ctrl_inw(PA_VERREG) & 0xf0) {
#ifdef CONFIG_RTS7751R2D_PLUS
case 0x10:
printk(KERN_INFO "Using R2D-PLUS interrupt controller.\n");
d = &intc_desc_r2d_plus;
memcpy(irl2irq, irl2irq_r2d_plus, R2D_NR_IRL);
break;
#endif
#ifdef CONFIG_RTS7751R2D_1
case 0x00: /* according to manual */
case 0x30: /* in reality */
printk(KERN_INFO "Using R2D-1 interrupt controller.\n");
d = &intc_desc_r2d_1;
memcpy(irl2irq, irl2irq_r2d_1, R2D_NR_IRL);
break;
#endif
default:
printk(KERN_INFO "Unknown R2D interrupt controller 0x%04x\n",
ctrl_inw(PA_VERREG));
return;
}
register_intc_controller(d);
#ifdef CONFIG_MFD_SM501
setup_voyagergx_irq();
#endif
}
arch/sh/boards/renesas/rts7751r2d/setup.c
View file @ dcf397f0
......@@ -45,20 +45,16 @@ static void __init voyagergx_serial_init(void)
static struct resource cf_ide_resources[] = {
[0] = {
.start = PA_AREA5_IO + 0x1000,
.end = PA_AREA5_IO + 0x1000 + 0x08 - 1,
.end = PA_AREA5_IO + 0x1000 + 0x10 - 0x2,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = PA_AREA5_IO + 0x80c,
.end = PA_AREA5_IO + 0x80c + 0x16 - 1,
.end = PA_AREA5_IO + 0x80c,
.flags = IORESOURCE_MEM,
},
[2] = {
#ifdef CONFIG_RTS7751R2D_REV11
.start = 1,
#else
.start = 2,
#endif
.start = IRQ_CF_IDE,
.flags = IORESOURCE_IRQ,
},
};
......@@ -77,12 +73,28 @@ static struct platform_device cf_ide_device = {
},
};
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_OUTPORT,
.end = PA_OUTPORT,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
#ifdef CONFIG_MFD_SM501
static struct plat_serial8250_port uart_platform_data[] = {
{
.membase = (void __iomem *)VOYAGER_UART_BASE,
.mapbase = VOYAGER_UART_BASE,
.iotype = UPIO_MEM,
.irq = VOYAGER_UART0_IRQ,
.irq = IRQ_SM501_U0,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.regshift = 2,
.uartclk = (9600 * 16),
......@@ -98,21 +110,6 @@ static struct platform_device uart_device = {
},
};
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_OUTPORT,
.end = PA_OUTPORT + 8 - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct resource sm501_resources[] = {
[0] = {
.start = 0x10000000,
......@@ -125,7 +122,7 @@ static struct resource sm501_resources[] = {
.flags = IORESOURCE_MEM,
},
[2] = {
.start = 32,
.start = IRQ_SM501_CV,
.flags = IORESOURCE_IRQ,
},
};
......@@ -137,22 +134,19 @@ static struct platform_device sm501_device = {
.resource = sm501_resources,
};
#endif /* CONFIG_MFD_SM501 */
static struct platform_device *rts7751r2d_devices[] __initdata = {
#ifdef CONFIG_MFD_SM501
&uart_device,
&heartbeat_device,
&sm501_device,
#endif
&cf_ide_device,
&heartbeat_device,
};
static int __init rts7751r2d_devices_setup(void)
{
int ret;
if (ctrl_inw(PA_BVERREG) == 0x10) { /* only working on R2D-PLUS */
ret = platform_device_register(&cf_ide_device);
if (ret)
return ret;
}
return platform_add_devices(rts7751r2d_devices,
ARRAY_SIZE(rts7751r2d_devices));
}
......@@ -163,6 +157,34 @@ static void rts7751r2d_power_off(void)
ctrl_outw(0x0001, PA_POWOFF);
}
static inline unsigned char is_ide_ioaddr(unsigned long addr)
{
return ((cf_ide_resources[0].start <= addr &&
addr <= cf_ide_resources[0].end) ||
(cf_ide_resources[1].start <= addr &&
addr <= cf_ide_resources[1].end));
}
void rts7751r2d_writeb(u8 b, void __iomem *addr)
{
unsigned long tmp = (unsigned long __force)addr;
if (is_ide_ioaddr(tmp))
ctrl_outw((u16)b, tmp);
else
ctrl_outb(b, tmp);
}
u8 rts7751r2d_readb(void __iomem *addr)
{
unsigned long tmp = (unsigned long __force)addr;
if (is_ide_ioaddr(tmp))
return ctrl_inw(tmp) & 0xff;
else
return ctrl_inb(tmp);
}
/*
* Initialize the board
*/
......@@ -187,12 +209,11 @@ static void __init rts7751r2d_setup(char **cmdline_p)
static struct sh_machine_vector mv_rts7751r2d __initmv = {
.mv_name = "RTS7751R2D",
.mv_setup = rts7751r2d_setup,
.mv_nr_irqs = 72,
.mv_init_irq = init_rts7751r2d_IRQ,
.mv_irq_demux = rts7751r2d_irq_demux,
#ifdef CONFIG_USB_SM501
.mv_writeb = rts7751r2d_writeb,
.mv_readb = rts7751r2d_readb,
#if defined(CONFIG_MFD_SM501) && defined(CONFIG_USB_OHCI_HCD)
.mv_consistent_alloc = voyagergx_consistent_alloc,
.mv_consistent_free = voyagergx_consistent_free,
#endif
......
arch/sh/boards/renesas/x3proto/ilsel.c 0 → 100644
View file @ dcf397f0
/*
* arch/sh/boards/renesas/x3proto/ilsel.c
*
* Helper routines for SH-X3 proto board ILSEL.
*
* Copyright (C) 2007 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/bitmap.h>
#include <linux/io.h>
#include <asm/ilsel.h>
/*
* ILSEL is split across:
*
* ILSEL0 - 0xb8100004 [ Levels 1 - 4 ]
* ILSEL1 - 0xb8100006 [ Levels 5 - 8 ]
* ILSEL2 - 0xb8100008 [ Levels 9 - 12 ]
* ILSEL3 - 0xb810000a [ Levels 13 - 15 ]
*
* With each level being relative to an ilsel_source_t.
*/
#define ILSEL_BASE 0xb8100004
#define ILSEL_LEVELS 15
/*
* ILSEL level map, in descending order from the highest level down.
*
* Supported levels are 1 - 15 spread across ILSEL0 - ILSEL4, mapping
* directly to IRLs. As the IRQs are numbered in reverse order relative
* to the interrupt level, the level map is carefully managed to ensure a
* 1:1 mapping between the bit position and the IRQ number.
*
* This careful constructions allows ilsel_enable*() to be referenced
* directly for hooking up an ILSEL set and getting back an IRQ which can
* subsequently be used for internal accounting in the (optional) disable
* path.
*/
static unsigned long ilsel_level_map;
static inline unsigned int ilsel_offset(unsigned int bit)
{
return ILSEL_LEVELS - bit - 1;
}
static inline unsigned long mk_ilsel_addr(unsigned int bit)
{
return ILSEL_BASE + ((ilsel_offset(bit) >> 1) & ~0x1);
}
static inline unsigned int mk_ilsel_shift(unsigned int bit)
{
return (ilsel_offset(bit) & 0x3) << 2;
}
static void __ilsel_enable(ilsel_source_t set, unsigned int bit)
{
unsigned int tmp, shift;
unsigned long addr;
addr = mk_ilsel_addr(bit);
shift = mk_ilsel_shift(bit);
pr_debug("%s: bit#%d: addr - 0x%08lx (shift %d, set %d)\n",
__FUNCTION__, bit, addr, shift, set);
tmp = ctrl_inw(addr);
tmp &= ~(0xf << shift);
tmp |= set << shift;
ctrl_outw(tmp, addr);
}
/**
* ilsel_enable - Enable an ILSEL set.
* @set: ILSEL source (see ilsel_source_t enum in include/asm-sh/ilsel.h).
*
* Enables a given non-aliased ILSEL source (<= ILSEL_KEY) at the highest
* available interrupt level. Callers should take care to order callsites
* noting descending interrupt levels. Aliasing FPGA and external board
* IRQs need to use ilsel_enable_fixed().
*
* The return value is an IRQ number that can later be taken down with
* ilsel_disable().
*/
int ilsel_enable(ilsel_source_t set)
{
unsigned int bit;
/* Aliased sources must use ilsel_enable_fixed() */
BUG_ON(set > ILSEL_KEY);
do {
bit = find_first_zero_bit(&ilsel_level_map, ILSEL_LEVELS);
} while (test_and_set_bit(bit, &ilsel_level_map));
__ilsel_enable(set, bit);
return bit;
}
EXPORT_SYMBOL_GPL(ilsel_enable);
/**
* ilsel_enable_fixed - Enable an ILSEL set at a fixed interrupt level
* @set: ILSEL source (see ilsel_source_t enum in include/asm-sh/ilsel.h).
* @level: Interrupt level (1 - 15)
*
* Enables a given ILSEL source at a fixed interrupt level. Necessary
* both for level reservation as well as for aliased sources that only
* exist on special ILSEL#s.
*
* Returns an IRQ number (as ilsel_enable()).
*/
int ilsel_enable_fixed(ilsel_source_t set, unsigned int level)
{
unsigned int bit = ilsel_offset(level - 1);
if (test_and_set_bit(bit, &ilsel_level_map))
return -EBUSY;
__ilsel_enable(set, bit);
return bit;
}
EXPORT_SYMBOL_GPL(ilsel_enable_fixed);
/**
* ilsel_disable - Disable an ILSEL set
* @irq: Bit position for ILSEL set value (retval from enable routines)
*
* Disable a previously enabled ILSEL set.
*/
void ilsel_disable(unsigned int irq)
{
unsigned long addr;
unsigned int tmp;
addr = mk_ilsel_addr(irq);
tmp = ctrl_inw(addr);
tmp &= ~(0xf << mk_ilsel_shift(irq));
ctrl_outw(tmp, addr);
clear_bit(irq, &ilsel_level_map);
}
EXPORT_SYMBOL_GPL(ilsel_disable);
arch/sh/boards/renesas/x3proto/setup.c 0 → 100644
View file @ dcf397f0
/*
* arch/sh/boards/renesas/x3proto/setup.c
*
* Renesas SH-X3 Prototype Board Support.
*
* Copyright (C) 2007 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/kernel.h>
#include <linux/io.h>
#include <asm/ilsel.h>
static struct resource heartbeat_resources[] = {
[0] = {
.start = 0xb8140020,
.end = 0xb8140020,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct resource smc91x_resources[] = {
[0] = {
.start = 0x18000300,
.end = 0x18000300 + 0x10 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
/* Filled in by ilsel */
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = -1,
.resource = smc91x_resources,
.num_resources = ARRAY_SIZE(smc91x_resources),
};
static struct resource r8a66597_usb_host_resources[] = {
[0] = {
.name = "r8a66597_hcd",
.start = 0x18040000,
.end = 0x18080000 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.name = "r8a66597_hcd",
/* Filled in by ilsel */
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device r8a66597_usb_host_device = {
.name = "r8a66597_hcd",
.id = -1,
.dev = {
.dma_mask = NULL, /* don't use dma */
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(r8a66597_usb_host_resources),
.resource = r8a66597_usb_host_resources,
};
static struct resource m66592_usb_peripheral_resources[] = {
[0] = {
.name = "m66592_udc",
.start = 0x18080000,
.end = 0x180c0000 - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.name = "m66592_udc",
/* Filled in by ilsel */
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device m66592_usb_peripheral_device = {
.name = "m66592_udc",
.id = -1,
.dev = {
.dma_mask = NULL, /* don't use dma */
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(m66592_usb_peripheral_resources),
.resource = m66592_usb_peripheral_resources,
};
static struct platform_device *x3proto_devices[] __initdata = {
&heartbeat_device,
&smc91x_device,
&r8a66597_usb_host_device,
&m66592_usb_peripheral_device,
};
static int __init x3proto_devices_setup(void)
{
r8a66597_usb_host_resources[1].start =
r8a66597_usb_host_resources[1].end = ilsel_enable(ILSEL_USBH_I);
m66592_usb_peripheral_resources[1].start =
m66592_usb_peripheral_resources[1].end = ilsel_enable(ILSEL_USBP_I);
smc91x_resources[1].start =
smc91x_resources[1].end = ilsel_enable(ILSEL_LAN);
return platform_add_devices(x3proto_devices,
ARRAY_SIZE(x3proto_devices));
}
device_initcall(x3proto_devices_setup);
static void __init x3proto_init_irq(void)
{
plat_irq_setup_pins(IRQ_MODE_IRL3210);
/* Set ICR0.LVLMODE */
ctrl_outl(ctrl_inl(0xfe410000) | (1 << 21), 0xfe410000);
}
static struct sh_machine_vector mv_x3proto __initmv = {
.mv_name = "x3proto",
.mv_init_irq = x3proto_init_irq,
};
arch/sh/boards/se/7206/io.c
View file @ dcf397f0
......@@ -26,22 +26,24 @@ static inline void delay(void)
static inline volatile __u16 *
port2adr(unsigned int port)
{
if (port >= 0x2000)
if (port >= 0x2000 && port < 0x2020)
return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
else if (port >= 0x300 || port < 0x310)
else if (port >= 0x300 && port < 0x310)
return (volatile __u16 *) (PA_SMSC + (port - 0x300));
return (volatile __u16 *)port;
}
unsigned char se7206_inb(unsigned long port)
{
return (*port2adr(port))&0xff;
return (*port2adr(port)) & 0xff;
}
unsigned char se7206_inb_p(unsigned long port)
{
unsigned long v;
v = (*port2adr(port))&0xff;
v = (*port2adr(port)) & 0xff;
delay();
return v;
}
......@@ -51,12 +53,6 @@ unsigned short se7206_inw(unsigned long port)
return *port2adr(port);;
}
unsigned int se7206_inl(unsigned long port)
{
maybebadio(port);
return 0;
}
void se7206_outb(unsigned char value, unsigned long port)
{
*(port2adr(port)) = value;
......@@ -73,11 +69,6 @@ void se7206_outw(unsigned short value, unsigned long port)
*port2adr(port) = value;
}
void se7206_outl(unsigned int value, unsigned long port)
{
maybebadio(port);
}
void se7206_insb(unsigned long port, void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
......@@ -95,11 +86,6 @@ void se7206_insw(unsigned long port, void *addr, unsigned long count)
*ap++ = *p;
}
void se7206_insl(unsigned long port, void *addr, unsigned long count)
{
maybebadio(port);
}
void se7206_outsb(unsigned long port, const void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
......@@ -116,8 +102,3 @@ void se7206_outsw(unsigned long port, const void *addr, unsigned long count)
while (count--)
*p = *ap++;
}
void se7206_outsl(unsigned long port, const void *addr, unsigned long count)
{
maybebadio(port);
}
arch/sh/boards/se/7206/setup.c
View file @ dcf397f0
......@@ -6,14 +6,13 @@
* Copyright (C) 2007 Paul Mundt
*
* Hitachi 7206 SolutionEngine Support.
*
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <asm/se7206.h>
#include <asm/io.h>
#include <asm/machvec.h>
#include <asm/heartbeat.h>
static struct resource smc91x_resources[] = {
[0] = {
......@@ -37,10 +36,16 @@ static struct platform_device smc91x_device = {
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
static struct heartbeat_data heartbeat_data = {
.bit_pos = heartbeat_bit_pos,
.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
.regsize = 32,
};
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.end = PA_LED,
.flags = IORESOURCE_MEM,
},
};
......@@ -49,7 +54,7 @@ static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
.platform_data = &heartbeat_data,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
......@@ -75,24 +80,18 @@ static struct sh_machine_vector mv_se __initmv = {
.mv_nr_irqs = 256,
.mv_inb = se7206_inb,
.mv_inw = se7206_inw,
.mv_inl = se7206_inl,
.mv_outb = se7206_outb,
.mv_outw = se7206_outw,
.mv_outl = se7206_outl,
.mv_inb_p = se7206_inb_p,
.mv_inw_p = se7206_inw,
.mv_inl_p = se7206_inl,
.mv_outb_p = se7206_outb_p,
.mv_outw_p = se7206_outw,
.mv_outl_p = se7206_outl,
.mv_insb = se7206_insb,
.mv_insw = se7206_insw,
.mv_insl = se7206_insl,
.mv_outsb = se7206_outsb,
.mv_outsw = se7206_outsw,
.mv_outsl = se7206_outsl,
.mv_init_irq = init_se7206_IRQ,
};
arch/sh/boards/se/7343/irq.c
View file @ dcf397f0
......@@ -99,8 +99,11 @@ shmse_irq_demux(int irq)
*
* We configure IRQ5 as a cascade IRQ.
*/
static struct irqaction irq5 = { no_action, 0, CPU_MASK_NONE, "IRQ5-cascade",
NULL, NULL};
static struct irqaction irq5 = {
.handler = no_action,
.mask = CPU_MASK_NONE,
.name = "IRQ5-cascade",
};
static struct ipr_data se7343_irq5_ipr_map[] = {
{ IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY },
......
arch/sh/boards/se/7343/setup.c
View file @ dcf397f0
......@@ -33,7 +33,7 @@ static struct platform_device smc91x_device = {
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + 8 - 1,
.end = PA_LED,
.flags = IORESOURCE_MEM,
},
};
......
arch/sh/boards/se/770x/setup.c
View file @ dcf397f0
......@@ -12,6 +12,7 @@
#include <asm/se.h>
#include <asm/io.h>
#include <asm/smc37c93x.h>
#include <asm/heartbeat.h>
void init_se_IRQ(void);
......@@ -90,10 +91,15 @@ static struct platform_device cf_ide_device = {
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
static struct heartbeat_data heartbeat_data = {
.bit_pos = heartbeat_bit_pos,
.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
};
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.end = PA_LED,
.flags = IORESOURCE_MEM,
},
};
......@@ -102,7 +108,7 @@ static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
.platform_data = &heartbeat_data,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
......
arch/sh/boards/se/7722/setup.c
View file @ dcf397f0
......@@ -18,12 +18,10 @@
#include <asm/io.h>
/* Heartbeat */
static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.end = PA_LED,
.flags = IORESOURCE_MEM,
},
};
......@@ -31,9 +29,6 @@ static struct resource heartbeat_resources[] = {
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
......@@ -109,7 +104,7 @@ static void __init se7722_setup(char **cmdline_p)
ctrl_outl(0x00051001, MSTPCR0);
ctrl_outl(0x00000000, MSTPCR1);
/* KEYSC, VOU, BEU, CEU, VEU, VPU, LCDC */
ctrl_outl(0xffffbfC0, MSTPCR2);
ctrl_outl(0xffffbfC0, MSTPCR2);
ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */
ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
......
arch/sh/boards/se/7751/setup.c
View file @ dcf397f0
......@@ -13,13 +13,19 @@
#include <asm/machvec.h>
#include <asm/se7751.h>
#include <asm/io.h>
#include <asm/heartbeat.h>
static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
static struct heartbeat_data heartbeat_data = {
.bit_pos = heartbeat_bit_pos,
.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
};
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.end = PA_LED,
.flags = IORESOURCE_MEM,
},
};
......@@ -28,14 +34,13 @@ static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
.platform_data = &heartbeat_data,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
static struct platform_device *se7751_devices[] __initdata = {
&smc91x_device,
&heartbeat_device,
};
......
arch/sh/boards/se/7780/irq.c
View file @ dcf397f0
......@@ -16,32 +16,6 @@
#include <asm/io.h>
#include <asm/se7780.h>
static struct intc2_data intc2_irq_table[] = {
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT1 */
{ 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT2 */
{ 6, 0, 29, 0, 29, 3 }, /* daughter board EXTINT3 */
{ 8, 0, 28, 0, 28, 3 }, /* SMC 91C111 (LAN) */
{ 10, 0, 27, 0, 27, 3 }, /* daughter board EXTINT4 */
{ 4, 0, 30, 0, 30, 3 }, /* daughter board EXTINT5 */
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT6 */
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT7 */
{ 2, 0, 31, 0, 31, 3 }, /* daughter board EXTINT8 */
{ 0 , 0, 24, 0, 24, 3 }, /* SM501 */
};
static struct intc2_desc intc2_irq_desc __read_mostly = {
.prio_base = 0, /* N/A */
.msk_base = 0xffd00044,
.mskclr_base = 0xffd00064,
.intc2_data = intc2_irq_table,
.nr_irqs = ARRAY_SIZE(intc2_irq_table),
.chip = {
.name = "INTC2-se7780",
},
};
/*
* Initialize IRQ setting
*/
......@@ -68,5 +42,5 @@ void __init init_se7780_IRQ(void)
/* FPGA + 0x0A */
ctrl_outw((IRQPIN_PCCPW << IRQPOS_PCCPW), FPGA_INTSEL3);
register_intc2_controller(&intc2_irq_desc);
plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-7 */
}
arch/sh/boards/se/7780/setup.c
View file @ dcf397f0
......@@ -16,12 +16,10 @@
#include <asm/io.h>
/* Heartbeat */
static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED + ARRAY_SIZE(heartbeat_bit_pos) - 1,
.end = PA_LED,
.flags = IORESOURCE_MEM,
},
};
......@@ -29,9 +27,6 @@ static struct resource heartbeat_resources[] = {
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = heartbeat_bit_pos,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
......
arch/sh/boards/sh03/setup.c
View file @ dcf397f0
......@@ -15,33 +15,9 @@
#include <asm/sh03/sh03.h>
#include <asm/addrspace.h>
static struct ipr_data ipr_irq_table[] = {
{ IRL0_IRQ, 0, IRL0_IPR_POS, IRL0_PRIORITY },
{ IRL1_IRQ, 0, IRL1_IPR_POS, IRL1_PRIORITY },
{ IRL2_IRQ, 0, IRL2_IPR_POS, IRL2_PRIORITY },
{ IRL3_IRQ, 0, IRL3_IPR_POS, IRL3_PRIORITY },
};
static unsigned long ipr_offsets[] = {
INTC_IPRD,
};
static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),
.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
.chip = {
.name = "IPR-sh03",
},
};
static void __init init_sh03_IRQ(void)
{
ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
register_ipr_controller(&ipr_irq_desc);
plat_irq_setup_pins(IRQ_MODE_IRQ);
}
extern void *cf_io_base;
......@@ -68,7 +44,7 @@ static void __init sh03_setup(char **cmdline_p)
static struct resource heartbeat_resources[] = {
[0] = {
.start = 0xa0800000,
.end = 0xa0800000 + 8 - 1,
.end = 0xa0800000,
.flags = IORESOURCE_MEM,
},
};
......
arch/sh/boards/shmin/setup.c
View file @ dcf397f0
......@@ -14,36 +14,12 @@
#define PFC_PHCR 0xa400010eUL
#define INTC_ICR1 0xa4000010UL
#define INTC_IPRC 0xa4000016UL
static struct ipr_data ipr_irq_table[] = {
{ 32, 0, 0, 0 },
{ 33, 0, 4, 0 },
{ 34, 0, 8, 8 },
{ 35, 0, 12, 0 },
};
static unsigned long ipr_offsets[] = {
INTC_IPRC,
};
static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),
.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
.chip = {
.name = "IPR-shmin",
},
};
static void __init init_shmin_irq(void)
{
ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
register_ipr_controller(&ipr_irq_desc);
plat_irq_setup_pins(IRQ_MODE_IRQ);
}
static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
......
arch/sh/boards/snapgear/setup.c
View file @ dcf397f0
......@@ -68,37 +68,11 @@ module_init(eraseconfig_init);
* IRL3 = crypto
*/
static struct ipr_data ipr_irq_table[] = {
{ IRL0_IRQ, 0, IRL0_IPR_POS, IRL0_PRIORITY },
{ IRL1_IRQ, 0, IRL1_IPR_POS, IRL1_PRIORITY },
{ IRL2_IRQ, 0, IRL2_IPR_POS, IRL2_PRIORITY },
{ IRL3_IRQ, 0, IRL3_IPR_POS, IRL3_PRIORITY },
};
static unsigned long ipr_offsets[] = {
INTC_IPRD,
};
static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),
.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
.chip = {
.name = "IPR-snapgear",
},
};
static void __init init_snapgear_IRQ(void)
{
/* enable individual interrupt mode for externals */
ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
printk("Setup SnapGear IRQ/IPR ...\n");
register_ipr_controller(&ipr_irq_desc);
/* enable individual interrupt mode for externals */
plat_irq_setup_pins(IRQ_MODE_IRQ);
}
/*
......
arch/sh/boards/titan/setup.c
View file @ dcf397f0
......@@ -12,38 +12,10 @@
#include <asm/titan.h>
#include <asm/io.h>
static struct ipr_data ipr_irq_table[] = {
/* IRQ, IPR idx, shift, prio */
{ TITAN_IRQ_WAN, 3, 12, 8 }, /* eth0 (WAN) */
{ TITAN_IRQ_LAN, 3, 8, 8 }, /* eth1 (LAN) */
{ TITAN_IRQ_MPCIA, 3, 4, 8 }, /* mPCI A (top) */
{ TITAN_IRQ_USB, 3, 0, 8 }, /* mPCI B (bottom), USB */
};
static unsigned long ipr_offsets[] = { /* stolen from setup-sh7750.c */
0xffd00004UL, /* 0: IPRA */
0xffd00008UL, /* 1: IPRB */
0xffd0000cUL, /* 2: IPRC */
0xffd00010UL, /* 3: IPRD */
};
static struct ipr_desc ipr_irq_desc = {
.ipr_offsets = ipr_offsets,
.nr_offsets = ARRAY_SIZE(ipr_offsets),
.ipr_data = ipr_irq_table,
.nr_irqs = ARRAY_SIZE(ipr_irq_table),
.chip = {
.name = "IPR-titan",
},
};
static void __init init_titan_irq(void)
{
/* enable individual interrupt mode for externals */
ipr_irq_enable_irlm();
/* register ipr irqs */
register_ipr_controller(&ipr_irq_desc);
plat_irq_setup_pins(IRQ_MODE_IRQ);
}
static struct sh_machine_vector mv_titan __initmv = {
......
arch/sh/cchips/Kconfig
View file @ dcf397f0
menu "Companion Chips"
config VOYAGERGX
bool "VoyagerGX chip support"
depends on SH_RTS7751R2D
help
Selecting this option will support Silicon Motion, Inc. SM501.
Designed to complement needs for the embedded industry, it
provides video and 2D capability. To reduce system cost a
wide variety of include I/O is supported, including analog RGB
and digital LCD Panel interface, 8-bit parallel interface, USB,
UART, IrDA, Zoom Video, AC97 or I2S, SSP, PWM, and I2C. There
are additional GPIO bits that can be used to interface to
external as well.
config HD6446X_SERIES
bool
......
arch/sh/cchips/hd6446x/hd64461.c
View file @ dcf397f0
......@@ -14,6 +14,9 @@
#include <asm/irq.h>
#include <asm/hd64461.h>
/* This belongs in cpu specific */
#define INTC_ICR1 0xA4140010UL
static void disable_hd64461_irq(unsigned int irq)
{
unsigned short nimr;
......@@ -121,10 +124,15 @@ int hd64461_irq_demux(int irq)
}
}
}
return __irq_demux(irq);
return irq;
}
static struct irqaction irq0 = { hd64461_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "HD64461", NULL, NULL };
static struct irqaction irq0 = {
.handler = hd64461_interrupt,
.flags = IRQF_DISABLED,
.mask = CPU_MASK_NONE,
.name = "HD64461",
};
int __init setup_hd64461(void)
{
......@@ -143,6 +151,7 @@ int __init setup_hd64461(void)
#endif
outw(0xffff, HD64461_NIMR);
/* IRQ 80 -> 95 belongs to HD64461 */
for (i = HD64461_IRQBASE; i < HD64461_IRQBASE + 16; i++) {
irq_desc[i].chip = &hd64461_irq_type;
}
......
arch/sh/cchips/hd6446x/hd64465/setup.c
View file @ dcf397f0
......@@ -147,7 +147,12 @@ int hd64465_irq_demux(int irq)
return irq;
}
static struct irqaction irq0 = { hd64465_interrupt, IRQF_DISABLED, CPU_MASK_NONE, "HD64465", NULL, NULL};
static struct irqaction irq0 = {
.handler = hd64465_interrupt,
.flags = IRQF_DISABLED,
.mask = CPU_MASK_NONE,
.name = "HD64465",
};
static int __init setup_hd64465(void)
......
arch/sh/cchips/voyagergx/irq.c
View file @ dcf397f0
......@@ -23,149 +23,79 @@
#include <asm/voyagergx.h>
#include <asm/rts7751r2d.h>
static void disable_voyagergx_irq(unsigned int irq)
{
unsigned long val;
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask);
val = readl((void __iomem *)VOYAGER_INT_MASK);
val &= ~mask;
writel(val, (void __iomem *)VOYAGER_INT_MASK);
}
static void enable_voyagergx_irq(unsigned int irq)
{
unsigned long val;
unsigned long mask = 1 << (irq - VOYAGER_IRQ_BASE);
pr_debug("disable_voyagergx_irq(%d): mask=%lx\n", irq, mask);
val = readl((void __iomem *)VOYAGER_INT_MASK);
val |= mask;
writel(val, (void __iomem *)VOYAGER_INT_MASK);
}
static void mask_and_ack_voyagergx(unsigned int irq)
{
disable_voyagergx_irq(irq);
}
static void end_voyagergx_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_voyagergx_irq(irq);
}
static unsigned int startup_voyagergx_irq(unsigned int irq)
{
enable_voyagergx_irq(irq);
return 0;
}
static void shutdown_voyagergx_irq(unsigned int irq)
{
disable_voyagergx_irq(irq);
}
static struct hw_interrupt_type voyagergx_irq_type = {
.typename = "VOYAGERGX-IRQ",
.startup = startup_voyagergx_irq,
.shutdown = shutdown_voyagergx_irq,
.enable = enable_voyagergx_irq,
.disable = disable_voyagergx_irq,
.ack = mask_and_ack_voyagergx,
.end = end_voyagergx_irq,
enum {
UNUSED = 0,
/* voyager specific interrupt sources */
UP, G54, G53, G52, G51, G50, G49, G48,
I2C, PW, DMA, PCI, I2S, AC, US,
U1, U0, CV, MC, S1, S0,
UH, TWOD, ZD, PV, CI,
};
static irqreturn_t voyagergx_interrupt(int irq, void *dev_id)
{
printk(KERN_INFO
"VoyagerGX: spurious interrupt, status: 0x%x\n",
(unsigned int)readl((void __iomem *)INT_STATUS));
return IRQ_HANDLED;
}
static struct {
int (*func)(int, void *);
void *dev;
} voyagergx_demux[VOYAGER_IRQ_NUM];
static struct intc_vect vectors[] __initdata = {
INTC_IRQ(UP, IRQ_SM501_UP), INTC_IRQ(G54, IRQ_SM501_G54),
INTC_IRQ(G53, IRQ_SM501_G53), INTC_IRQ(G52, IRQ_SM501_G52),
INTC_IRQ(G51, IRQ_SM501_G51), INTC_IRQ(G50, IRQ_SM501_G50),
INTC_IRQ(G49, IRQ_SM501_G49), INTC_IRQ(G48, IRQ_SM501_G48),
INTC_IRQ(I2C, IRQ_SM501_I2C), INTC_IRQ(PW, IRQ_SM501_PW),
INTC_IRQ(DMA, IRQ_SM501_DMA), INTC_IRQ(PCI, IRQ_SM501_PCI),
INTC_IRQ(I2S, IRQ_SM501_I2S), INTC_IRQ(AC, IRQ_SM501_AC),
INTC_IRQ(US, IRQ_SM501_US), INTC_IRQ(U1, IRQ_SM501_U1),
INTC_IRQ(U0, IRQ_SM501_U0), INTC_IRQ(CV, IRQ_SM501_CV),
INTC_IRQ(MC, IRQ_SM501_MC), INTC_IRQ(S1, IRQ_SM501_S1),
INTC_IRQ(S0, IRQ_SM501_S0), INTC_IRQ(UH, IRQ_SM501_UH),
INTC_IRQ(TWOD, IRQ_SM501_2D), INTC_IRQ(ZD, IRQ_SM501_ZD),
INTC_IRQ(PV, IRQ_SM501_PV), INTC_IRQ(CI, IRQ_SM501_CI),
};
void voyagergx_register_irq_demux(int irq,
int (*demux)(int irq, void *dev), void *dev)
{
voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = demux;
voyagergx_demux[irq - VOYAGER_IRQ_BASE].dev = dev;
}
static struct intc_mask_reg mask_registers[] __initdata = {
{ VOYAGER_INT_MASK, 0, 32, /* "Interrupt Mask", MMIO_base + 0x30 */
{ UP, G54, G53, G52, G51, G50, G49, G48,
I2C, PW, 0, DMA, PCI, I2S, AC, US,
0, 0, U1, U0, CV, MC, S1, S0,
0, UH, 0, 0, TWOD, ZD, PV, CI } },
};
void voyagergx_unregister_irq_demux(int irq)
{
voyagergx_demux[irq - VOYAGER_IRQ_BASE].func = 0;
}
static DECLARE_INTC_DESC(intc_desc, "voyagergx", vectors,
NULL, NULL, mask_registers, NULL, NULL);
static unsigned int voyagergx_stat2irq[32] = {
IRQ_SM501_CI, IRQ_SM501_PV, IRQ_SM501_ZD, IRQ_SM501_2D,
0, 0, IRQ_SM501_UH, 0,
IRQ_SM501_S0, IRQ_SM501_S1, IRQ_SM501_MC, IRQ_SM501_CV,
IRQ_SM501_U0, IRQ_SM501_U1, 0, 0,
IRQ_SM501_US, IRQ_SM501_AC, IRQ_SM501_I2S, IRQ_SM501_PCI,
IRQ_SM501_DMA, 0, IRQ_SM501_PW, IRQ_SM501_I2C,
IRQ_SM501_G48, IRQ_SM501_G49, IRQ_SM501_G50, IRQ_SM501_G51,
IRQ_SM501_G52, IRQ_SM501_G53, IRQ_SM501_G54, IRQ_SM501_UP
};
int voyagergx_irq_demux(int irq)
static void voyagergx_irq_demux(unsigned int irq, struct irq_desc *desc)
{
if (irq == IRQ_VOYAGER ) {
unsigned long i = 0, bit __attribute__ ((unused));
unsigned long val = readl((void __iomem *)INT_STATUS);
if (val & (1 << 1))
i = 1;
else if (val & (1 << 2))
i = 2;
else if (val & (1 << 6))
i = 6;
else if (val & (1 << 10))
i = 10;
else if (val & (1 << 11))
i = 11;
else if (val & (1 << 12))
i = 12;
else if (val & (1 << 17))
i = 17;
else
printk("Unexpected IRQ irq = %d status = 0x%08lx\n", irq, val);
pr_debug("voyagergx_irq_demux %ld \n", i);
if (i < VOYAGER_IRQ_NUM) {
irq = VOYAGER_IRQ_BASE + i;
if (voyagergx_demux[i].func != 0)
irq = voyagergx_demux[i].func(irq,
voyagergx_demux[i].dev);
unsigned long intv = ctrl_inl(INT_STATUS);
struct irq_desc *ext_desc;
unsigned int ext_irq;
unsigned int k = 0;
while (intv) {
ext_irq = voyagergx_stat2irq[k];
if (ext_irq && (intv & 1)) {
ext_desc = irq_desc + ext_irq;
handle_level_irq(ext_irq, ext_desc);
}
intv >>= 1;
k++;
}
return irq;
}
static struct irqaction irq0 = {
.name = "voyagergx",
.handler = voyagergx_interrupt,
.flags = IRQF_DISABLED,
.mask = CPU_MASK_NONE,
};
void __init setup_voyagergx_irq(void)
{
int i, flag;
printk(KERN_INFO "VoyagerGX configured at 0x%x on irq %d(mapped into %d to %d)\n",
VOYAGER_BASE,
printk(KERN_INFO "VoyagerGX on irq %d (mapped into %d to %d)\n",
IRQ_VOYAGER,
VOYAGER_IRQ_BASE,
VOYAGER_IRQ_BASE + VOYAGER_IRQ_NUM - 1);
for (i=0; i<VOYAGER_IRQ_NUM; i++) {
flag = 0;
switch (VOYAGER_IRQ_BASE + i) {
case VOYAGER_USBH_IRQ:
case VOYAGER_8051_IRQ:
case VOYAGER_UART0_IRQ:
case VOYAGER_UART1_IRQ:
case VOYAGER_AC97_IRQ:
flag = 1;
}
if (flag == 1)
irq_desc[VOYAGER_IRQ_BASE + i].chip = &voyagergx_irq_type;
}
setup_irq(IRQ_VOYAGER, &irq0);
register_intc_controller(&intc_desc);
set_irq_chained_handler(IRQ_VOYAGER, voyagergx_irq_demux);
}
arch/sh/configs/dreamcast_defconfig
View file @ dcf397f0
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.22-rc4
# Sat Jul 7 03:47:45 2007
# Linux kernel version: 2.6.23-rc7
# Fri Sep 21 15:46:27 2007
#
CONFIG_SUPERH=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
......@@ -18,30 +18,26 @@ CONFIG_STACKTRACE_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_NO_VIRT_TO_BUS=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
#
# Code maturity level options
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
#
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
# CONFIG_TASKSTATS is not set
# CONFIG_UTS_NS is not set
# CONFIG_USER_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
......@@ -64,7 +60,6 @@ CONFIG_FUTEX=y
CONFIG_ANON_INODES=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_VM_EVENT_COUNTERS=y
......@@ -74,24 +69,17 @@ CONFIG_SLAB=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Block layer
#
CONFIG_BLOCK=y
# CONFIG_LBD is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
# CONFIG_LSF is not set
# CONFIG_BLK_DEV_BSG is not set
#
# IO Schedulers
......@@ -112,7 +100,6 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
CONFIG_CPU_SH4=y
# CONFIG_CPU_SUBTYPE_SH7619 is not set
# CONFIG_CPU_SUBTYPE_SH7206 is not set
# CONFIG_CPU_SUBTYPE_SH7300 is not set
# CONFIG_CPU_SUBTYPE_SH7705 is not set
# CONFIG_CPU_SUBTYPE_SH7706 is not set
# CONFIG_CPU_SUBTYPE_SH7707 is not set
......@@ -120,6 +107,7 @@ CONFIG_CPU_SH4=y
# CONFIG_CPU_SUBTYPE_SH7709 is not set
# CONFIG_CPU_SUBTYPE_SH7710 is not set
# CONFIG_CPU_SUBTYPE_SH7712 is not set
# CONFIG_CPU_SUBTYPE_SH7720 is not set
# CONFIG_CPU_SUBTYPE_SH7750 is not set
CONFIG_CPU_SUBTYPE_SH7091=y
# CONFIG_CPU_SUBTYPE_SH7750R is not set
......@@ -134,7 +122,6 @@ CONFIG_CPU_SUBTYPE_SH7091=y
# CONFIG_CPU_SUBTYPE_SH7780 is not set
# CONFIG_CPU_SUBTYPE_SH7785 is not set
# CONFIG_CPU_SUBTYPE_SHX3 is not set
# CONFIG_CPU_SUBTYPE_SH73180 is not set
# CONFIG_CPU_SUBTYPE_SH7343 is not set
# CONFIG_CPU_SUBTYPE_SH7722 is not set
......@@ -177,7 +164,9 @@ CONFIG_NR_QUICK=2
# Cache configuration
#
# CONFIG_SH_DIRECT_MAPPED is not set
# CONFIG_SH_WRITETHROUGH is not set
CONFIG_CACHE_WRITEBACK=y
# CONFIG_CACHE_WRITETHROUGH is not set
# CONFIG_CACHE_OFF is not set
#
# Processor features
......@@ -185,12 +174,11 @@ CONFIG_NR_QUICK=2
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_SH_FPU=y
# CONFIG_SH_DSP is not set
CONFIG_SH_STORE_QUEUES=y
CONFIG_CPU_HAS_INTEVT=y
CONFIG_CPU_HAS_IPR_IRQ=y
CONFIG_CPU_HAS_SR_RB=y
CONFIG_CPU_HAS_PTEA=y
CONFIG_CPU_HAS_FPU=y
#
# Board support
......@@ -270,6 +258,7 @@ CONFIG_CMDLINE="console=ttySC1,115200 panic=3"
#
# Bus options
#
CONFIG_MAPLE=y
CONFIG_PCI=y
CONFIG_SH_PCIDMA_NONCOHERENT=y
CONFIG_PCI_AUTO=y
......@@ -368,6 +357,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
#
# Device Drivers
......@@ -380,27 +370,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_SYS_HYPERVISOR is not set
#
# Connector - unified userspace <-> kernelspace linker
#
# CONFIG_CONNECTOR is not set
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
# CONFIG_PNPACPI is not set
#
# Block devices
#
# CONFIG_BLK_CPQ_DA is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
......@@ -411,14 +384,11 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
#
# Misc devices
#
CONFIG_MISC_DEVICES=y
# CONFIG_PHANTOM is not set
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
# CONFIG_BLINK is not set
# CONFIG_IDE is not set
#
......@@ -426,12 +396,9 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SCSI_NETLINK is not set
# CONFIG_ATA is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
......@@ -444,26 +411,16 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
#
# CONFIG_FIREWIRE is not set
# CONFIG_IEEE1394 is not set
#
# I2O device support
#
# CONFIG_I2O is not set
#
# Network device support
#
CONFIG_NETDEVICES=y
# CONFIG_NETDEVICES_MULTIQUEUE is not set
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ARCNET is not set
# CONFIG_PHYLIB is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_STNIC is not set
......@@ -472,10 +429,6 @@ CONFIG_MII=y
# CONFIG_CASSINI is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_SMC91X is not set
#
# Tulip family network device support
#
# CONFIG_NET_TULIP is not set
# CONFIG_HP100 is not set
CONFIG_NET_PCI=y
......@@ -520,15 +473,7 @@ CONFIG_8139TOO=y
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
......@@ -536,6 +481,7 @@ CONFIG_8139TOO=y
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
#
# Userland interfaces
......@@ -606,10 +552,6 @@ CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
CONFIG_WATCHDOG=y
# CONFIG_WATCHDOG_NOWAYOUT is not set
......@@ -631,10 +573,6 @@ CONFIG_HW_RANDOM=y
# CONFIG_APPLICOM is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# TPM devices
#
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
# CONFIG_I2C is not set
......@@ -644,11 +582,8 @@ CONFIG_DEVPORT=y
#
# CONFIG_SPI is not set
# CONFIG_SPI_MASTER is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
#
......@@ -673,6 +608,7 @@ CONFIG_DEVPORT=y
#
# CONFIG_DISPLAY_SUPPORT is not set
# CONFIG_VGASTATE is not set
CONFIG_VIDEO_OUTPUT_CONTROL=m
CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y
# CONFIG_FB_DDC is not set
......@@ -699,7 +635,6 @@ CONFIG_FB_DEFERRED_IO=y
# CONFIG_FB_ASILIANT is not set
# CONFIG_FB_IMSTT is not set
CONFIG_FB_PVR2=y
# CONFIG_FB_EPSON1355 is not set
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_NVIDIA is not set
# CONFIG_FB_RIVA is not set
......@@ -725,6 +660,7 @@ CONFIG_FB_PVR2=y
#
CONFIG_DUMMY_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
......@@ -749,16 +685,10 @@ CONFIG_LOGO_SUPERH_CLUT224=y
# Sound
#
# CONFIG_SOUND is not set
#
# HID Devices
#
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
#
# USB support
#
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
CONFIG_USB_ARCH_HAS_OHCI=y
CONFIG_USB_ARCH_HAS_EHCI=y
......@@ -773,32 +703,8 @@ CONFIG_USB_ARCH_HAS_EHCI=y
#
# CONFIG_USB_GADGET is not set
# CONFIG_MMC is not set
#
# LED devices
#
# CONFIG_NEW_LEDS is not set
#
# LED drivers
#
#
# LED Triggers
#
#
# InfiniBand support
#
# CONFIG_INFINIBAND is not set
#
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
#
#
# Real Time Clock
#
# CONFIG_RTC_CLASS is not set
#
......@@ -814,6 +720,11 @@ CONFIG_USB_ARCH_HAS_EHCI=y
# DMA Devices
#
#
# Userspace I/O
#
# CONFIG_UIO is not set
#
# File systems
#
......@@ -890,7 +801,6 @@ CONFIG_RAMFS=y
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
# CONFIG_9P_FS is not set
#
# Partition Types
......@@ -935,10 +845,6 @@ CONFIG_ENABLE_MUST_CHECK=y
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
......@@ -949,6 +855,7 @@ CONFIG_BITREVERSE=y
# CONFIG_CRC16 is not set
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
......
arch/sh/configs/hp6xx_defconfig
View file @ dcf397f0
This diff is collapsed.
arch/sh/configs/magicpanelr2_defconfig 0 → 100644
View file @ dcf397f0
This diff is collapsed.
arch/sh/configs/rts7751r2dplus_defconfig 0 → 100644
View file @ dcf397f0
This diff is collapsed.
arch/sh/configs/se7206_defconfig
View file @ dcf397f0
This diff is collapsed.
arch/sh/configs/shx3_defconfig
View file @ dcf397f0
This diff is collapsed.
arch/sh/drivers/dma/Kconfig
View file @ dcf397f0
......@@ -12,6 +12,7 @@ config SH_DMA
config NR_ONCHIP_DMA_CHANNELS
int
depends on SH_DMA
default "6" if CPU_SUBTYPE_SH7720
default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R
default "12" if CPU_SUBTYPE_SH7780
default "4"
......
arch/sh/drivers/dma/dma-sh.c
View file @ dcf397f0
......@@ -24,13 +24,19 @@ static int dmte_irq_map[] = {
DMTE1_IRQ,
DMTE2_IRQ,
DMTE3_IRQ,
#if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
defined(CONFIG_CPU_SUBTYPE_SH7760) || \
defined(CONFIG_CPU_SUBTYPE_SH7709) || \
defined(CONFIG_CPU_SUBTYPE_SH7780)
DMTE4_IRQ,
DMTE5_IRQ,
#endif
#if defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
defined(CONFIG_CPU_SUBTYPE_SH7760) || \
defined(CONFIG_CPU_SUBTYPE_SH7780)
DMTE6_IRQ,
DMTE7_IRQ,
DMTE7_IRQ,
#endif
};
......@@ -196,7 +202,8 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan)
return ctrl_inl(DMATCR[chan->chan]) << calc_xmit_shift(chan);
}
#ifdef CONFIG_CPU_SUBTYPE_SH7780
#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7780)
#define dmaor_read_reg() ctrl_inw(DMAOR)
#define dmaor_write_reg(data) ctrl_outw(data, DMAOR)
#else
......
arch/sh/drivers/heartbeat.c
View file @ dcf397f0
......@@ -24,24 +24,44 @@
#include <linux/sched.h>
#include <linux/timer.h>
#include <linux/io.h>
#include <asm/heartbeat.h>
#define DRV_NAME "heartbeat"
#define DRV_VERSION "0.1.0"
#define DRV_VERSION "0.1.1"
struct heartbeat_data {
void __iomem *base;
unsigned char bit_pos[8];
struct timer_list timer;
};
static unsigned char default_bit_pos[] = { 0, 1, 2, 3, 4, 5, 6, 7 };
static inline void heartbeat_toggle_bit(struct heartbeat_data *hd,
unsigned bit, unsigned int inverted)
{
unsigned int new;
new = (1 << hd->bit_pos[bit]);
if (inverted)
new = ~new;
switch (hd->regsize) {
case 32:
iowrite32(new, hd->base);
break;
case 16:
iowrite16(new, hd->base);
break;
default:
iowrite8(new, hd->base);
break;
}
}
static void heartbeat_timer(unsigned long data)
{
struct heartbeat_data *hd = (struct heartbeat_data *)data;
static unsigned bit = 0, up = 1;
ctrl_outw(1 << hd->bit_pos[bit], (unsigned long)hd->base);
heartbeat_toggle_bit(hd, bit, hd->flags & HEARTBEAT_INVERTED);
bit += up;
if ((bit == 0) || (bit == ARRAY_SIZE(hd->bit_pos)-1))
if ((bit == 0) || (bit == (hd->nr_bits)-1))
up = -up;
mod_timer(&hd->timer, jiffies + (110 - ((300 << FSHIFT) /
......@@ -64,21 +84,31 @@ static int heartbeat_drv_probe(struct platform_device *pdev)
return -EINVAL;
}
hd = kmalloc(sizeof(struct heartbeat_data), GFP_KERNEL);
if (unlikely(!hd))
return -ENOMEM;
if (pdev->dev.platform_data) {
memcpy(hd->bit_pos, pdev->dev.platform_data,
ARRAY_SIZE(hd->bit_pos));
hd = pdev->dev.platform_data;
} else {
int i;
hd = kzalloc(sizeof(struct heartbeat_data), GFP_KERNEL);
if (unlikely(!hd))
return -ENOMEM;
}
hd->base = ioremap_nocache(res->start, res->end - res->start + 1);
if (!unlikely(hd->base)) {
dev_err(&pdev->dev, "ioremap failed\n");
if (!pdev->dev.platform_data)
kfree(hd);
return -ENXIO;
}
for (i = 0; i < ARRAY_SIZE(hd->bit_pos); i++)
hd->bit_pos[i] = i;
if (!hd->nr_bits) {
hd->bit_pos = default_bit_pos;
hd->nr_bits = ARRAY_SIZE(default_bit_pos);
}
hd->base = (void __iomem *)(unsigned long)res->start;
if (!hd->regsize)
hd->regsize = 8; /* default access size */
setup_timer(&hd->timer, heartbeat_timer, (unsigned long)hd);
platform_set_drvdata(pdev, hd);
......@@ -91,10 +121,12 @@ static int heartbeat_drv_remove(struct platform_device *pdev)
struct heartbeat_data *hd = platform_get_drvdata(pdev);
del_timer_sync(&hd->timer);
iounmap(hd->base);
platform_set_drvdata(pdev, NULL);
kfree(hd);
if (!pdev->dev.platform_data)
kfree(hd);
return 0;
}
......
arch/sh/drivers/pci/ops-rts7751r2d.c
View file @ dcf397f0
......@@ -19,10 +19,10 @@
#include "pci-sh4.h"
static u8 rts7751r2d_irq_tab[] __initdata = {
IRQ_PCISLOT1,
IRQ_PCISLOT2,
IRQ_PCMCIA,
IRQ_PCIETH,
IRQ_PCI_INTA,
IRQ_PCI_INTB,
IRQ_PCI_INTC,
IRQ_PCI_INTD,
};
int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
......
arch/sh/drivers/pci/pci-sh7780.c
View file @ dcf397f0
......@@ -79,19 +79,6 @@ static int __init sh7780_pci_init(void)
ctrl_outl(0xAAAA0000, INTC_ICR1);
/* INTPRI: priority=3(all) */
ctrl_outl(0x33333333, INTC_INTPRI);
} else {
/* INTC SH-4 Mode */
ctrl_outl(0x00200000, INTC_ICR0);
/* enable PCIINTA - PCIINTD */
ctrl_outl(0x00078000, INTC_INT2MSKCR);
/* disable IRL4-7 Interrupt */
ctrl_outl(0x40000000, INTC_INTMSK1);
/* disable IRL4-7 Interrupt */
ctrl_outl(0x0000fffe, INTC_INTMSK2);
/* enable IRL0-3 Interrupt */
ctrl_outl(0x80000000, INTC_INTMSKCLR1);
/* enable IRL0-3 Interrupt */
ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
}
if ((ret = sh4_pci_check_direct()) != 0)
......
arch/sh/kernel/cpu/clock.c
View file @ dcf397f0
......@@ -83,6 +83,8 @@ static void propagate_rate(struct clk *clk)
continue;
if (likely(clkp->ops && clkp->ops->recalc))
clkp->ops->recalc(clkp);
if (unlikely(clkp->flags & CLK_RATE_PROPAGATES))
propagate_rate(clkp);
}
}
......
arch/sh/kernel/cpu/init.c
View file @ dcf397f0
......@@ -22,6 +22,7 @@
#include <asm/cache.h>
#include <asm/io.h>
#include <asm/ubc.h>
#include <asm/smp.h>
/*
* Generic wrapper for command line arguments to disable on-chip
......@@ -143,12 +144,15 @@ static void __init cache_init(void)
flags &= ~CCR_CACHE_EMODE;
#endif
#ifdef CONFIG_SH_WRITETHROUGH
/* Turn on Write-through caching */
#if defined(CONFIG_CACHE_WRITETHROUGH)
/* Write-through */
flags |= CCR_CACHE_WT;
#else
/* .. or default to Write-back */
#elif defined(CONFIG_CACHE_WRITEBACK)
/* Write-back */
flags |= CCR_CACHE_CB;
#else
/* Off */
flags &= ~CCR_CACHE_ENABLE;
#endif
ctrl_outl(flags, CCR);
......@@ -213,8 +217,11 @@ static void __init dsp_init(void)
* Each processor family is still responsible for doing its own probing
* and cache configuration in detect_cpu_and_cache_system().
*/
asmlinkage void __init sh_cpu_init(void)
asmlinkage void __cpuinit sh_cpu_init(void)
{
current_thread_info()->cpu = hard_smp_processor_id();
/* First, probe the CPU */
detect_cpu_and_cache_system();
......@@ -224,9 +231,10 @@ asmlinkage void __init sh_cpu_init(void)
/* Init the cache */
cache_init();
shm_align_mask = max_t(unsigned long,
current_cpu_data.dcache.way_size - 1,
PAGE_SIZE - 1);
if (raw_smp_processor_id() == 0)
shm_align_mask = max_t(unsigned long,
current_cpu_data.dcache.way_size - 1,
PAGE_SIZE - 1);
/* Disable the FPU */
if (fpu_disabled) {
......@@ -265,6 +273,7 @@ asmlinkage void __init sh_cpu_init(void)
* like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So ..
* we wake it up and hope that all is well.
*/
ubc_wakeup();
if (raw_smp_processor_id() == 0)
ubc_wakeup();
speculative_execution_init();
}
arch/sh/kernel/cpu/irq/Makefile
View file @ dcf397f0
#
# Makefile for the Linux/SuperH CPU-specifc IRQ handlers.
#
obj-y += imask.o
obj-y += imask.o intc.o
obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o
obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o
obj-$(CONFIG_CPU_HAS_INTC_IRQ) += intc.o
obj-$(CONFIG_CPU_HAS_INTC2_IRQ) += intc2.o
arch/sh/kernel/cpu/irq/intc.c
View file @ dcf397f0
This diff is collapsed.
arch/sh/kernel/cpu/irq/intc2.c deleted 100644 → 0
View file @ 6faf035c
/*
* Interrupt handling for INTC2-based IRQ.
*
* Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
* Copyright (C) 2005, 2006 Paul Mundt (lethal@linux-sh.org)
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* These are the "new Hitachi style" interrupts, as present on the
* Hitachi 7751, the STM ST40 STB1, SH7760, and SH7780.
*/
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/smp.h>
static inline struct intc2_desc *get_intc2_desc(unsigned int irq)
{
struct irq_chip *chip = get_irq_chip(irq);
return (void *)((char *)chip - offsetof(struct intc2_desc, chip));
}
static void disable_intc2_irq(unsigned int irq)
{
struct intc2_data *p = get_irq_chip_data(irq);
struct intc2_desc *d = get_intc2_desc(irq);
ctrl_outl(1 << p->msk_shift, d->msk_base + p->msk_offset +
(hard_smp_processor_id() * 4));
}
static void enable_intc2_irq(unsigned int irq)
{
struct intc2_data *p = get_irq_chip_data(irq);
struct intc2_desc *d = get_intc2_desc(irq);
ctrl_outl(1 << p->msk_shift, d->mskclr_base + p->msk_offset +
(hard_smp_processor_id() * 4));
}
/*
* Setup an INTC2 style interrupt.
* NOTE: Unlike IPR interrupts, parameters are not shifted by this code,
* allowing the use of the numbers straight out of the datasheet.
* For example:
* PIO1 which is INTPRI00[19,16] and INTMSK00[13]
* would be: ^ ^ ^ ^
* | | | |
* { 84, 0, 16, 0, 13 },
*
* in the intc2_data table.
*/
void register_intc2_controller(struct intc2_desc *desc)
{
int i;
desc->chip.mask = disable_intc2_irq;
desc->chip.unmask = enable_intc2_irq;
desc->chip.mask_ack = disable_intc2_irq;
for (i = 0; i < desc->nr_irqs; i++) {
unsigned long ipr, flags;
struct intc2_data *p = desc->intc2_data + i;
disable_irq_nosync(p->irq);
if (desc->prio_base) {
/* Set the priority level */
local_irq_save(flags);
ipr = ctrl_inl(desc->prio_base + p->ipr_offset);
ipr &= ~(0xf << p->ipr_shift);
ipr |= p->priority << p->ipr_shift;
ctrl_outl(ipr, desc->prio_base + p->ipr_offset);
local_irq_restore(flags);
}
set_irq_chip_and_handler_name(p->irq, &desc->chip,
handle_level_irq, "level");
set_irq_chip_data(p->irq, p);
disable_intc2_irq(p->irq);
}
}
arch/sh/kernel/cpu/sh2/probe.c
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......@@ -10,26 +10,25 @@
* for more details.
*/
#include <linux/init.h>
#include <linux/smp.h>
#include <asm/processor.h>
#include <asm/cache.h>
int __init detect_cpu_and_cache_system(void)
{
#if defined(CONFIG_CPU_SUBTYPE_SH7619)
current_cpu_data.type = CPU_SH7619;
current_cpu_data.dcache.ways = 4;
current_cpu_data.dcache.way_incr = (1<<12);
current_cpu_data.dcache.sets = 256;
current_cpu_data.dcache.entry_shift = 4;
current_cpu_data.dcache.linesz = L1_CACHE_BYTES;
current_cpu_data.dcache.flags = 0;
boot_cpu_data.type = CPU_SH7619;
boot_cpu_data.dcache.ways = 4;
boot_cpu_data.dcache.way_incr = (1<<12);
boot_cpu_data.dcache.sets = 256;
boot_cpu_data.dcache.entry_shift = 4;
boot_cpu_data.dcache.linesz = L1_CACHE_BYTES;
boot_cpu_data.dcache.flags = 0;
#endif
/*
* SH-2 doesn't have separate caches
*/
current_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
current_cpu_data.icache = current_cpu_data.dcache;
boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED;
boot_cpu_data.icache = boot_cpu_data.dcache;
return 0;
}
......
arch/sh/kernel/cpu/sh2/setup-sh7619.c
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arch/sh/kernel/cpu/sh2a/probe.c
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......@@ -17,15 +17,15 @@
int __init detect_cpu_and_cache_system(void)
{
/* Just SH7206 for now .. */
current_cpu_data.type = CPU_SH7206;
current_cpu_data.flags |= CPU_HAS_OP32;
boot_cpu_data.type = CPU_SH7206;
boot_cpu_data.flags |= CPU_HAS_OP32;
current_cpu_data.dcache.ways = 4;
current_cpu_data.dcache.way_incr = (1 << 11);
current_cpu_data.dcache.sets = 128;
current_cpu_data.dcache.entry_shift = 4;
current_cpu_data.dcache.linesz = L1_CACHE_BYTES;
current_cpu_data.dcache.flags = 0;
boot_cpu_data.dcache.ways = 4;
boot_cpu_data.dcache.way_incr = (1 << 11);
boot_cpu_data.dcache.sets = 128;
boot_cpu_data.dcache.entry_shift = 4;
boot_cpu_data.dcache.linesz = L1_CACHE_BYTES;
boot_cpu_data.dcache.flags = 0;
/*
* The icache is the same as the dcache as far as this setup is
......@@ -33,7 +33,7 @@ int __init detect_cpu_and_cache_system(void)
* lacks the U bit that the dcache has, none of this has any bearing
* on the cache info.
*/
current_cpu_data.icache = current_cpu_data.dcache;
boot_cpu_data.icache = boot_cpu_data.dcache;
return 0;
}
......
arch/sh/kernel/cpu/sh2a/setup-sh7206.c
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arch/sh/kernel/cpu/sh3/Makefile
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......@@ -6,12 +6,13 @@ obj-y := ex.o probe.o entry.o
# CPU subtype setup
obj-$(CONFIG_CPU_SUBTYPE_SH7705) += setup-sh7705.o
obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh7708.o
obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh7709.o
obj-$(CONFIG_CPU_SUBTYPE_SH7706) += setup-sh770x.o
obj-$(CONFIG_CPU_SUBTYPE_SH7707) += setup-sh770x.o
obj-$(CONFIG_CPU_SUBTYPE_SH7708) += setup-sh770x.o
obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh770x.o
obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o
obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o
obj-$(CONFIG_CPU_SUBTYPE_SH7720) += setup-sh7720.o
# Primary on-chip clocks (common)
clock-$(CONFIG_CPU_SH3) := clock-sh3.o
......@@ -19,5 +20,6 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7705) := clock-sh7705.o
clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o
clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o
clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7710.o
clock-$(CONFIG_CPU_SUBTYPE_SH7720) := clock-sh7710.o
obj-y += $(clock-y)
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