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Commit e4c93c81 authored by Dhananjay Phadke's avatar Dhananjay Phadke Committed by Jeff Garzik
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netxen: add defs for new chip/boards 

Add macros for new chip revision and board configurations.
Signed-off-by: default avatarDhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: default avatarJeff Garzik <jgarzik@redhat.com>
parent 623621b0
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Showing with 331 additions and 70 deletions
drivers/net/netxen/netxen_nic.h
View file @ e4c93c81
......@@ -111,6 +111,13 @@
#define NX_P2_C0 0x24
#define NX_P2_C1 0x25
#define NX_P3_A0 0x30
#define NX_P3_A2 0x30
#define NX_P3_B0 0x40
#define NX_P3_B1 0x41
#define NX_IS_REVISION_P2(REVISION) (REVISION <= NX_P2_C1)
#define NX_IS_REVISION_P3(REVISION) (REVISION >= NX_P3_A0)
#define FIRST_PAGE_GROUP_START 0
#define FIRST_PAGE_GROUP_END 0x100000
......@@ -125,6 +132,15 @@
#define SECOND_PAGE_GROUP_SIZE SECOND_PAGE_GROUP_END - SECOND_PAGE_GROUP_START
#define THIRD_PAGE_GROUP_SIZE THIRD_PAGE_GROUP_END - THIRD_PAGE_GROUP_START
#define P2_MAX_MTU (8000)
#define P3_MAX_MTU (9600)
#define NX_ETHERMTU 1500
#define NX_MAX_ETHERHDR 32 /* This contains some padding */
#define NX_RX_NORMAL_BUF_MAX_LEN (NX_MAX_ETHERHDR + NX_ETHERMTU)
#define NX_P2_RX_JUMBO_BUF_MAX_LEN (NX_MAX_ETHERHDR + P2_MAX_MTU)
#define NX_P3_RX_JUMBO_BUF_MAX_LEN (NX_MAX_ETHERHDR + P3_MAX_MTU)
#define MAX_RX_BUFFER_LENGTH 1760
#define MAX_RX_JUMBO_BUFFER_LENGTH 8062
#define MAX_RX_LRO_BUFFER_LENGTH ((48*1024)-512)
......@@ -139,16 +155,16 @@
#define MAX_RING_CTX 1
/* Opcodes to be used with the commands */
enum {
TX_ETHER_PKT = 0x01,
/* The following opcodes are for IP checksum */
TX_TCP_PKT,
TX_UDP_PKT,
TX_IP_PKT,
TX_TCP_LSO,
TX_IPSEC,
TX_IPSEC_CMD
};
#define TX_ETHER_PKT 0x01
#define TX_TCP_PKT 0x02
#define TX_UDP_PKT 0x03
#define TX_IP_PKT 0x04
#define TX_TCP_LSO 0x05
#define TX_TCP_LSO6 0x06
#define TX_IPSEC 0x07
#define TX_IPSEC_CMD 0x0a
#define TX_TCPV6_PKT 0x0b
#define TX_UDPV6_PKT 0x0c
/* The following opcodes are for internal consumption. */
#define NETXEN_CONTROL_OP 0x10
......@@ -190,6 +206,7 @@ enum {
#define MAX_RCV_DESCRIPTORS 16384
#define MAX_CMD_DESCRIPTORS_HOST (MAX_CMD_DESCRIPTORS / 4)
#define MAX_RCV_DESCRIPTORS_1G (MAX_RCV_DESCRIPTORS / 4)
#define MAX_RCV_DESCRIPTORS_10G 8192
#define MAX_JUMBO_RCV_DESCRIPTORS 1024
#define MAX_LRO_RCV_DESCRIPTORS 64
#define MAX_RCVSTATUS_DESCRIPTORS MAX_RCV_DESCRIPTORS
......@@ -461,7 +478,20 @@ typedef enum {
NETXEN_BRDTYPE_P2_SB31_10G_IMEZ = 0x000d,
NETXEN_BRDTYPE_P2_SB31_10G_HMEZ = 0x000e,
NETXEN_BRDTYPE_P2_SB31_10G_CX4 = 0x000f
NETXEN_BRDTYPE_P2_SB31_10G_CX4 = 0x000f,
NETXEN_BRDTYPE_P3_REF_QG = 0x0021,
NETXEN_BRDTYPE_P3_HMEZ = 0x0022,
NETXEN_BRDTYPE_P3_10G_CX4_LP = 0x0023,
NETXEN_BRDTYPE_P3_4_GB = 0x0024,
NETXEN_BRDTYPE_P3_IMEZ = 0x0025,
NETXEN_BRDTYPE_P3_10G_SFP_PLUS = 0x0026,
NETXEN_BRDTYPE_P3_10000_BASE_T = 0x0027,
NETXEN_BRDTYPE_P3_XG_LOM = 0x0028,
NETXEN_BRDTYPE_P3_4_GB_MM = 0x0029,
NETXEN_BRDTYPE_P3_10G_CX4 = 0x0031,
NETXEN_BRDTYPE_P3_10G_XFP = 0x0032
} netxen_brdtype_t;
typedef enum {
......@@ -1049,7 +1079,7 @@ struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev);
* NetXen Board information
*/
#define NETXEN_MAX_SHORT_NAME 16
#define NETXEN_MAX_SHORT_NAME 32
struct netxen_brdinfo {
netxen_brdtype_t brdtype; /* type of board */
long ports; /* max no of physical ports */
......@@ -1063,6 +1093,17 @@ static const struct netxen_brdinfo netxen_boards[] = {
{NETXEN_BRDTYPE_P2_SB31_10G, 1, "XGb XFP"},
{NETXEN_BRDTYPE_P2_SB35_4G, 4, "Quad Gb"},
{NETXEN_BRDTYPE_P2_SB31_2G, 2, "Dual Gb"},
{NETXEN_BRDTYPE_P3_REF_QG, 4, "Reference Quad Gig "},
{NETXEN_BRDTYPE_P3_HMEZ, 2, "Dual XGb HMEZ"},
{NETXEN_BRDTYPE_P3_10G_CX4_LP, 2, "Dual XGb CX4 LP"},
{NETXEN_BRDTYPE_P3_4_GB, 4, "Quad Gig LP"},
{NETXEN_BRDTYPE_P3_IMEZ, 2, "Dual XGb IMEZ"},
{NETXEN_BRDTYPE_P3_10G_SFP_PLUS, 2, "Dual XGb SFP+ LP"},
{NETXEN_BRDTYPE_P3_10000_BASE_T, 1, "XGB 10G BaseT LP"},
{NETXEN_BRDTYPE_P3_XG_LOM, 2, "Dual XGb LOM"},
{NETXEN_BRDTYPE_P3_4_GB_MM, 4, "Quad GB - March Madness"},
{NETXEN_BRDTYPE_P3_10G_CX4, 2, "Reference Dual CX4 Option"},
{NETXEN_BRDTYPE_P3_10G_XFP, 1, "Reference Single XFP Option"}
};
#define NUM_SUPPORTED_BOARDS ARRAY_SIZE(netxen_boards)
......
drivers/net/netxen/netxen_nic_ethtool.c
View file @ e4c93c81
......@@ -159,9 +159,16 @@ netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
switch ((netxen_brdtype_t) boardinfo->board_type) {
case NETXEN_BRDTYPE_P2_SB35_4G:
case NETXEN_BRDTYPE_P2_SB31_2G:
case NETXEN_BRDTYPE_P3_REF_QG:
case NETXEN_BRDTYPE_P3_4_GB:
case NETXEN_BRDTYPE_P3_4_GB_MM:
case NETXEN_BRDTYPE_P3_10000_BASE_T:
ecmd->supported |= SUPPORTED_Autoneg;
ecmd->advertising |= ADVERTISED_Autoneg;
case NETXEN_BRDTYPE_P2_SB31_10G_CX4:
case NETXEN_BRDTYPE_P3_10G_CX4:
case NETXEN_BRDTYPE_P3_10G_CX4_LP:
ecmd->supported |= SUPPORTED_TP;
ecmd->advertising |= ADVERTISED_TP;
ecmd->port = PORT_TP;
......@@ -171,12 +178,17 @@ netxen_nic_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
break;
case NETXEN_BRDTYPE_P2_SB31_10G_HMEZ:
case NETXEN_BRDTYPE_P2_SB31_10G_IMEZ:
case NETXEN_BRDTYPE_P3_IMEZ:
case NETXEN_BRDTYPE_P3_XG_LOM:
case NETXEN_BRDTYPE_P3_HMEZ:
ecmd->supported |= SUPPORTED_MII;
ecmd->advertising |= ADVERTISED_MII;
ecmd->port = PORT_FIBRE;
ecmd->autoneg = AUTONEG_DISABLE;
break;
case NETXEN_BRDTYPE_P2_SB31_10G:
case NETXEN_BRDTYPE_P3_10G_SFP_PLUS:
case NETXEN_BRDTYPE_P3_10G_XFP:
ecmd->supported |= SUPPORTED_FIBRE;
ecmd->advertising |= ADVERTISED_FIBRE;
ecmd->port = PORT_FIBRE;
......
drivers/net/netxen/netxen_nic_hdr.h
View file @ e4c93c81
This diff is collapsed.
drivers/net/netxen/netxen_nic_hw.c
View file @ e4c93c81
......@@ -609,33 +609,10 @@ void netxen_nic_pci_change_crbwindow(struct netxen_adapter *adapter, u32 wndw)
void __iomem *offset;
u32 tmp;
int count = 0;
uint8_t func = adapter->ahw.pci_func;
if (adapter->curr_window == wndw)
return;
switch(adapter->ahw.pci_func) {
case 0:
offset = PCI_OFFSET_SECOND_RANGE(adapter,
NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW));
break;
case 1:
offset = PCI_OFFSET_SECOND_RANGE(adapter,
NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW_F1));
break;
case 2:
offset = PCI_OFFSET_SECOND_RANGE(adapter,
NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW_F2));
break;
case 3:
offset = PCI_OFFSET_SECOND_RANGE(adapter,
NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW_F3));
break;
default:
printk(KERN_INFO "Changing the window for PCI function "
"%d\n", adapter->ahw.pci_func);
offset = PCI_OFFSET_SECOND_RANGE(adapter,
NETXEN_PCIX_PH_REG(PCIX_CRB_WINDOW));
break;
}
/*
* Move the CRB window.
* We need to write to the "direct access" region of PCI
......@@ -644,6 +621,8 @@ void netxen_nic_pci_change_crbwindow(struct netxen_adapter *adapter, u32 wndw)
* register address is received by PCI. The direct region bypasses
* the CRB bus.
*/
offset = PCI_OFFSET_SECOND_RANGE(adapter,
NETXEN_PCIX_PH_REG(PCIE_CRB_WINDOW_REG(func)));
if (wndw & 0x1)
wndw = NETXEN_WINDOW_ONE;
......@@ -857,9 +836,11 @@ static int netxen_pci_set_window_warning_count;
static unsigned long netxen_nic_pci_set_window(struct netxen_adapter *adapter,
unsigned long long addr)
{
void __iomem *offset;
static int ddr_mn_window = -1;
static int qdr_sn_window = -1;
int window;
uint8_t func = adapter->ahw.pci_func;
if (ADDR_IN_RANGE(addr, NETXEN_ADDR_DDR_NET, NETXEN_ADDR_DDR_NET_MAX)) {
/* DDR network side */
......@@ -867,13 +848,11 @@ static unsigned long netxen_nic_pci_set_window(struct netxen_adapter *adapter,
window = (addr >> 25) & 0x3ff;
if (ddr_mn_window != window) {
ddr_mn_window = window;
writel(window, PCI_OFFSET_SECOND_RANGE(adapter,
NETXEN_PCIX_PH_REG
(PCIX_MN_WINDOW(adapter->ahw.pci_func))));
offset = PCI_OFFSET_SECOND_RANGE(adapter,
NETXEN_PCIX_PH_REG(PCIE_MN_WINDOW_REG(func)));
writel(window, offset);
/* MUST make sure window is set before we forge on... */
readl(PCI_OFFSET_SECOND_RANGE(adapter,
NETXEN_PCIX_PH_REG
(PCIX_MN_WINDOW(adapter->ahw.pci_func))));
readl(offset);
}
addr -= (window * NETXEN_WINDOW_ONE);
addr += NETXEN_PCI_DDR_NET;
......@@ -885,20 +864,17 @@ static unsigned long netxen_nic_pci_set_window(struct netxen_adapter *adapter,
addr += NETXEN_PCI_OCM1;
} else
if (ADDR_IN_RANGE
(addr, NETXEN_ADDR_QDR_NET, NETXEN_ADDR_QDR_NET_MAX)) {
(addr, NETXEN_ADDR_QDR_NET, NETXEN_ADDR_QDR_NET_MAX_P2)) {
/* QDR network side */
addr -= NETXEN_ADDR_QDR_NET;
window = (addr >> 22) & 0x3f;
if (qdr_sn_window != window) {
qdr_sn_window = window;
writel((window << 22),
PCI_OFFSET_SECOND_RANGE(adapter,
NETXEN_PCIX_PH_REG
(PCIX_SN_WINDOW(adapter->ahw.pci_func))));
offset = PCI_OFFSET_SECOND_RANGE(adapter,
NETXEN_PCIX_PH_REG(PCIE_SN_WINDOW_REG(func)));
writel((window << 22), offset);
/* MUST make sure window is set before we forge on... */
readl(PCI_OFFSET_SECOND_RANGE(adapter,
NETXEN_PCIX_PH_REG
(PCIX_SN_WINDOW(adapter->ahw.pci_func))));
readl(offset);
}
addr -= (window * 0x400000);
addr += NETXEN_PCI_QDR_NET;
......@@ -972,12 +948,25 @@ int netxen_nic_get_board_info(struct netxen_adapter *adapter)
case NETXEN_BRDTYPE_P2_SB31_10G_IMEZ:
case NETXEN_BRDTYPE_P2_SB31_10G_HMEZ:
case NETXEN_BRDTYPE_P2_SB31_10G_CX4:
case NETXEN_BRDTYPE_P3_HMEZ:
case NETXEN_BRDTYPE_P3_XG_LOM:
case NETXEN_BRDTYPE_P3_10G_CX4:
case NETXEN_BRDTYPE_P3_10G_CX4_LP:
case NETXEN_BRDTYPE_P3_IMEZ:
case NETXEN_BRDTYPE_P3_10G_SFP_PLUS:
case NETXEN_BRDTYPE_P3_10G_XFP:
case NETXEN_BRDTYPE_P3_10000_BASE_T:
adapter->ahw.board_type = NETXEN_NIC_XGBE;
break;
case NETXEN_BRDTYPE_P1_BD:
case NETXEN_BRDTYPE_P1_SB:
case NETXEN_BRDTYPE_P1_SMAX:
case NETXEN_BRDTYPE_P1_SOCK:
case NETXEN_BRDTYPE_P3_REF_QG:
case NETXEN_BRDTYPE_P3_4_GB:
case NETXEN_BRDTYPE_P3_4_GB_MM:
adapter->ahw.board_type = NETXEN_NIC_GBE;
break;
default:
......
drivers/net/netxen/netxen_nic_init.c
View file @ e4c93c81
......@@ -115,6 +115,8 @@ static void crb_addr_transform_setup(void)
crb_addr_transform(C2C1);
crb_addr_transform(C2C0);
crb_addr_transform(SMB);
crb_addr_transform(OCM0);
crb_addr_transform(I2C0);
}
int netxen_init_firmware(struct netxen_adapter *adapter)
......@@ -743,7 +745,6 @@ int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
NETXEN_ROMBUS_RESET);
if (verbose) {
int val;
if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
printk("P2 ROM board type: 0x%08x\n", val);
else
......
drivers/net/netxen/netxen_nic_main.c
View file @ e4c93c81
......@@ -83,6 +83,7 @@ static struct pci_device_id netxen_pci_tbl[] __devinitdata = {
ENTRY(0x0005),
ENTRY(0x0024),
ENTRY(0x0025),
ENTRY(0x0100),
{0,}
};
......@@ -526,7 +527,6 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
adapter->crb_addr_cmd_consumer = crb_cmd_consumer[adapter->portnum];
netxen_nic_update_cmd_producer(adapter, 0);
netxen_nic_update_cmd_consumer(adapter, 0);
writel(0, NETXEN_CRB_NORMALIZE(adapter, CRB_HOST_CMD_ADDR_LO));
if (netxen_is_flash_supported(adapter) == 0 &&
netxen_get_flash_mac_addr(adapter, mac_addr) == 0)
......@@ -1099,7 +1099,7 @@ netxen_handle_int(struct netxen_adapter *adapter)
napi_schedule(&adapter->napi);
}
irqreturn_t netxen_intr(int irq, void *data)
static irqreturn_t netxen_intr(int irq, void *data)
{
struct netxen_adapter *adapter = data;
u32 our_int = 0;
......@@ -1120,7 +1120,7 @@ irqreturn_t netxen_intr(int irq, void *data)
return IRQ_HANDLED;
}
irqreturn_t netxen_msi_intr(int irq, void *data)
static irqreturn_t netxen_msi_intr(int irq, void *data)
{
struct netxen_adapter *adapter = data;
......
drivers/net/netxen/netxen_nic_phan_reg.h
View file @ e4c93c81
......@@ -42,8 +42,11 @@
#define CRB_CMD_CONSUMER_OFFSET NETXEN_NIC_REG(0x0c)
#define CRB_PAUSE_ADDR_LO NETXEN_NIC_REG(0x10) /* C0 EPG BUG */
#define CRB_PAUSE_ADDR_HI NETXEN_NIC_REG(0x14)
#define CRB_HOST_CMD_ADDR_HI NETXEN_NIC_REG(0x18) /* host add:cmd ring */
#define CRB_HOST_CMD_ADDR_LO NETXEN_NIC_REG(0x1c)
#define NX_CDRP_CRB_OFFSET NETXEN_NIC_REG(0x18)
#define NX_ARG1_CRB_OFFSET NETXEN_NIC_REG(0x1c)
#define NX_ARG2_CRB_OFFSET NETXEN_NIC_REG(0x20)
#define NX_ARG3_CRB_OFFSET NETXEN_NIC_REG(0x24)
#define NX_SIGN_CRB_OFFSET NETXEN_NIC_REG(0x28)
#define CRB_CMD_INTR_LOOP NETXEN_NIC_REG(0x20) /* 4 regs for perf */
#define CRB_CMD_DMA_LOOP NETXEN_NIC_REG(0x24)
#define CRB_RCV_INTR_LOOP NETXEN_NIC_REG(0x28)
......@@ -97,6 +100,7 @@
#define CRB_HOST_BUFFER_CONS NETXEN_NIC_REG(0xf0)
#define CRB_JUMBO_BUFFER_PROD NETXEN_NIC_REG(0xf4)
#define CRB_JUMBO_BUFFER_CONS NETXEN_NIC_REG(0xf8)
#define CRB_HOST_DUMMY_BUF NETXEN_NIC_REG(0xfc)
#define CRB_RCVPEG_STATE NETXEN_NIC_REG(0x13c)
#define CRB_CMD_PRODUCER_OFFSET_1 NETXEN_NIC_REG(0x1ac)
......
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