Commit e78a0b7a authored by Andrew Morton's avatar Andrew Morton Committed by Linus Torvalds

[PATCH] sh: various fixes

From: Paul Mundt <lethal@linux-sh.org>

This is the rest of the sh update, which includes everything else
sh-specific, general cleanups, bugfixes, etc.  Nothing really eventful.
parent 7cb3c483
This diff is collapsed.
......@@ -21,29 +21,33 @@
#include <asm/irq.h>
struct sh_machine_vector mv_hp680 __initmv = {
.mv_nr_irqs = HD64461_IRQBASE+HD64461_IRQ_NUM,
.mv_inb = hd64461_inb,
.mv_inw = hd64461_inw,
.mv_inl = hd64461_inl,
.mv_outb = hd64461_outb,
.mv_outw = hd64461_outw,
.mv_outl = hd64461_outl,
.mv_inb_p = hd64461_inb_p,
.mv_inw_p = hd64461_inw,
.mv_inl_p = hd64461_inl,
.mv_outb_p = hd64461_outb_p,
.mv_outw_p = hd64461_outw,
.mv_outl_p = hd64461_outl,
.mv_insb = hd64461_insb,
.mv_insw = hd64461_insw,
.mv_insl = hd64461_insl,
.mv_outsb = hd64461_outsb,
.mv_outsw = hd64461_outsw,
.mv_outsl = hd64461_outsl,
.mv_irq_demux = hd64461_irq_demux,
.mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM,
.mv_inb = hd64461_inb,
.mv_inw = hd64461_inw,
.mv_inl = hd64461_inl,
.mv_outb = hd64461_outb,
.mv_outw = hd64461_outw,
.mv_outl = hd64461_outl,
.mv_inb_p = hd64461_inb_p,
.mv_inw_p = hd64461_inw,
.mv_inl_p = hd64461_inl,
.mv_outb_p = hd64461_outb_p,
.mv_outw_p = hd64461_outw,
.mv_outl_p = hd64461_outl,
.mv_insb = hd64461_insb,
.mv_insw = hd64461_insw,
.mv_insl = hd64461_insl,
.mv_outsb = hd64461_outsb,
.mv_outsw = hd64461_outsw,
.mv_outsl = hd64461_outsl,
.mv_readw = hd64461_readw,
.mv_writew = hd64461_writew,
.mv_irq_demux = hd64461_irq_demux,
};
ALIAS_MV(hp680)
......@@ -12,6 +12,9 @@
#include <linux/config.h>
#include <linux/init.h>
#include <asm/hd64461/hd64461.h>
#include <asm/io.h>
#include <asm/hp6xx/hp6xx.h>
#include <asm/cpu/dac.h>
const char *get_system_type(void)
{
......@@ -20,8 +23,19 @@ const char *get_system_type(void)
int __init platform_setup(void)
{
__set_io_port_base(CONFIG_HD64461_IOBASE - HD64461_STBCR);
u16 v;
v = inw(HD64461_STBCR);
v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST |
HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST |
HD64461_STBCR_SAFEST | HD64461_STBCR_SPC0ST |
HD64461_STBCR_SMIAST | HD64461_STBCR_SAFECKE_OST |
HD64461_STBCR_SAFECKE_IST;
outw(v, HD64461_STBCR);
v = inw(HD64461_GPADR);
v |= HD64461_GPADR_SPEAKER | HD64461_GPADR_PCMCIA0;
outw(v, HD64461_GPADR);
sh_dac_disable(DAC_SPEAKER_VOLUME);
return 0;
}
/* $Id: io.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
/* $Id: io.c,v 1.5 2004/02/22 23:08:43 kkojima Exp $
*
* linux/arch/sh/kernel/io_se.c
*
......@@ -134,25 +134,27 @@ void se_outl(unsigned int value, unsigned long port)
void se_insb(unsigned long port, void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
__u8 *ap = addr;
if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) {
volatile __u8 *bp = (__u8 *) (sh_pcic_io_wbase + 0x40000 + port);
while (count--)
*((__u8 *) addr)++ = *bp;
*ap++ = *bp;
} else if (shifted_port(port)) {
while (count--)
*((__u8 *) addr)++ = *p >> 8;
*ap++ = *p >> 8;
} else {
while (count--)
*((__u8 *) addr)++ = *p;
*ap++ = *p;
}
}
void se_insw(unsigned long port, void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
__u16 *ap = addr;
while (count--)
*((__u16 *) addr)++ = *p;
*ap++ = *p;
}
void se_insl(unsigned long port, void *addr, unsigned long count)
......@@ -163,25 +165,27 @@ void se_insl(unsigned long port, void *addr, unsigned long count)
void se_outsb(unsigned long port, const void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
const __u8 *ap = addr;
if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) {
volatile __u8 *bp = (__u8 *) (sh_pcic_io_wbase + port);
while (count--)
*bp = *((__u8 *) addr)++;
*bp = *ap++;
} else if (shifted_port(port)) {
while (count--)
*p = *((__u8 *) addr)++ << 8;
*p = *ap++ << 8;
} else {
while (count--)
*p = *((__u8 *) addr)++;
*p = *ap++;
}
}
void se_outsw(unsigned long port, const void *addr, unsigned long count)
{
volatile __u16 *p = port2adr(port);
const __u16 *ap = addr;
while (count--)
*p = *((__u16 *) addr)++;
*p = *ap++;
}
void se_outsl(unsigned long port, const void *addr, unsigned long count)
......
/* $Id: irq.c,v 1.1.2.2 2002/10/29 00:56:09 lethal Exp $
/* $Id: irq.c,v 1.4 2004/02/22 22:44:36 kkojima Exp $
*
* linux/arch/sh/boards/se/770x/irq.c
*
......@@ -12,7 +12,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/hitachi_se.h>
#include <asm/se/se.h>
/*
* Initialize IRQ setting
......
menu "Companion Chips"
# A board must have defined HD6446X_SERIES in order to see these
config HD6446X_SERIES
bool "HD6446x support"
default n
choice
prompt "HD6446x options"
depends HD6446X_SERIES
depends on HD6446X_SERIES
default HD64461
config HD64461
......@@ -73,4 +79,5 @@ config HD64465_IRQ
Do not change this unless you know what you are doing.
endmenu
/*
* $Id: io.c,v 1.5 2004/02/01 19:46:04 lethal Exp $
* $Id: io.c,v 1.6 2004/03/16 00:07:50 lethal Exp $
* Copyright (C) 2000 YAEGASHI Takeshi
* Typical I/O routines for HD64461 system.
*/
......@@ -8,6 +8,8 @@
#include <asm/io.h>
#include <asm/hd64461/hd64461.h>
#define MEM_BASE (CONFIG_HD64461_IOBASE - HD64461_STBCR)
static __inline__ unsigned long PORT2ADDR(unsigned long port)
{
/* 16550A: HD64461 internal */
......@@ -36,7 +38,9 @@ static __inline__ unsigned long PORT2ADDR(unsigned long port)
#endif
/* ??? */
if (port < 0x10000) return 0xa0000000 + port;
if (port < 0xf000) return 0xa0000000 + port;
/* PCMCIA channel 0, I/O (0xba000000) */
if (port < 0x10000) return 0xba000000 + port - 0xf000;
/* HD64461 internal devices (0xb0000000) */
if (port < 0x20000) return CONFIG_HD64461_IOBASE + port - 0x10000;
......@@ -140,3 +144,14 @@ void hd64461_outsl(unsigned long port, const void *buffer, unsigned long count)
const unsigned long *buf=buffer;
while(count--) *addr=*buf++;
}
unsigned short hd64461_readw(unsigned long addr)
{
return *(volatile unsigned short*)(MEM_BASE+addr);
}
void hd64461_writew(unsigned short b, unsigned long addr)
{
*(volatile unsigned short*)(MEM_BASE+addr) = b;
}
/*
* $Id: setup.c,v 1.4 2003/08/03 03:05:10 lethal Exp $
* $Id: setup.c,v 1.5 2004/03/16 00:07:50 lethal Exp $
* Copyright (C) 2000 YAEGASHI Takeshi
* Hitachi HD64461 companion chip support
*/
#include <linux/config.h>
#include <linux/sched.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/interrupt.h>
......@@ -30,7 +31,6 @@ static void disable_hd64461_irq(unsigned int irq)
local_irq_restore(flags);
}
static void enable_hd64461_irq(unsigned int irq)
{
unsigned long flags;
......@@ -44,7 +44,6 @@ static void enable_hd64461_irq(unsigned int irq)
local_irq_restore(flags);
}
static void mask_and_ack_hd64461(unsigned int irq)
{
disable_hd64461_irq(irq);
......@@ -54,27 +53,23 @@ static void mask_and_ack_hd64461(unsigned int irq)
#endif
}
static void end_hd64461_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_hd64461_irq(irq);
}
static unsigned int startup_hd64461_irq(unsigned int irq)
{
{
enable_hd64461_irq(irq);
return 0;
}
static void shutdown_hd64461_irq(unsigned int irq)
{
disable_hd64461_irq(irq);
}
static struct hw_interrupt_type hd64461_irq_type = {
.typename = "HD64461-IRQ",
.startup = startup_hd64461_irq,
......@@ -85,7 +80,6 @@ static struct hw_interrupt_type hd64461_irq_type = {
.end = end_hd64461_irq,
};
static irqreturn_t hd64461_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
printk(KERN_INFO
......@@ -95,23 +89,52 @@ static irqreturn_t hd64461_interrupt(int irq, void *dev_id, struct pt_regs *regs
return IRQ_NONE;
}
static struct {
int (*func) (int, void *);
void *dev;
} hd64461_demux[HD64461_IRQ_NUM];
void hd64461_register_irq_demux(int irq,
int (*demux) (int irq, void *dev), void *dev)
{
hd64461_demux[irq - HD64461_IRQBASE].func = demux;
hd64461_demux[irq - HD64461_IRQBASE].dev = dev;
}
EXPORT_SYMBOL(hd64461_register_irq_demux);
void hd64461_unregister_irq_demux(int irq)
{
hd64461_demux[irq - HD64461_IRQBASE].func = 0;
}
EXPORT_SYMBOL(hd64461_unregister_irq_demux);
int hd64461_irq_demux(int irq)
{
if (irq == CONFIG_HD64461_IRQ) {
unsigned short bit;
unsigned short nirr = inw(HD64461_NIRR);
unsigned short nimr = inw(HD64461_NIMR);
int i;
nirr &= ~nimr;
for (bit = 1, irq = 0; irq < 16; bit <<= 1, irq++)
if (nirr & bit) break;
if (irq == 16) irq = CONFIG_HD64461_IRQ;
else irq += HD64461_IRQBASE;
for (bit = 1, i = 0; i < 16; bit <<= 1, i++)
if (nirr & bit)
break;
if (i == 16)
irq = CONFIG_HD64461_IRQ;
else {
irq = HD64461_IRQBASE + i;
if (hd64461_demux[i].func != 0) {
irq = hd64461_demux[i].func(irq, hd64461_demux[i].dev);
}
}
}
return __irq_demux(irq);
}
static struct irqaction irq0 = { hd64461_interrupt, SA_INTERRUPT, 0, "HD64461", NULL, NULL};
static struct irqaction irq0 = { hd64461_interrupt, SA_INTERRUPT, 0, "HD64461", NULL, NULL };
int __init setup_hd64461(void)
{
......@@ -120,11 +143,12 @@ int __init setup_hd64461(void)
if (!MACH_HD64461)
return 0;
printk(KERN_INFO "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
CONFIG_HD64461_IOBASE, CONFIG_HD64461_IRQ,
HD64461_IRQBASE, HD64461_IRQBASE+15);
printk(KERN_INFO
"HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
CONFIG_HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
HD64461_IRQBASE + 15);
#if defined(CONFIG_CPU_SUBTYPE_SH7709) /* Should be at processor specific part.. */
#if defined(CONFIG_CPU_SUBTYPE_SH7709) /* Should be at processor specific part.. */
outw(0x2240, INTC_ICR1);
#endif
outw(0xffff, HD64461_NIMR);
......
/* $Id: cf-enabler.c,v 1.3 2003/05/04 19:29:52 lethal Exp $
/* $Id: cf-enabler.c,v 1.4 2004/02/22 22:44:36 kkojima Exp $
*
* linux/drivers/block/cf-enabler.c
*
......@@ -88,7 +88,7 @@ static int __init cf_init_default(void)
}
#if defined(CONFIG_SH_SOLUTION_ENGINE)
#include <asm/hitachi_se.h>
#include <asm/se/se.h>
/*
* SolutionEngine
......
......@@ -196,6 +196,7 @@ void __init init_IRQ(void)
#endif
make_ipr_irq(TIMER_IRQ, TIMER_IPR_ADDR, TIMER_IPR_POS, TIMER_PRIORITY);
make_ipr_irq(TIMER1_IRQ, TIMER1_IPR_ADDR, TIMER1_IPR_POS, TIMER1_PRIORITY);
make_ipr_irq(RTC_IRQ, RTC_IPR_ADDR, RTC_IPR_POS, RTC_PRIORITY);
#ifdef SCI_ERI_IRQ
......
......@@ -3,13 +3,13 @@
*
* General management API for SH-4 integrated Store Queues
*
* Copyright (C) 2001, 2002, 2003 Paul Mundt
* Copyright (C) 2001, 2002, 2003, 2004 Paul Mundt
* Copyright (C) 2001, 2002 M. R. Brown
*
* Some of this code has been adopted directly from the old arch/sh/mm/sq.c
* hack that was part of the LinuxDC project. For all intensive purposes, this
* is a completely new interface that really doesn't have much in common with
* the old zone-based approach at all. Infact, I'm only listing it here for
* hack that was part of the LinuxDC project. For all intents and purposes,
* this is a completely new interface that really doesn't have much in common
* with the old zone-based approach at all. In fact, it's only listed here for
* general completeness.
*
* This file is subject to the terms and conditions of the GNU General Public
......@@ -24,6 +24,7 @@
#include <linux/list.h>
#include <linux/proc_fs.h>
#include <linux/miscdevice.h>
#include <linux/vmalloc.h>
#include <asm/io.h>
#include <asm/page.h>
......@@ -31,6 +32,9 @@
#include <asm/cpu/sq.h>
static LIST_HEAD(sq_mapping_list);
static spinlock_t sq_mapping_lock = SPIN_LOCK_UNLOCKED;
extern struct vm_struct *__get_vm_area(unsigned long size, unsigned long flags, unsigned long start, unsigned long end);
/**
* sq_flush - Flush (prefetch) the store queue cache
......@@ -42,7 +46,7 @@ static LIST_HEAD(sq_mapping_list);
*/
inline void sq_flush(void *addr)
{
__asm__ __volatile__ ("pref @%0": "=r" (addr) : : "memory");
__asm__ __volatile__ ("pref @%0" : : "r" (addr) : "memory");
}
/**
......@@ -57,13 +61,17 @@ inline void sq_flush(void *addr)
void sq_flush_range(unsigned long start, unsigned int len)
{
volatile unsigned long *sq = (unsigned long *)start;
unsigned long dummy;
/* Flush the queues */
for (len >>= 5; len--; sq += 8)
sq_flush((void *)sq);
/* Wait for completion */
sq = (volatile unsigned long *)start;
dummy = ctrl_inl(P4SEG_STORE_QUE);
ctrl_outl(0, P4SEG_STORE_QUE + 0);
ctrl_outl(0, P4SEG_STORE_QUE + 8);
}
static struct sq_mapping *__sq_alloc_mapping(unsigned long virt, unsigned long phys, unsigned long size, const char *name)
......@@ -81,7 +89,7 @@ static struct sq_mapping *__sq_alloc_mapping(unsigned long virt, unsigned long p
map->sq_addr = virt;
map->addr = phys;
map->size = size;
map->size = size + 1;
map->name = name;
list_add(&map->list, &sq_mapping_list);
......@@ -128,24 +136,20 @@ static unsigned long __sq_get_next_addr(void)
*/
static struct sq_mapping *__sq_remap(struct sq_mapping *map)
{
/*
* First check the MMU status..
*/
#ifndef CONFIG_MMU
unsigned long flags, pteh, ptel;
struct vm_struct *vma;
pgprot_t pgprot;
/*
* Without an MMU (or with it turned off), this is much more
* straightforward, as we can just load up each queue's QACR with
* the physical address appropriately masked.
*/
ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR0);
ctrl_outl(((map->addr >> 26) << 2) & 0x1c, SQ_QACR1);
#else
unsigned long flags, pteh, ptel;
pgprot_t pgprot;
pgd_t *pgd;
pmd_t *pmd;
pte_t *pte;
#ifdef CONFIG_MMU
/*
* With an MMU on the other hand, things are slightly more involved.
* Namely, we have to have a direct mapping between the SQ addr and
......@@ -161,7 +165,7 @@ static struct sq_mapping *__sq_remap(struct sq_mapping *map)
* We could also probably get by without explicitly setting PTEA, but
* we do it here just for good measure.
*/
local_irq_save(flags);
spin_lock_irqsave(&sq_mapping_lock, flags);
pteh = map->sq_addr;
ctrl_outl((pteh & MMU_VPN_MASK) | get_asid(), MMU_PTEH);
......@@ -177,6 +181,8 @@ static struct sq_mapping *__sq_remap(struct sq_mapping *map)
__asm__ __volatile__ ("ldtlb" : : : "memory");
spin_unlock_irqrestore(&sq_mapping_lock, flags);
/*
* Next, we need to map ourselves in the kernel page table, so that
* future accesses after a TLB flush will be handled when we take a
......@@ -188,31 +194,17 @@ static struct sq_mapping *__sq_remap(struct sq_mapping *map)
* writeout before we hit the TLB flush, we do it anyways. This way
* we at least save ourselves the initial page fault overhead.
*/
pgd = pgd_offset_k(map->sq_addr);
vma = __get_vm_area(map->size, VM_ALLOC, map->sq_addr, SQ_ADDRMAX);
if (!vma)
return ERR_PTR(-ENOMEM);
spin_lock(&init_mm.page_table_lock);
vma->phys_addr = map->addr;
pmd = pmd_alloc(&init_mm, pgd, map->sq_addr);
if (!pmd)
goto out;
pte = pte_alloc_map(&init_mm, pmd, map->sq_addr);
if (!pte)
goto out;
if (!pte_none(*pte)) {
pte_unmap(pte);
goto out;
if (remap_area_pages((unsigned long)vma->addr, vma->phys_addr,
map->size, pgprot_val(pgprot))) {
vunmap(vma->addr);
return NULL;
}
set_pte(pte, mk_pte(phys_to_page(map->addr), pgprot));
pte_unmap(pte);
out:
spin_unlock(&init_mm.page_table_lock);
sq_flush((void *)pteh);
local_irq_restore(flags);
#endif /* CONFIG_MMU */
return map;
......@@ -236,11 +228,20 @@ static struct sq_mapping *__sq_remap(struct sq_mapping *map)
struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *name)
{
struct sq_mapping *map;
unsigned long virt;
unsigned long virt, end;
unsigned int psz;
/* Don't allow wraparound or zero size */
end = phys + size - 1;
if (!size || end < phys)
return NULL;
/* Don't allow anyone to remap normal memory.. */
if (phys < virt_to_phys(high_memory))
return NULL;
phys &= PAGE_MASK;
size = PAGE_ALIGN(end + 1) - phys;
virt = __sq_get_next_addr();
psz = (size + (PAGE_SIZE - 1)) / PAGE_SIZE;
map = __sq_alloc_mapping(virt, phys, size, name);
......@@ -264,30 +265,8 @@ struct sq_mapping *sq_remap(unsigned long phys, unsigned int size, const char *n
*/
void sq_unmap(struct sq_mapping *map)
{
#ifdef CONFIG_MMU
pgd_t *pgd;
pmd_t *pmd;
pte_t *pte;
pgd = pgd_offset_k(map->sq_addr);
pmd = pmd_offset(pgd, map->sq_addr);
if (pmd_none(*pmd))
return;
if (pmd_bad(*pmd)) {
pmd_ERROR(*pmd);
pmd_clear(pmd);
return;
}
pte = pte_offset_kernel(pmd, map->sq_addr);
if (pte_none(*pte) || pte_not_present(*pte))
return;
ptep_get_and_clear(pte);
__flush_tlb_page(get_asid(), map->sq_addr & PAGE_MASK);
#endif
if (map->sq_addr > (unsigned long)high_memory)
vfree((void *)(map->sq_addr & PAGE_MASK));
list_del(&map->list);
kfree(map);
......@@ -475,6 +454,7 @@ module_exit(sq_api_exit);
MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>");
MODULE_DESCRIPTION("Simple API for SH-4 integrated Store Queues");
MODULE_LICENSE("GPL");
MODULE_ALIAS_MISCDEV(STORE_QUEUE_MINOR);
EXPORT_SYMBOL(sq_remap);
EXPORT_SYMBOL(sq_unmap);
......
/* $Id: entry.S,v 1.34 2004/01/13 05:52:11 kkojima Exp $
/* $Id: entry.S,v 1.35 2004/02/21 14:45:47 lethal Exp $
*
* linux/arch/sh/entry.S
*
......@@ -1129,9 +1129,6 @@ ENTRY(sys_call_table)
.long sys_utimes
.long sys_fadvise64_64_wrapper
.long sys_ni_syscall /* Reserved for vserver */
.rept NR_syscalls-(.-sys_call_table)/4
.long sys_ni_syscall
.endr
.long sys_ni_syscall
/* End of entry.S */
......@@ -16,10 +16,11 @@
*/
void memcpy_fromio(void * to, unsigned long from, unsigned long count)
{
char *p = to;
while (count) {
count--;
*(char *) to = readb(from);
((char *) to)++;
*p = readb(from);
p++;
from++;
}
}
......@@ -30,10 +31,11 @@ void memcpy_fromio(void * to, unsigned long from, unsigned long count)
*/
void memcpy_toio(unsigned long to, const void * from, unsigned long count)
{
const char *p = from;
while (count) {
count--;
writeb(*(char *) from, to);
((char *) from)++;
writeb(*p, to);
p++;
to++;
}
}
......
......@@ -55,20 +55,22 @@ int module_frob_arch_sections(Elf_Ehdr *hdr,
#define COPY_UNALIGNED_WORD(sw, tw, align) \
{ \
void *__s = &(sw), *__t = &(tw); \
unsigned short *__s2 = __s, *__t2 = __t; \
unsigned char *__s1 = __s, *__t1 = __t; \
switch ((align)) \
{ \
case 0: \
*(unsigned long *) __t = *(unsigned long *) __s; \
break; \
case 2: \
*((unsigned short *) __t)++ = *((unsigned short *) __s)++; \
*((unsigned short *) __t) = *((unsigned short *) __s); \
*__t2++ = *__s2++; \
*__t2 = *__s2; \
break; \
default: \
*((unsigned char *) __t)++ = *((unsigned char *) __s)++; \
*((unsigned char *) __t)++ = *((unsigned char *) __s)++; \
*((unsigned char *) __t)++ = *((unsigned char *) __s)++; \
*((unsigned char *) __t) = *((unsigned char *) __s); \
*__t1++ = *__s1++; \
*__t1++ = *__s1++; \
*__t1++ = *__s1++; \
*__t1 = *__s1; \
break; \
} \
}
......
/* $Id: process.c,v 1.25 2004/01/13 05:52:11 kkojima Exp $
/* $Id: process.c,v 1.26 2004/02/06 14:14:14 kkojima Exp $
*
* linux/arch/sh/kernel/process.c
*
......@@ -254,6 +254,13 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
struct task_struct *p, struct pt_regs *regs)
{
struct pt_regs *childregs;
#if defined(CONFIG_CPU_SH4)
struct task_struct *tsk = current;
unlazy_fpu(tsk, regs);
p->thread.fpu = tsk->thread.fpu;
p->used_math = tsk->used_math;
#endif
childregs = ((struct pt_regs *)
(THREAD_SIZE + (unsigned long) p->thread_info)
......@@ -279,16 +286,6 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
p->thread.ubc_pc = 0;
#if defined(CONFIG_CPU_SH4)
{
struct task_struct *tsk = current;
unlazy_fpu(tsk, regs);
p->thread.fpu = tsk->thread.fpu;
p->used_math = tsk->used_math;
clear_ti_thread_flag(p->thread_info, TIF_USEDFPU);
}
#endif
return 0;
}
......
......@@ -113,3 +113,5 @@ EXPORT_SYMBOL(__down_trylock);
#ifdef CONFIG_SMP
EXPORT_SYMBOL(synchronize_irq);
#endif
EXPORT_SYMBOL(csum_partial);
......@@ -44,7 +44,7 @@ asmlinkage int sys_pipe(unsigned long r4, unsigned long r5,
return error;
}
#if defined(CONFIG_CPU_SH4)
#if defined(HAVE_ARCH_UNMAPPED_AREA)
/*
* To avoid cache alias, we map the shard page with same color.
*/
......@@ -53,7 +53,9 @@ asmlinkage int sys_pipe(unsigned long r4, unsigned long r5,
unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
unsigned long len, unsigned long pgoff, unsigned long flags)
{
struct mm_struct *mm = current->mm;
struct vm_area_struct *vma;
unsigned long start_addr;
if (flags & MAP_FIXED) {
/* We do not accept a shared mapping if it would violate
......@@ -66,20 +68,44 @@ unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
if (len > TASK_SIZE)
return -ENOMEM;
if (!addr)
addr = TASK_UNMAPPED_BASE;
if (addr) {
if (flags & MAP_PRIVATE)
addr = PAGE_ALIGN(addr);
else
addr = COLOUR_ALIGN(addr);
vma = find_vma(mm, addr);
if (TASK_SIZE - len >= addr &&
(!vma || addr + len <= vma->vm_start))
return addr;
}
if (flags & MAP_PRIVATE)
addr = PAGE_ALIGN(addr);
addr = PAGE_ALIGN(mm->free_area_cache);
else
addr = COLOUR_ALIGN(addr);
addr = COLOUR_ALIGN(mm->free_area_cache);
start_addr = addr;
for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) {
full_search:
for (vma = find_vma(mm, addr); ; vma = vma->vm_next) {
/* At this point: (!vma || addr < vma->vm_end). */
if (TASK_SIZE - len < addr)
if (TASK_SIZE - len < addr) {
/*
* Start a new search - just in case we missed
* some holes.
*/
if (start_addr != TASK_UNMAPPED_BASE) {
start_addr = addr = TASK_UNMAPPED_BASE;
goto full_search;
}
return -ENOMEM;
if (!vma || addr + len <= vma->vm_start)
}
if (!vma || addr + len <= vma->vm_start) {
/*
* Remember the place where we stopped the search:
*/
mm->free_area_cache = addr + len;
return addr;
}
addr = vma->vm_end;
if (!(flags & MAP_PRIVATE))
addr = COLOUR_ALIGN(addr);
......
/* $Id: time.c,v 1.18 2003/10/09 16:28:14 lethal Exp $
/* $Id: time.c,v 1.19 2004/02/27 00:40:48 lethal Exp $
*
* linux/arch/sh/kernel/time.c
*
......@@ -86,10 +86,14 @@ int (*rtc_set_time)(const time_t) = 0;
#endif
#if defined(CONFIG_CPU_SH3)
#error "FIXME"
static int ifc_table[] = { 1, 2, 4, 1, 3, 1, 1, 1 };
static int pfc_table[] = { 1, 2, 4, 1, 3, 6, 1, 1 };
static int stc_table[] = { 1, 2, 4, 8, 3, 6, 1, 1 };
static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
static int stc_values[] = { 0, 1, 4, 2, 5, 0, 0, 0 };
#define bfc_divisors stc_multipliers
#define bfc_values stc_values
static int ifc_divisors[] = { 1, 2, 3, 4, 1, 1, 1, 1 };
static int ifc_values[] = { 0, 1, 4, 2, 0, 0, 0, 0 };
static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
static int pfc_values[] = { 0, 1, 4, 2, 5, 0, 0, 0 };
#elif defined(CONFIG_CPU_SH4)
static int ifc_divisors[] = { 1, 2, 3, 4, 6, 8, 1, 1 };
static int ifc_values[] = { 0, 1, 2, 3, 0, 4, 0, 5 };
......@@ -398,13 +402,13 @@ void get_current_frequency_divisors(unsigned int *ifc, unsigned int *bfc, unsign
tmp = (frqcr & 0x8000) >> 13;
tmp |= (frqcr & 0x0030) >> 4;
*bfc = stc_table[tmp];
*bfc = stc_multipliers[tmp];
tmp = (frqcr & 0x4000) >> 12;
tmp |= (frqcr & 0x000c) >> 2;
*ifc = ifc_table[tmp];
*ifc = ifc_divisors[tmp];
tmp = (frqcr & 0x2000) >> 11;
tmp |= frqcr & 0x0003;
*pfc = pfc_table[tmp];
*pfc = pfc_divisors[tmp];
#elif defined(CONFIG_CPU_SH4)
*ifc = ifc_divisors[(frqcr >> 6) & 0x0007];
*bfc = bfc_divisors[(frqcr >> 3) & 0x0007];
......
/* $Id: traps.c,v 1.14 2003/11/14 18:40:10 lethal Exp $
/* $Id: traps.c,v 1.16 2004/03/16 00:10:54 lethal Exp $
*
* linux/arch/sh/traps.c
*
......@@ -656,6 +656,10 @@ void show_stack(struct task_struct *tsk, unsigned long *sp)
unsigned long module_end = VMALLOC_END;
int i = 1;
if (tsk && !sp) {
sp = (unsigned long *)tsk->thread.sp;
}
if (!sp) {
__asm__ __volatile__ (
"mov r15, %0\n\t"
......
/* $Id: cache-sh4.c,v 1.24 2003/10/12 19:40:12 lethal Exp $
/* $Id: cache-sh4.c,v 1.26 2004/02/19 12:47:24 lethal Exp $
*
* linux/arch/sh/mm/cache-sh4.c
*
* Copyright (C) 1999, 2000, 2002 Niibe Yutaka
* Copyright (C) 2001, 2002, 2003 Paul Mundt
* Copyright (C) 2001, 2002, 2003, 2004 Paul Mundt
* Copyright (C) 2003 Richard Curnow
*/
#include <linux/config.h>
......@@ -29,10 +30,20 @@ static void __flush_dcache_all_ex(void);
int __init detect_cpu_and_cache_system(void)
{
unsigned long pvr, prr, ccr;
unsigned long pvr, prr, ccr, cvr;
unsigned long size;
static unsigned long sizes[16] = {
[1] = (1 << 12),
[2] = (1 << 13),
[4] = (1 << 14),
[8] = (1 << 15),
[9] = (1 << 16)
};
pvr = (ctrl_inl(CCN_PVR) >> 8) & 0xffff;
prr = (ctrl_inl(CCN_PRR) >> 4) & 0xff;
cvr = (ctrl_inl(CCN_CVR));
/*
* Setup some sane SH-4 defaults for the icache
......@@ -54,6 +65,9 @@ int __init detect_cpu_and_cache_system(void)
cpu_data->dcache.ways = 1;
cpu_data->dcache.linesz = L1_CACHE_BYTES;
/* Set the FPU flag, virtually all SH-4's have one */
set_bit(CPU_HAS_FPU, &(cpu_data->flags));
/*
* Probe the underlying processor version/revision and
* adjust cpu_data setup accordingly.
......@@ -68,7 +82,7 @@ int __init detect_cpu_and_cache_system(void)
/*
* FIXME: This is needed for 7750, but do we need it for the
* 7750S and 7750R too? For now, assume we do.. -- PFM
* 7750S too? For now, assume we do.. -- PFM
*/
set_bit(CPU_HAS_P2_FLUSH_BUG, &(cpu_data->flags));
......@@ -83,12 +97,18 @@ int __init detect_cpu_and_cache_system(void)
cpu_data->type = CPU_ST40GX1;
break;
case 0x700:
/* XXX: Add proper CVR probing */
cpu_data->type = CPU_SH4_501;
cpu_data->icache.ways = 2;
cpu_data->dcache.ways = 2;
/* No FPU on the SH4-500 series.. */
clear_bit(CPU_HAS_FPU, &(cpu_data->flags));
break;
case 0x600:
cpu_data->type = CPU_SH4_202;
/* fall */
cpu_data->icache.ways = 2;
cpu_data->dcache.ways = 2;
break;
case 0x500 ... 0x501:
switch (prr) {
case 0x10: cpu_data->type = CPU_SH7750R; break;
......@@ -96,9 +116,20 @@ int __init detect_cpu_and_cache_system(void)
case 0x50: cpu_data->type = CPU_SH7760; break;
}
if (cpu_data->type == CPU_SH7750R)
set_bit(CPU_HAS_P2_FLUSH_BUG, &(cpu_data->flags));
cpu_data->icache.ways = 2;
cpu_data->dcache.ways = 2;
break;
default:
cpu_data->type = CPU_SH_NONE;
break;
}
/*
* On anything that's not a direct-mapped cache, look to the CVR
* for I/D-cache specifics.
*/
if (cpu_data->dcache.ways > 1) {
jump_to_P2();
ccr = ctrl_inl(CCR);
......@@ -110,19 +141,17 @@ int __init detect_cpu_and_cache_system(void)
back_to_P1();
cpu_data->icache.ways = 2;
cpu_data->dcache.ways = 2;
size = sizes[(cvr >> 20) & 0xf];
cpu_data->icache.way_shift = (size >> 1);
cpu_data->icache.entry_mask = ((size >> 2) - (1 << 5));
cpu_data->icache.sets = (size >> 6);
break;
default:
cpu_data->type = CPU_SH_NONE;
break;
size = sizes[(cvr >> 16) & 0xf];
cpu_data->dcache.way_shift = (size >> 1);
cpu_data->dcache.entry_mask = ((size >> 2) - (1 << 5));
cpu_data->dcache.sets = (size >> 6);
}
/* No FPU on the SH4-500 series.. */
if (cpu_data->type != CPU_SH4_501)
set_bit(CPU_HAS_FPU, &(cpu_data->flags));
return 0;
}
......@@ -419,7 +448,7 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start,
}
pte++;
p += PAGE_SIZE;
} while (p < end && (unsigned long)pte & PAGE_MASK);
} while (p < end && ((unsigned long)pte & ~PAGE_MASK));
pmd++;
} while (p < end);
loop_exit:
......
/* $Id: init.c,v 1.18 2003/10/31 09:26:59 kkojima Exp $
/* $Id: init.c,v 1.19 2004/02/21 04:42:16 kkojima Exp $
*
* linux/arch/sh/mm/init.c
*
......@@ -174,6 +174,7 @@ void __init mem_init(void)
extern unsigned long empty_zero_page[1024];
int codesize, reservedpages, datasize, initsize;
int tmp;
extern unsigned long memory_start;
#ifdef CONFIG_MMU
high_memory = (void *)__va(MAX_LOW_PFN * PAGE_SIZE);
......@@ -183,7 +184,7 @@ void __init mem_init(void)
high_memory = (void *)(memory_end & PAGE_MASK);
#endif
max_mapnr = num_physpages = MAP_NR(high_memory);
max_mapnr = num_physpages = MAP_NR(high_memory) - MAP_NR(memory_start);
/* clear the zero-page */
memset(empty_zero_page, 0, PAGE_SIZE);
......
/* $Id: ioremap.c,v 1.8 2003/10/09 15:25:42 lethal Exp $
/* $Id: ioremap.c,v 1.9 2004/02/25 04:59:10 lethal Exp $
*
* arch/sh/mm/ioremap.c
*
......@@ -160,5 +160,5 @@ void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long fla
void p3_iounmap(void *addr)
{
if (addr > high_memory)
return vfree((void *) (PAGE_MASK & (unsigned long) addr));
vfree((void *)(PAGE_MASK & (unsigned long)addr));
}
......@@ -412,7 +412,7 @@ static int __init sh_wdt_init(void)
return rc;
}
rc = misc_register(&sh_wdt_miscdev)
rc = misc_register(&sh_wdt_miscdev);
if (rc) {
printk(KERN_ERR PFX "Can't register miscdev on minor=%d (err=%d)\n",
sh_wdt_miscdev.minor, rc);
......
/*
* $Id: maple_keyb.c,v 1.1 2001/11/02 17:27:32 jsimmons Exp $
* $Id: maple_keyb.c,v 1.4 2004/03/22 01:18:15 lethal Exp $
* SEGA Dreamcast keyboard driver
* Based on drivers/usb/usbkbd.c
*/
......@@ -125,8 +125,11 @@ static int dc_kbd_connect(struct maple_device *dev)
kbd->dev.evbit[0] = BIT(EV_KEY) | BIT(EV_REP);
init_input_dev(&kbd->dev);
for (i=0; i<255; i++)
set_bit(dc_kbd_keycode[i], kbd->dev.keybit);
clear_bit(0, kbd->dev.keybit);
kbd->dev.private = kbd;
......@@ -141,10 +144,7 @@ static int dc_kbd_connect(struct maple_device *dev)
maple_getcond_callback(dev, dc_kbd_callback, 1, MAPLE_FUNC_KEYBOARD);
printk(KERN_INFO "input%d: keyboard(0x%lx): %s\n",
kbd->dev.number, data, kbd->dev.name);
MOD_INC_USE_COUNT;
printk(KERN_INFO "input: keyboard(0x%lx): %s\n", data, kbd->dev.name);
return 0;
}
......@@ -155,10 +155,7 @@ static void dc_kbd_disconnect(struct maple_device *dev)
struct dc_kbd *kbd = dev->private_data;
input_unregister_device(&kbd->dev);
kfree(kbd);
MOD_DEC_USE_COUNT;
}
......
/*
* $Id: maplemouse.c,v 1.1 2001/11/02 17:27:32 jsimmons Exp $
* $Id: maplemouse.c,v 1.2 2004/03/22 01:18:15 lethal Exp $
* SEGA Dreamcast mouse driver
* Based on drivers/usb/usbmouse.c
*/
......@@ -74,22 +74,21 @@ static int dc_mouse_connect(struct maple_device *dev)
mouse->dev.keybit[LONG(BTN_MOUSE)] = BIT(BTN_LEFT) | BIT(BTN_RIGHT) | BIT(BTN_MIDDLE);
mouse->dev.relbit[0] = BIT(REL_X) | BIT(REL_Y) | BIT(REL_WHEEL);
init_input_dev(&mouse->dev);
mouse->dev.private = mouse;
mouse->dev.open = dc_mouse_open;
mouse->dev.close = dc_mouse_close;
mouse->dev.event = NULL;
mouse->dev.name = dev->product_name;
mouse->dev.idbus = BUS_MAPLE;
mouse->dev.id.bustype = BUS_MAPLE;
input_register_device(&mouse->dev);
maple_getcond_callback(dev, dc_mouse_callback, 1, MAPLE_FUNC_MOUSE);
printk(KERN_INFO "input%d: mouse(0x%lx): %s\n",
mouse->dev.number, data, mouse->dev.name);
MOD_INC_USE_COUNT;
printk(KERN_INFO "input: mouse(0x%lx): %s\n", data, mouse->dev.name);
return 0;
}
......@@ -100,10 +99,7 @@ static void dc_mouse_disconnect(struct maple_device *dev)
struct dc_mouse *mouse = dev->private_data;
input_unregister_device(&mouse->dev);
kfree(mouse);
MOD_DEC_USE_COUNT;
}
......
......@@ -20,7 +20,7 @@
#include <asm/system.h>
#include <asm/io.h>
#include <asm/hitachi_se.h>
#include <asm/se/se.h>
#include <asm/machvec.h>
#ifdef CONFIG_SH_STANDARD_BIOS
#include <asm/sh_bios.h>
......
......@@ -37,5 +37,7 @@
#define p3_cache_init() do { } while (0)
#define HAVE_ARCH_UNMAPPED_AREA
#endif /* __ASM_CPU_SH3_CACHEFLUSH_H */
#ifndef __ASM_SH_DAC_H
#define __ASM_SH_DAC_H
/*
* Copyright (C) 2003 Andriy Skulysh
*/
#define DADR0 0xa40000a0
#define DADR1 0xa40000a2
#define DACR 0xa40000a4
#define DACR_DAOE1 0x80
#define DACR_DAOE0 0x40
#define DACR_DAE 0x20
static __inline__ void sh_dac_enable(int channel)
{
unsigned char v;
v = ctrl_inb(DACR);
if(channel) v |= DACR_DAOE1;
else v |= DACR_DAOE0;
ctrl_outb(v,DACR);
}
static __inline__ void sh_dac_disable(int channel)
{
unsigned char v;
v = ctrl_inb(DACR);
if(channel) v &= ~DACR_DAOE1;
else v &= ~DACR_DAOE0;
ctrl_outb(v,DACR);
}
static __inline__ void sh_dac_output(u8 value, int channel)
{
if(channel) ctrl_outb(value,DADR1);
else ctrl_outb(value,DADR0);
}
#endif /* __ASM_SH_DAC_H */
/*
* $Id: io.h,v 1.3 2003/05/04 19:30:14 lethal Exp $
* IO functions for SEGA Dreamcast
*/
#ifndef _ASM_SH_IO_DREAMCAST_H
#define _ASM_SH_IO_DREAMCAST_H
#include <asm/io_generic.h>
unsigned long dreamcast_isa_port2addr(unsigned long offset);
#ifdef __WANT_IO_DEF
# define __inb generic_inb
# define __inw generic_inw
# define __inl generic_inl
# define __outb generic_outb
# define __outw generic_outw
# define __outl generic_outl
# define __inb_p generic_inb_p
# define __inw_p generic_inw
# define __inl_p generic_inl
# define __outb_p generic_outb_p
# define __outw_p generic_outw
# define __outl_p generic_outl
# define __insb generic_insb
# define __insw generic_insw
# define __insl generic_insl
# define __outsb generic_outsb
# define __outsw generic_outsw
# define __outsl generic_outsl
# define __readb generic_readb
# define __readw generic_readw
# define __readl generic_readl
# define __writeb generic_writeb
# define __writew generic_writew
# define __writel generic_writel
# define __isa_port2addr dreamcast_isa_port2addr
# define __ioremap generic_ioremap
# define __iounmap generic_iounmap
#endif
#endif /* _ASM_SH_IO_DREAMCAST_H */
#ifndef __ASM_SH_HD64461
#define __ASM_SH_HD64461
/*
* $Id: hd64461.h,v 1.4 2004/02/01 19:46:04 lethal Exp $
* $Id: hd64461.h,v 1.5 2004/03/16 00:07:51 lethal Exp $
* Copyright (C) 2000 YAEGASHI Takeshi
* Hitachi HD64461 companion chip support
*/
#include <linux/config.h>
/* Constants for PCMCIA mappings */
#define HD64461_PCC_WINDOW 0x01000000
#define HD64461_PCC0_BASE 0xb8000000 /* area 6 */
#define HD64461_PCC0_ATTR (HD64461_PCC0_BASE)
#define HD64461_PCC0_COMM (HD64461_PCC0_BASE+HD64461_PCC_WINDOW)
#define HD64461_PCC0_IO (HD64461_PCC0_BASE+2*HD64461_PCC_WINDOW)
#define HD64461_PCC1_BASE 0xb4000000 /* area 5 */
#define HD64461_PCC1_ATTR (HD64461_PCC1_BASE)
#define HD64461_PCC1_COMM (HD64461_PCC1_BASE+HD64461_PCC_WINDOW)
#define HD64461_STBCR 0x10000
#define HD64461_STBCR_CKIO_STBY 0x2000
#define HD64461_STBCR_SAFECKE_IST 0x1000
......@@ -21,7 +33,7 @@
#define HD64461_STBCR_STM0ST 0x0008
#define HD64461_STBCR_STM1ST 0x0004
#define HD64461_STBCR_SIRST 0x0002
#define HD64461_STBCR_SURTSD 0x0001
#define HD64461_STBCR_SURTST 0x0001
#define HD64461_SYSCR 0x10002
#define HD64461_SCPUCR 0x10004
......@@ -77,16 +89,74 @@
#define HD64461_BBTROPR 0x11068
#define HD64461_BBTMDR 0x1106a
#define HD64461_PCC0ISR 0x12000
#define HD64461_PCC0GCR 0x12002
#define HD64461_PCC0CSCR 0x12004
#define HD64461_PCC0CSCIER 0x12006
#define HD64461_PCC0SCR 0x12008
#define HD64461_PCC1ISR 0x12010
#define HD64461_PCC1GCR 0x12012
#define HD64461_PCC1CSCR 0x12014
#define HD64461_PCC1CSCIER 0x12016
#define HD64461_PCC1SCR 0x12018
/* PC Card Controller Registers */
#define HD64461_PCC0ISR 0x12000 /* socket 0 interface status */
#define HD64461_PCC0GCR 0x12002 /* socket 0 general control */
#define HD64461_PCC0CSCR 0x12004 /* socket 0 card status change */
#define HD64461_PCC0CSCIER 0x12006 /* socket 0 card status change interrupt enable */
#define HD64461_PCC0SCR 0x12008 /* socket 0 software control */
#define HD64461_PCC1ISR 0x12010 /* socket 1 interface status */
#define HD64461_PCC1GCR 0x12012 /* socket 1 general control */
#define HD64461_PCC1CSCR 0x12014 /* socket 1 card status change */
#define HD64461_PCC1CSCIER 0x12016 /* socket 1 card status change interrupt enable */
#define HD64461_PCC1SCR 0x12018 /* socket 1 software control */
/* PCC Interface Status Register */
#define HD64461_PCCISR_READY 0x80 /* card ready */
#define HD64461_PCCISR_MWP 0x40 /* card write-protected */
#define HD64461_PCCISR_VS2 0x20 /* voltage select pin 2 */
#define HD64461_PCCISR_VS1 0x10 /* voltage select pin 1 */
#define HD64461_PCCISR_CD2 0x08 /* card detect 2 */
#define HD64461_PCCISR_CD1 0x04 /* card detect 1 */
#define HD64461_PCCISR_BVD2 0x02 /* battery 1 */
#define HD64461_PCCISR_BVD1 0x01 /* battery 1 */
#define HD64461_PCCISR_PCD_MASK 0x0c /* card detect */
#define HD64461_PCCISR_BVD_MASK 0x03 /* battery voltage */
#define HD64461_PCCISR_BVD_BATGOOD 0x03 /* battery good */
#define HD64461_PCCISR_BVD_BATWARN 0x01 /* battery low warning */
#define HD64461_PCCISR_BVD_BATDEAD1 0x02 /* battery dead */
#define HD64461_PCCISR_BVD_BATDEAD2 0x00 /* battery dead */
/* PCC General Control Register */
#define HD64461_PCCGCR_DRVE 0x80 /* output drive */
#define HD64461_PCCGCR_PCCR 0x40 /* PC card reset */
#define HD64461_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */
#define HD64461_PCCGCR_VCC0 0x10 /* voltage control pin VCC0SEL0 */
#define HD64461_PCCGCR_PMMOD 0x08 /* memory mode */
#define HD64461_PCCGCR_PA25 0x04 /* pin A25 */
#define HD64461_PCCGCR_PA24 0x02 /* pin A24 */
#define HD64461_PCCGCR_REG 0x01 /* pin PCC0REG# */
/* PCC Card Status Change Register */
#define HD64461_PCCCSCR_SCDI 0x80 /* sw card detect intr */
#define HD64461_PCCCSCR_SRV1 0x40 /* reserved */
#define HD64461_PCCCSCR_IREQ 0x20 /* IREQ intr req */
#define HD64461_PCCCSCR_SC 0x10 /* STSCHG (status change) pin */
#define HD64461_PCCCSCR_CDC 0x08 /* CD (card detect) change */
#define HD64461_PCCCSCR_RC 0x04 /* READY change */
#define HD64461_PCCCSCR_BW 0x02 /* battery warning change */
#define HD64461_PCCCSCR_BD 0x01 /* battery dead change */
/* PCC Card Status Change Interrupt Enable Register */
#define HD64461_PCCCSCIER_CRE 0x80 /* change reset enable */
#define HD64461_PCCCSCIER_IREQE_MASK 0x60 /* IREQ enable */
#define HD64461_PCCCSCIER_IREQE_DISABLED 0x00 /* IREQ disabled */
#define HD64461_PCCCSCIER_IREQE_LEVEL 0x20 /* IREQ level-triggered */
#define HD64461_PCCCSCIER_IREQE_FALLING 0x40 /* IREQ falling-edge-trig */
#define HD64461_PCCCSCIER_IREQE_RISING 0x60 /* IREQ rising-edge-trig */
#define HD64461_PCCCSCIER_SCE 0x10 /* status change enable */
#define HD64461_PCCCSCIER_CDE 0x08 /* card detect change enable */
#define HD64461_PCCCSCIER_RE 0x04 /* ready change enable */
#define HD64461_PCCCSCIER_BWE 0x02 /* battery warn change enable */
#define HD64461_PCCCSCIER_BDE 0x01 /* battery dead change enable*/
/* PCC Software Control Register */
#define HD64461_PCCSCR_VCC1 0x02 /* voltage control pin 1 */
#define HD64461_PCCSCR_SWP 0x01 /* write protect */
#define HD64461_P0OCR 0x1202a
#define HD64461_P1OCR 0x1202c
#define HD64461_PGCR 0x1202e
......@@ -121,4 +191,13 @@
#define HD64461_IRQBASE OFFCHIP_IRQ_BASE
#define HD64461_IRQ_NUM 16
#define HD64461_IRQ_UART (HD64461_IRQBASE+5)
#define HD64461_IRQ_IRDA (HD64461_IRQBASE+6)
#define HD64461_IRQ_TMU1 (HD64461_IRQBASE+9)
#define HD64461_IRQ_TMU0 (HD64461_IRQBASE+10)
#define HD64461_IRQ_GPIO (HD64461_IRQBASE+11)
#define HD64461_IRQ_AFE (HD64461_IRQBASE+12)
#define HD64461_IRQ_PCC1 (HD64461_IRQBASE+13)
#define HD64461_IRQ_PCC0 (HD64461_IRQBASE+14)
#endif
......@@ -23,15 +23,21 @@ extern void hd64461_outl(unsigned int value, unsigned long port);
extern unsigned char hd64461_inb_p(unsigned long port);
extern void hd64461_outb_p(unsigned char value, unsigned long port);
extern void hd64461_insb(unsigned long port, const void *buffer, unsigned long count);
extern void hd64461_insw(unsigned long port, const void *buffer, unsigned long count);
extern void hd64461_insl(unsigned long port, const void *buffer, unsigned long count);
extern void hd64461_insb(unsigned long port, void *addr, unsigned long count);
extern void hd64461_insw(unsigned long port, void *addr, unsigned long count);
extern void hd64461_insl(unsigned long port, void *addr, unsigned long count);
extern void hd64461_outsb(unsigned long port, const void *buffer, unsigned long count);
extern void hd64461_outsw(unsigned long port, const void *buffer, unsigned long count);
extern void hd64461_outsl(unsigned long port, const void *buffer, unsigned long count);
extern unsigned short hd64461_readw(unsigned long addr);
extern void hd64461_writew(unsigned short b, unsigned long addr);
extern int hd64461_irq_demux(int irq);
extern void hd64461_register_irq_demux(int irq,
int (*demux)(int irq, void *dev), void *dev);
extern void hd64461_unregister_irq_demux(int irq);
#endif /* _ASM_SH_IO_HD64461_H */
#ifndef __ASM_SH_HP6XX_H
#define __ASM_SH_HP6XX_H
/*
* Copyright (C) 2003 Andriy Skulysh
*/
#define DAC_LCD_BRIGHTNESS 0
#define DAC_SPEAKER_VOLUME 1
#define HD64461_GPADR_SPEAKER 0x01
#define HD64461_GPADR_PCMCIA0 (0x02|0x08)
#define HD64461_GPBDR_LCDOFF 0x01
#define HD64461_GPBDR_LED_RED 0x80
#endif /* __ASM_SH_HP6XX_H */
......@@ -30,6 +30,11 @@
#define TIMER_IPR_POS 3
#define TIMER_PRIORITY 2
#define TIMER1_IRQ 17
#define TIMER1_IPR_ADDR INTC_IPRA
#define TIMER1_IPR_POS 2
#define TIMER1_PRIORITY 4
#define RTC_IRQ 22
#define RTC_IPR_ADDR INTC_IPRA
#define RTC_IPR_POS 0
......@@ -154,7 +159,7 @@
# define OFFCHIP_NR_IRQS 16
#else
# if defined(CONFIG_HD64461)
# define OFFCHIP_NR_IRQS 16
# define OFFCHIP_NR_IRQS 18
# elif defined (CONFIG_SH_BIGSUR) /* must be before CONFIG_HD64465 */
# define OFFCHIP_NR_IRQS 48
# elif defined(CONFIG_HD64465)
......
......@@ -204,6 +204,8 @@ static inline pgprot_t pgprot_noncached(pgprot_t _prot)
return __pgprot(prot);
}
#define pgprot_writecombine(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
/*
* Conversion functions: convert a page and protection to a page entry,
* and a page entry and page directory to the page they refer to.
......
......@@ -22,6 +22,7 @@
/* Core Processor Version Register */
#define CCN_PVR 0xff000030
#define CCN_CVR 0xff000040
#define CCN_PRR 0xff000044
/*
......
/*
* include/asm-sh/io_sh2000.h
*
* Copyright 2000 Stuart Menefy (stuart.menefy@st.com)
* 2001 SUGIOKA Toshinobu (sugioka@itonet.co.jp)
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* IO functions for use when we don't know what machine we are on
*/
#ifndef _ASM_SH_IO_SH2000_H
#define _ASM_SH_IO_SH2000_H
#include <asm/io_generic.h>
unsigned long sh2000_isa_port2addr(unsigned long offset);
#ifdef __WANT_IO_DEF
# define __inb generic_inb
# define __inw generic_inw
# define __inl generic_inl
# define __outb generic_outb
# define __outw generic_outw
# define __outl generic_outl
# define __inb_p generic_inb_p
# define __inw_p generic_inw
# define __inl_p generic_inl
# define __outb_p generic_outb_p
# define __outw_p generic_outw
# define __outl_p generic_outl
# define __insb generic_insb
# define __insw generic_insw
# define __insl generic_insl
# define __outsb generic_outsb
# define __outsw generic_outsw
# define __outsl generic_outsl
# define __readb generic_readb
# define __readw generic_readw
# define __readl generic_readl
# define __writeb generic_writeb
# define __writew generic_writew
# define __writel generic_writel
# define __isa_port2addr sh2000_isa_port2addr
# define __ioremap generic_ioremap
# define __iounmap generic_iounmap
#endif
#endif /* _ASM_SH_IO_SH2000_H */
......@@ -7,6 +7,10 @@
struct pt_regs;
struct siginfo;
#ifdef __KERNEL__
/* Most things should be clean enough to redefine this at will, if care
is taken to make libc match. */
#define _NSIG 64
#define _NSIG_BPW 32
#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
......@@ -17,6 +21,14 @@ typedef struct {
unsigned long sig[_NSIG_WORDS];
} sigset_t;
#else
/* Here we must cater to libcs that poke about in kernel headers. */
#define NSIG 32
typedef unsigned long sigset_t;
#endif /* __KERNEL__ */
#define SIGHUP 1
#define SIGINT 2
#define SIGQUIT 3
......
......@@ -19,6 +19,7 @@
#define SUN_OPENPROM_MINOR 139
#define DMAPI_MINOR 140 /* DMAPI */
#define NVRAM_MINOR 144
#define STORE_QUEUE_MINOR 155
#define I2O_MINOR 166
#define MICROCODE_MINOR 184
#define MWAVE_MINOR 219 /* ACP/Mwave Modem */
......
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