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Commit e9157848 authored by Nikita Danilov's avatar Nikita Danilov Committed by David S. Miller
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net: aquantia: whitespace changes 

Removed extra spaces, corrected alignment.
Signed-off-by: default avatarNikita Danilov <nikita.danilov@aquantia.com>
Signed-off-by: default avatarIgor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 92ab6407
Hide whitespace changes
Inline Side-by-side
Showing with 49 additions and 49 deletions
drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c
View file @ e9157848
...@@ -98,8 +98,8 @@ static void aq_ethtool_stats(struct net_device *ndev, ...@@ -98,8 +98,8 @@ static void aq_ethtool_stats(struct net_device *ndev,
struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(aq_nic); struct aq_nic_cfg_s *cfg = aq_nic_get_cfg(aq_nic);
memset(data, 0, (ARRAY_SIZE(aq_ethtool_stat_names) + memset(data, 0, (ARRAY_SIZE(aq_ethtool_stat_names) +
ARRAY_SIZE(aq_ethtool_queue_stat_names) * ARRAY_SIZE(aq_ethtool_queue_stat_names) *
cfg->vecs) * sizeof(u64)); cfg->vecs) * sizeof(u64));
aq_nic_get_stats(aq_nic, data); aq_nic_get_stats(aq_nic, data);
} }
......
drivers/net/ethernet/aquantia/atlantic/aq_nic.c
View file @ e9157848
...@@ -189,7 +189,7 @@ static void aq_nic_polling_timer_cb(struct timer_list *t) ...@@ -189,7 +189,7 @@ static void aq_nic_polling_timer_cb(struct timer_list *t)
aq_vec_isr(i, (void *)aq_vec); aq_vec_isr(i, (void *)aq_vec);
mod_timer(&self->polling_timer, jiffies + mod_timer(&self->polling_timer, jiffies +
AQ_CFG_POLLING_TIMER_INTERVAL); AQ_CFG_POLLING_TIMER_INTERVAL);
} }
int aq_nic_ndev_register(struct aq_nic_s *self) int aq_nic_ndev_register(struct aq_nic_s *self)
...@@ -301,13 +301,13 @@ int aq_nic_start(struct aq_nic_s *self) ...@@ -301,13 +301,13 @@ int aq_nic_start(struct aq_nic_s *self)
unsigned int i = 0U; unsigned int i = 0U;
err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw, err = self->aq_hw_ops->hw_multicast_list_set(self->aq_hw,
self->mc_list.ar, self->mc_list.ar,
self->mc_list.count); self->mc_list.count);
if (err < 0) if (err < 0)
goto err_exit; goto err_exit;
err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw, err = self->aq_hw_ops->hw_packet_filter_set(self->aq_hw,
self->packet_filter); self->packet_filter);
if (err < 0) if (err < 0)
goto err_exit; goto err_exit;
...@@ -327,7 +327,7 @@ int aq_nic_start(struct aq_nic_s *self) ...@@ -327,7 +327,7 @@ int aq_nic_start(struct aq_nic_s *self)
goto err_exit; goto err_exit;
timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0); timer_setup(&self->service_timer, aq_nic_service_timer_cb, 0);
mod_timer(&self->service_timer, jiffies + mod_timer(&self->service_timer, jiffies +
AQ_CFG_SERVICE_TIMER_INTERVAL); AQ_CFG_SERVICE_TIMER_INTERVAL);
if (self->aq_nic_cfg.is_polling) { if (self->aq_nic_cfg.is_polling) {
timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0); timer_setup(&self->polling_timer, aq_nic_polling_timer_cb, 0);
...@@ -344,7 +344,7 @@ int aq_nic_start(struct aq_nic_s *self) ...@@ -344,7 +344,7 @@ int aq_nic_start(struct aq_nic_s *self)
} }
err = self->aq_hw_ops->hw_irq_enable(self->aq_hw, err = self->aq_hw_ops->hw_irq_enable(self->aq_hw,
AQ_CFG_IRQ_MASK); AQ_CFG_IRQ_MASK);
if (err < 0) if (err < 0)
goto err_exit; goto err_exit;
} }
......
drivers/net/ethernet/aquantia/atlantic/aq_ring.c
View file @ e9157848
...@@ -29,8 +29,8 @@ static struct aq_ring_s *aq_ring_alloc(struct aq_ring_s *self, ...@@ -29,8 +29,8 @@ static struct aq_ring_s *aq_ring_alloc(struct aq_ring_s *self,
goto err_exit; goto err_exit;
} }
self->dx_ring = dma_alloc_coherent(aq_nic_get_dev(aq_nic), self->dx_ring = dma_alloc_coherent(aq_nic_get_dev(aq_nic),
self->size * self->dx_size, self->size * self->dx_size,
&self->dx_ring_pa, GFP_KERNEL); &self->dx_ring_pa, GFP_KERNEL);
if (!self->dx_ring) { if (!self->dx_ring) {
err = -ENOMEM; err = -ENOMEM;
goto err_exit; goto err_exit;
......
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c
View file @ e9157848
...@@ -49,9 +49,9 @@ ...@@ -49,9 +49,9 @@
const struct aq_hw_caps_s hw_atl_a0_caps_aqc100 = { const struct aq_hw_caps_s hw_atl_a0_caps_aqc100 = {
DEFAULT_A0_BOARD_BASIC_CAPABILITIES, DEFAULT_A0_BOARD_BASIC_CAPABILITIES,
.media_type = AQ_HW_MEDIA_TYPE_FIBRE, .media_type = AQ_HW_MEDIA_TYPE_FIBRE,
.link_speed_msk = HW_ATL_A0_RATE_5G | .link_speed_msk = HW_ATL_A0_RATE_5G |
HW_ATL_A0_RATE_2G5 | HW_ATL_A0_RATE_2G5 |
HW_ATL_A0_RATE_1G | HW_ATL_A0_RATE_1G |
HW_ATL_A0_RATE_100M, HW_ATL_A0_RATE_100M,
}; };
...@@ -59,9 +59,9 @@ const struct aq_hw_caps_s hw_atl_a0_caps_aqc107 = { ...@@ -59,9 +59,9 @@ const struct aq_hw_caps_s hw_atl_a0_caps_aqc107 = {
DEFAULT_A0_BOARD_BASIC_CAPABILITIES, DEFAULT_A0_BOARD_BASIC_CAPABILITIES,
.media_type = AQ_HW_MEDIA_TYPE_TP, .media_type = AQ_HW_MEDIA_TYPE_TP,
.link_speed_msk = HW_ATL_A0_RATE_10G | .link_speed_msk = HW_ATL_A0_RATE_10G |
HW_ATL_A0_RATE_5G | HW_ATL_A0_RATE_5G |
HW_ATL_A0_RATE_2G5 | HW_ATL_A0_RATE_2G5 |
HW_ATL_A0_RATE_1G | HW_ATL_A0_RATE_1G |
HW_ATL_A0_RATE_100M, HW_ATL_A0_RATE_100M,
}; };
...@@ -78,7 +78,7 @@ const struct aq_hw_caps_s hw_atl_a0_caps_aqc109 = { ...@@ -78,7 +78,7 @@ const struct aq_hw_caps_s hw_atl_a0_caps_aqc109 = {
DEFAULT_A0_BOARD_BASIC_CAPABILITIES, DEFAULT_A0_BOARD_BASIC_CAPABILITIES,
.media_type = AQ_HW_MEDIA_TYPE_TP, .media_type = AQ_HW_MEDIA_TYPE_TP,
.link_speed_msk = HW_ATL_A0_RATE_2G5 | .link_speed_msk = HW_ATL_A0_RATE_2G5 |
HW_ATL_A0_RATE_1G | HW_ATL_A0_RATE_1G |
HW_ATL_A0_RATE_100M, HW_ATL_A0_RATE_100M,
}; };
...@@ -284,7 +284,7 @@ static int hw_atl_a0_hw_init_rx_path(struct aq_hw_s *self) ...@@ -284,7 +284,7 @@ static int hw_atl_a0_hw_init_rx_path(struct aq_hw_s *self)
/* RSS Ring selection */ /* RSS Ring selection */
hw_atl_reg_rx_flr_rss_control1set(self, cfg->is_rss ? hw_atl_reg_rx_flr_rss_control1set(self, cfg->is_rss ?
0xB3333333U : 0x00000000U); 0xB3333333U : 0x00000000U);
/* Multicast filters */ /* Multicast filters */
for (i = HW_ATL_A0_MAC_MAX; i--;) { for (i = HW_ATL_A0_MAC_MAX; i--;) {
...@@ -325,7 +325,7 @@ static int hw_atl_a0_hw_mac_addr_set(struct aq_hw_s *self, u8 *mac_addr) ...@@ -325,7 +325,7 @@ static int hw_atl_a0_hw_mac_addr_set(struct aq_hw_s *self, u8 *mac_addr)
} }
h = (mac_addr[0] << 8) | (mac_addr[1]); h = (mac_addr[0] << 8) | (mac_addr[1]);
l = (mac_addr[2] << 24) | (mac_addr[3] << 16) | l = (mac_addr[2] << 24) | (mac_addr[3] << 16) |
(mac_addr[4] << 8) | mac_addr[5]; (mac_addr[4] << 8) | mac_addr[5];
hw_atl_rpfl2_uc_flr_en_set(self, 0U, HW_ATL_A0_MAC); hw_atl_rpfl2_uc_flr_en_set(self, 0U, HW_ATL_A0_MAC);
hw_atl_rpfl2unicast_dest_addresslsw_set(self, l, HW_ATL_A0_MAC); hw_atl_rpfl2unicast_dest_addresslsw_set(self, l, HW_ATL_A0_MAC);
...@@ -519,7 +519,7 @@ static int hw_atl_a0_hw_ring_rx_init(struct aq_hw_s *self, ...@@ -519,7 +519,7 @@ static int hw_atl_a0_hw_ring_rx_init(struct aq_hw_s *self,
hw_atl_rdm_rx_desc_data_buff_size_set(self, hw_atl_rdm_rx_desc_data_buff_size_set(self,
AQ_CFG_RX_FRAME_MAX / 1024U, AQ_CFG_RX_FRAME_MAX / 1024U,
aq_ring->idx); aq_ring->idx);
hw_atl_rdm_rx_desc_head_buff_size_set(self, 0U, aq_ring->idx); hw_atl_rdm_rx_desc_head_buff_size_set(self, 0U, aq_ring->idx);
hw_atl_rdm_rx_desc_head_splitting_set(self, 0U, aq_ring->idx); hw_atl_rdm_rx_desc_head_splitting_set(self, 0U, aq_ring->idx);
...@@ -758,7 +758,7 @@ static int hw_atl_a0_hw_packet_filter_set(struct aq_hw_s *self, ...@@ -758,7 +758,7 @@ static int hw_atl_a0_hw_packet_filter_set(struct aq_hw_s *self,
hw_atl_rpfl2_uc_flr_en_set(self, hw_atl_rpfl2_uc_flr_en_set(self,
(self->aq_nic_cfg->is_mc_list_enabled && (self->aq_nic_cfg->is_mc_list_enabled &&
(i <= self->aq_nic_cfg->mc_list_count)) ? (i <= self->aq_nic_cfg->mc_list_count)) ?
1U : 0U, i); 1U : 0U, i);
return aq_hw_err_from_flags(self); return aq_hw_err_from_flags(self);
} }
......
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c
View file @ e9157848
...@@ -52,9 +52,9 @@ const struct aq_hw_caps_s hw_atl_b0_caps_aqc100 = { ...@@ -52,9 +52,9 @@ const struct aq_hw_caps_s hw_atl_b0_caps_aqc100 = {
DEFAULT_B0_BOARD_BASIC_CAPABILITIES, DEFAULT_B0_BOARD_BASIC_CAPABILITIES,
.media_type = AQ_HW_MEDIA_TYPE_FIBRE, .media_type = AQ_HW_MEDIA_TYPE_FIBRE,
.link_speed_msk = HW_ATL_B0_RATE_10G | .link_speed_msk = HW_ATL_B0_RATE_10G |
HW_ATL_B0_RATE_5G | HW_ATL_B0_RATE_5G |
HW_ATL_B0_RATE_2G5 | HW_ATL_B0_RATE_2G5 |
HW_ATL_B0_RATE_1G | HW_ATL_B0_RATE_1G |
HW_ATL_B0_RATE_100M, HW_ATL_B0_RATE_100M,
}; };
...@@ -62,18 +62,18 @@ const struct aq_hw_caps_s hw_atl_b0_caps_aqc107 = { ...@@ -62,18 +62,18 @@ const struct aq_hw_caps_s hw_atl_b0_caps_aqc107 = {
DEFAULT_B0_BOARD_BASIC_CAPABILITIES, DEFAULT_B0_BOARD_BASIC_CAPABILITIES,
.media_type = AQ_HW_MEDIA_TYPE_TP, .media_type = AQ_HW_MEDIA_TYPE_TP,
.link_speed_msk = HW_ATL_B0_RATE_10G | .link_speed_msk = HW_ATL_B0_RATE_10G |
HW_ATL_B0_RATE_5G | HW_ATL_B0_RATE_5G |
HW_ATL_B0_RATE_2G5 | HW_ATL_B0_RATE_2G5 |
HW_ATL_B0_RATE_1G | HW_ATL_B0_RATE_1G |
HW_ATL_B0_RATE_100M, HW_ATL_B0_RATE_100M,
}; };
const struct aq_hw_caps_s hw_atl_b0_caps_aqc108 = { const struct aq_hw_caps_s hw_atl_b0_caps_aqc108 = {
DEFAULT_B0_BOARD_BASIC_CAPABILITIES, DEFAULT_B0_BOARD_BASIC_CAPABILITIES,
.media_type = AQ_HW_MEDIA_TYPE_TP, .media_type = AQ_HW_MEDIA_TYPE_TP,
.link_speed_msk = HW_ATL_B0_RATE_5G | .link_speed_msk = HW_ATL_B0_RATE_5G |
HW_ATL_B0_RATE_2G5 | HW_ATL_B0_RATE_2G5 |
HW_ATL_B0_RATE_1G | HW_ATL_B0_RATE_1G |
HW_ATL_B0_RATE_100M, HW_ATL_B0_RATE_100M,
}; };
...@@ -81,7 +81,7 @@ const struct aq_hw_caps_s hw_atl_b0_caps_aqc109 = { ...@@ -81,7 +81,7 @@ const struct aq_hw_caps_s hw_atl_b0_caps_aqc109 = {
DEFAULT_B0_BOARD_BASIC_CAPABILITIES, DEFAULT_B0_BOARD_BASIC_CAPABILITIES,
.media_type = AQ_HW_MEDIA_TYPE_TP, .media_type = AQ_HW_MEDIA_TYPE_TP,
.link_speed_msk = HW_ATL_B0_RATE_2G5 | .link_speed_msk = HW_ATL_B0_RATE_2G5 |
HW_ATL_B0_RATE_1G | HW_ATL_B0_RATE_1G |
HW_ATL_B0_RATE_100M, HW_ATL_B0_RATE_100M,
}; };
......
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.c
View file @ e9157848
...@@ -49,6 +49,7 @@ ...@@ -49,6 +49,7 @@
#define FORCE_FLASHLESS 0 #define FORCE_FLASHLESS 0
static int hw_atl_utils_ver_match(u32 ver_expected, u32 ver_actual); static int hw_atl_utils_ver_match(u32 ver_expected, u32 ver_actual);
static int hw_atl_utils_mpi_set_state(struct aq_hw_s *self, static int hw_atl_utils_mpi_set_state(struct aq_hw_s *self,
enum hal_atl_utils_fw_state_e state); enum hal_atl_utils_fw_state_e state);
...@@ -69,10 +70,10 @@ int hw_atl_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops) ...@@ -69,10 +70,10 @@ int hw_atl_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops)
self->fw_ver_actual) == 0) { self->fw_ver_actual) == 0) {
*fw_ops = &aq_fw_1x_ops; *fw_ops = &aq_fw_1x_ops;
} else if (hw_atl_utils_ver_match(HW_ATL_FW_VER_2X, } else if (hw_atl_utils_ver_match(HW_ATL_FW_VER_2X,
self->fw_ver_actual) == 0) { self->fw_ver_actual) == 0) {
*fw_ops = &aq_fw_2x_ops; *fw_ops = &aq_fw_2x_ops;
} else if (hw_atl_utils_ver_match(HW_ATL_FW_VER_3X, } else if (hw_atl_utils_ver_match(HW_ATL_FW_VER_3X,
self->fw_ver_actual) == 0) { self->fw_ver_actual) == 0) {
*fw_ops = &aq_fw_2x_ops; *fw_ops = &aq_fw_2x_ops;
} else { } else {
aq_pr_err("Bad FW version detected: %x\n", aq_pr_err("Bad FW version detected: %x\n",
...@@ -260,7 +261,7 @@ int hw_atl_utils_soft_reset(struct aq_hw_s *self) ...@@ -260,7 +261,7 @@ int hw_atl_utils_soft_reset(struct aq_hw_s *self)
hw_atl_utils_mpi_set_state(self, MPI_DEINIT); hw_atl_utils_mpi_set_state(self, MPI_DEINIT);
AQ_HW_WAIT_FOR((aq_hw_read_reg(self, HW_ATL_MPI_STATE_ADR) & AQ_HW_WAIT_FOR((aq_hw_read_reg(self, HW_ATL_MPI_STATE_ADR) &
HW_ATL_MPI_STATE_MSK) == MPI_DEINIT, HW_ATL_MPI_STATE_MSK) == MPI_DEINIT,
10, 1000U); 10, 1000U);
} }
...@@ -277,7 +278,7 @@ int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a, ...@@ -277,7 +278,7 @@ int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a,
AQ_HW_WAIT_FOR(hw_atl_reg_glb_cpu_sem_get(self, AQ_HW_WAIT_FOR(hw_atl_reg_glb_cpu_sem_get(self,
HW_ATL_FW_SM_RAM) == 1U, HW_ATL_FW_SM_RAM) == 1U,
1U, 10000U); 1U, 10000U);
if (err < 0) { if (err < 0) {
bool is_locked; bool is_locked;
...@@ -393,7 +394,7 @@ static int hw_atl_utils_init_ucp(struct aq_hw_s *self, ...@@ -393,7 +394,7 @@ static int hw_atl_utils_init_ucp(struct aq_hw_s *self,
/* check 10 times by 1ms */ /* check 10 times by 1ms */
AQ_HW_WAIT_FOR(0U != (self->mbox_addr = AQ_HW_WAIT_FOR(0U != (self->mbox_addr =
aq_hw_read_reg(self, 0x360U)), 1000U, 10U); aq_hw_read_reg(self, 0x360U)), 1000U, 10U);
return err; return err;
} }
...@@ -425,7 +426,7 @@ int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size) ...@@ -425,7 +426,7 @@ int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size)
err = hw_atl_utils_fw_upload_dwords(self, self->rpc_addr, err = hw_atl_utils_fw_upload_dwords(self, self->rpc_addr,
(u32 *)(void *)&self->rpc, (u32 *)(void *)&self->rpc,
(rpc_size + sizeof(u32) - (rpc_size + sizeof(u32) -
sizeof(u8)) / sizeof(u32)); sizeof(u8)) / sizeof(u32));
if (err < 0) if (err < 0)
goto err_exit; goto err_exit;
...@@ -450,7 +451,7 @@ int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self, ...@@ -450,7 +451,7 @@ int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,
self->rpc_tid = sw.tid; self->rpc_tid = sw.tid;
AQ_HW_WAIT_FOR(sw.tid == AQ_HW_WAIT_FOR(sw.tid ==
(fw.val = (fw.val =
aq_hw_read_reg(self, HW_ATL_RPC_STATE_ADR), aq_hw_read_reg(self, HW_ATL_RPC_STATE_ADR),
fw.tid), 1000U, 100U); fw.tid), 1000U, 100U);
if (err < 0) if (err < 0)
...@@ -473,7 +474,7 @@ int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self, ...@@ -473,7 +474,7 @@ int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,
(u32 *)(void *) (u32 *)(void *)
&self->rpc, &self->rpc,
(fw.len + sizeof(u32) - (fw.len + sizeof(u32) -
sizeof(u8)) / sizeof(u8)) /
sizeof(u32)); sizeof(u32));
if (err < 0) if (err < 0)
goto err_exit; goto err_exit;
...@@ -506,9 +507,9 @@ int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self, ...@@ -506,9 +507,9 @@ int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self,
struct hw_aq_atl_utils_mbox_header *pmbox) struct hw_aq_atl_utils_mbox_header *pmbox)
{ {
return hw_atl_utils_fw_downld_dwords(self, return hw_atl_utils_fw_downld_dwords(self,
self->mbox_addr, self->mbox_addr,
(u32 *)(void *)pmbox, (u32 *)(void *)pmbox,
sizeof(*pmbox) / sizeof(u32)); sizeof(*pmbox) / sizeof(u32));
} }
void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self, void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,
...@@ -561,8 +562,8 @@ static int hw_atl_utils_mpi_set_state(struct aq_hw_s *self, ...@@ -561,8 +562,8 @@ static int hw_atl_utils_mpi_set_state(struct aq_hw_s *self,
transaction_id = mbox.transaction_id; transaction_id = mbox.transaction_id;
AQ_HW_WAIT_FOR(transaction_id != AQ_HW_WAIT_FOR(transaction_id !=
(hw_atl_utils_mpi_read_mbox(self, &mbox), (hw_atl_utils_mpi_read_mbox(self, &mbox),
mbox.transaction_id), mbox.transaction_id),
1000U, 100U); 1000U, 100U);
if (err < 0) if (err < 0)
goto err_exit; goto err_exit;
...@@ -659,9 +660,9 @@ int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self, ...@@ -659,9 +660,9 @@ int hw_atl_utils_get_mac_permanent(struct aq_hw_s *self,
if ((mac[0] & 0x01U) || ((mac[0] | mac[1] | mac[2]) == 0x00U)) { if ((mac[0] & 0x01U) || ((mac[0] | mac[1] | mac[2]) == 0x00U)) {
/* chip revision */ /* chip revision */
l = 0xE3000000U l = 0xE3000000U |
| (0xFFFFU & aq_hw_read_reg(self, HW_ATL_UCP_0X370_REG)) (0xFFFFU & aq_hw_read_reg(self, HW_ATL_UCP_0X370_REG)) |
| (0x00 << 16); (0x00 << 16);
h = 0x8001300EU; h = 0x8001300EU;
mac[5] = (u8)(0xFFU & l); mac[5] = (u8)(0xFFU & l);
......
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils.h
View file @ e9157848
...@@ -416,6 +416,7 @@ int hw_atl_utils_get_fw_version(struct aq_hw_s *self, u32 *fw_version); ...@@ -416,6 +416,7 @@ int hw_atl_utils_get_fw_version(struct aq_hw_s *self, u32 *fw_version);
int hw_atl_utils_update_stats(struct aq_hw_s *self); int hw_atl_utils_update_stats(struct aq_hw_s *self);
struct aq_stats_s *hw_atl_utils_get_hw_stats(struct aq_hw_s *self); struct aq_stats_s *hw_atl_utils_get_hw_stats(struct aq_hw_s *self);
int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a, int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a,
u32 *p, u32 cnt); u32 *p, u32 cnt);
......
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_utils_fw2x.c
View file @ e9157848
...@@ -76,7 +76,7 @@ static int aq_fw2x_init(struct aq_hw_s *self) ...@@ -76,7 +76,7 @@ static int aq_fw2x_init(struct aq_hw_s *self)
/* check 10 times by 1ms */ /* check 10 times by 1ms */
AQ_HW_WAIT_FOR(0U != (self->mbox_addr = AQ_HW_WAIT_FOR(0U != (self->mbox_addr =
aq_hw_read_reg(self, HW_ATL_FW2X_MPI_MBOX_ADDR)), aq_hw_read_reg(self, HW_ATL_FW2X_MPI_MBOX_ADDR)),
1000U, 10U); 1000U, 10U);
AQ_HW_WAIT_FOR(0U != (self->rpc_addr = AQ_HW_WAIT_FOR(0U != (self->rpc_addr =
aq_hw_read_reg(self, HW_ATL_FW2X_MPI_RPC_ADDR)), aq_hw_read_reg(self, HW_ATL_FW2X_MPI_RPC_ADDR)),
...@@ -213,7 +213,7 @@ static int aq_fw2x_update_link_status(struct aq_hw_s *self) ...@@ -213,7 +213,7 @@ static int aq_fw2x_update_link_status(struct aq_hw_s *self)
{ {
u32 mpi_state = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE_ADDR); u32 mpi_state = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE_ADDR);
u32 speed = mpi_state & (FW2X_RATE_100M | FW2X_RATE_1G | u32 speed = mpi_state & (FW2X_RATE_100M | FW2X_RATE_1G |
FW2X_RATE_2G5 | FW2X_RATE_5G | FW2X_RATE_10G); FW2X_RATE_2G5 | FW2X_RATE_5G | FW2X_RATE_10G);
struct aq_hw_link_status_s *link_status = &self->aq_link_status; struct aq_hw_link_status_s *link_status = &self->aq_link_status;
if (speed) { if (speed) {
...@@ -262,9 +262,7 @@ static int aq_fw2x_get_mac_permanent(struct aq_hw_s *self, u8 *mac) ...@@ -262,9 +262,7 @@ static int aq_fw2x_get_mac_permanent(struct aq_hw_s *self, u8 *mac)
get_random_bytes(&rnd, sizeof(unsigned int)); get_random_bytes(&rnd, sizeof(unsigned int));
l = 0xE3000000U l = 0xE3000000U | (0xFFFFU & rnd) | (0x00 << 16);
| (0xFFFFU & rnd)
| (0x00 << 16);
h = 0x8001300EU; h = 0x8001300EU;
mac[5] = (u8)(0xFFU & l); mac[5] = (u8)(0xFFU & l);
...@@ -294,7 +292,7 @@ int aq_fw2x_update_stats(struct aq_hw_s *self) ...@@ -294,7 +292,7 @@ int aq_fw2x_update_stats(struct aq_hw_s *self)
/* Wait FW to report back */ /* Wait FW to report back */
AQ_HW_WAIT_FOR(orig_stats_val != AQ_HW_WAIT_FOR(orig_stats_val !=
(aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE2_ADDR) & (aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE2_ADDR) &
BIT(CAPS_HI_STATISTICS)), BIT(CAPS_HI_STATISTICS)),
1U, 10000U); 1U, 10000U);
if (err) if (err)
return err; return err;
...@@ -466,5 +464,5 @@ const struct aq_fw_ops aq_fw_2x_ops = { ...@@ -466,5 +464,5 @@ const struct aq_fw_ops aq_fw_2x_ops = {
.set_power = aq_fw2x_set_power, .set_power = aq_fw2x_set_power,
.set_eee_rate = aq_fw2x_set_eee_rate, .set_eee_rate = aq_fw2x_set_eee_rate,
.get_eee_rate = aq_fw2x_get_eee_rate, .get_eee_rate = aq_fw2x_get_eee_rate,
.set_flow_control = aq_fw2x_set_flow_control, .set_flow_control = aq_fw2x_set_flow_control,
}; };
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