Commit ee3b1e7b authored by Petr Vandrovec's avatar Petr Vandrovec Committed by Linus Torvalds

[PATCH] matroxfb update + sparse annotations

This change switches matroxfb on x86 and x86_64 from dereferencing
pointers to {read,write}[bwl], as __pa() are gone from them, and so gcc
does not need an additional register for preserving address between
consecutive {read,write}[bwl].

Then it switches only supported architecture left (ppc/ppc64/arm) from
dereferencing pointers to __raw_{read,write}[bwl]. 

Third part is fixing sparse complaints: add __iomem here and there, and
switch one 1bit bitfield from int to unsigned int. 

After this there should be no sparse complaints in matroxfb.
Signed-off-by: default avatarPetr Vandrovec <vandrove@vc.cvut.cz>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent 8ada88c2
......@@ -99,21 +99,16 @@
#endif
#endif
#if defined(__alpha__) || defined(__mc68000__)
#if defined(__alpha__) || defined(__mc68000__) || defined(__i386__) || defined(__x86_64__)
#define READx_WORKS
#define MEMCPYTOIO_WORKS
#else
/* ppc/ppc64 must use __raw_{read,write}[bwl] as we drive adapter
in big-endian mode for compatibility with XFree mga driver, and
so we do not want little-endian {read,write}[bwl] */
#define READx_FAILS
/* recheck __ppc__, maybe that __ppc__ needs MEMCPYTOIO_WRITEL */
/* I benchmarked PII/350MHz with G200... MEMCPY, MEMCPYTOIO and WRITEL are on same speed ( <2% diff) */
/* so that means that G200 speed (or AGP speed?) is our limit... I do not have benchmark to test, how */
/* much of PCI bandwidth is used during transfers... */
#if defined(__i386__) || defined(__x86_64__)
#define MEMCPYTOIO_MEMCPY
#else
#define MEMCPYTOIO_WRITEL
#endif
#endif
#if defined(__mc68000__)
#define MAP_BUSTOVIRT
......@@ -160,7 +155,7 @@
#endif
typedef struct {
u_int8_t* vaddr;
u_int8_t __iomem* vaddr;
} vaddr_t;
#ifdef READx_WORKS
......@@ -189,27 +184,27 @@ static inline void mga_writel(vaddr_t va, unsigned int offs, u_int32_t value) {
}
#else
static inline unsigned int mga_readb(vaddr_t va, unsigned int offs) {
return *(volatile u_int8_t*)(va.vaddr + offs);
return __raw_readb(va.vaddr + offs);
}
static inline unsigned int mga_readw(vaddr_t va, unsigned int offs) {
return *(volatile u_int16_t*)(va.vaddr + offs);
return __raw_readw(va.vaddr + offs);
}
static inline u_int32_t mga_readl(vaddr_t va, unsigned int offs) {
return *(volatile u_int32_t*)(va.vaddr + offs);
return __raw_readl(va.vaddr + offs);
}
static inline void mga_writeb(vaddr_t va, unsigned int offs, u_int8_t value) {
*(volatile u_int8_t*)(va.vaddr + offs) = value;
__raw_writeb(value, va.vaddr + offs);
}
static inline void mga_writew(vaddr_t va, unsigned int offs, u_int16_t value) {
*(volatile u_int16_t*)(va.vaddr + offs) = value;
__raw_writew(value, va.vaddr + offs);
}
static inline void mga_writel(vaddr_t va, unsigned int offs, u_int32_t value) {
*(volatile u_int32_t*)(va.vaddr + offs) = value;
__raw_writel(value, va.vaddr + offs);
}
#endif
......@@ -238,8 +233,6 @@ static inline void mga_memcpy_toio(vaddr_t va, unsigned int offs, const void* sr
memcpy(&tmp, src, len);
mga_writel(va, offs, tmp);
}
#elif defined(MEMCPYTOIO_MEMCPY)
memcpy(va.vaddr + offs, src, len);
#else
#error "Sorry, do not know how to write block of data to device"
#endif
......@@ -249,7 +242,7 @@ static inline void vaddr_add(vaddr_t* va, unsigned long offs) {
va->vaddr += offs;
}
static inline void* vaddr_va(vaddr_t va) {
static inline void __iomem* vaddr_va(vaddr_t va) {
return va.vaddr;
}
......
......@@ -27,7 +27,7 @@ struct matroxfb_dh_fb_info {
unsigned int len;
} mmio;
int interlaced:1;
unsigned int interlaced:1;
u_int32_t cmap[17];
};
......
......@@ -391,7 +391,7 @@ void matroxfb_vgaHWrestore(WPMINFO2) {
CRITEND
}
static void get_pins(unsigned char* pins, struct matrox_bios* bd) {
static void get_pins(unsigned char __iomem* pins, struct matrox_bios* bd) {
unsigned int b0 = readb(pins);
if (b0 == 0x2E && readb(pins+1) == 0x41) {
......@@ -427,7 +427,7 @@ static void get_pins(unsigned char* pins, struct matrox_bios* bd) {
}
}
static void get_bios_version(unsigned char* vbios, struct matrox_bios* bd) {
static void get_bios_version(unsigned char __iomem * vbios, struct matrox_bios* bd) {
unsigned int pcir_offset;
pcir_offset = readb(vbios + 24) | (readb(vbios + 25) << 8);
......@@ -452,7 +452,7 @@ static void get_bios_version(unsigned char* vbios, struct matrox_bios* bd) {
}
}
static void get_bios_output(unsigned char* vbios, struct matrox_bios* bd) {
static void get_bios_output(unsigned char __iomem* vbios, struct matrox_bios* bd) {
unsigned char b;
b = readb(vbios + 0x7FF1);
......@@ -462,7 +462,7 @@ static void get_bios_output(unsigned char* vbios, struct matrox_bios* bd) {
bd->output.state = b;
}
static void get_bios_tvout(unsigned char* vbios, struct matrox_bios* bd) {
static void get_bios_tvout(unsigned char __iomem* vbios, struct matrox_bios* bd) {
unsigned int i;
/* Check for 'IBM .*(V....TVO' string - it means TVO BIOS */
......@@ -489,7 +489,7 @@ static void get_bios_tvout(unsigned char* vbios, struct matrox_bios* bd) {
}
}
static void parse_bios(unsigned char* vbios, struct matrox_bios* bd) {
static void parse_bios(unsigned char __iomem* vbios, struct matrox_bios* bd) {
unsigned int pins_offset;
if (readb(vbios) != 0x55 || readb(vbios + 1) != 0xAA) {
......@@ -738,7 +738,7 @@ void matroxfb_read_pins(WPMINFO2) {
pci_write_config_dword(pdev, PCI_OPTION_REG, opt);
#ifdef CONFIG_X86
if (!ACCESS_FBINFO(bios).bios_valid) {
unsigned char* b;
unsigned char __iomem* b;
b = ioremap(0x000C0000, 65536);
if (!b) {
......
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