Commit f114b45a authored by H Hartley Sweeten's avatar H Hartley Sweeten Committed by Greg Kroah-Hartman

staging: comedi: s626: define CRA/CRB registers based on channel number

Start cleaning up the 'struct s626_enc_info' by redefining the my_cra
and my_crb members based on the comedi channel number.
Signed-off-by: default avatarH Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: default avatarIan Abbott <abbotti@mev.co.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 860ba36c
......@@ -1322,8 +1322,8 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
.set_load_trig = s626_set_load_trig_a,
.set_mode = s626_set_mode_a,
.reset_cap_flags = s626_reset_cap_flags_a,
.my_cra = S626_LP_CR0A,
.my_crb = S626_LP_CR0B,
.my_cra = S626_LP_CRA(0),
.my_crb = S626_LP_CRB(0),
.my_latch_lsw = S626_LP_CNTR0ALSW,
.my_event_bits = S626_EVBITS(0),
}, {
......@@ -1337,8 +1337,8 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
.set_load_trig = s626_set_load_trig_a,
.set_mode = s626_set_mode_a,
.reset_cap_flags = s626_reset_cap_flags_a,
.my_cra = S626_LP_CR1A,
.my_crb = S626_LP_CR1B,
.my_cra = S626_LP_CRA(1),
.my_crb = S626_LP_CRB(1),
.my_latch_lsw = S626_LP_CNTR1ALSW,
.my_event_bits = S626_EVBITS(1),
}, {
......@@ -1352,8 +1352,8 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
.set_load_trig = s626_set_load_trig_a,
.set_mode = s626_set_mode_a,
.reset_cap_flags = s626_reset_cap_flags_a,
.my_cra = S626_LP_CR2A,
.my_crb = S626_LP_CR2B,
.my_cra = S626_LP_CRA(2),
.my_crb = S626_LP_CRB(2),
.my_latch_lsw = S626_LP_CNTR2ALSW,
.my_event_bits = S626_EVBITS(2),
}, {
......@@ -1367,8 +1367,8 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
.set_load_trig = s626_set_load_trig_b,
.set_mode = s626_set_mode_b,
.reset_cap_flags = s626_reset_cap_flags_b,
.my_cra = S626_LP_CR0A,
.my_crb = S626_LP_CR0B,
.my_cra = S626_LP_CRA(3),
.my_crb = S626_LP_CRB(3),
.my_latch_lsw = S626_LP_CNTR0BLSW,
.my_event_bits = S626_EVBITS(3),
}, {
......@@ -1382,8 +1382,8 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
.set_load_trig = s626_set_load_trig_b,
.set_mode = s626_set_mode_b,
.reset_cap_flags = s626_reset_cap_flags_b,
.my_cra = S626_LP_CR1A,
.my_crb = S626_LP_CR1B,
.my_cra = S626_LP_CRA(4),
.my_crb = S626_LP_CRB(4),
.my_latch_lsw = S626_LP_CNTR1BLSW,
.my_event_bits = S626_EVBITS(4),
}, {
......@@ -1397,8 +1397,8 @@ static const struct s626_enc_info s626_enc_chan_info[] = {
.set_load_trig = s626_set_load_trig_b,
.set_mode = s626_set_mode_b,
.reset_cap_flags = s626_reset_cap_flags_b,
.my_cra = S626_LP_CR2A,
.my_crb = S626_LP_CR2B,
.my_cra = S626_LP_CRA(5),
.my_crb = S626_LP_CRB(5),
.my_latch_lsw = S626_LP_CNTR2BLSW,
.my_event_bits = S626_EVBITS(5),
},
......
......@@ -229,13 +229,9 @@
#define S626_LP_RDEDGSEL(x) (0x004c + (x) * 0x10) /* R: edge selection */
#define S626_LP_RDCAPSEL(x) (0x004e + (x) * 0x10) /* R: capture enable */
/* Counter Registers (read/write): */
#define S626_LP_CR0A 0x0000 /* 0A setup register. */
#define S626_LP_CR0B 0x0002 /* 0B setup register. */
#define S626_LP_CR1A 0x0004 /* 1A setup register. */
#define S626_LP_CR1B 0x0006 /* 1B setup register. */
#define S626_LP_CR2A 0x0008 /* 2A setup register. */
#define S626_LP_CR2B 0x000A /* 2B setup register. */
/* Counter registers (read/write): 0A 1A 2A 0B 1B 2B */
#define S626_LP_CRA(x) (0x0000 + (((x) % 3) * 0x4))
#define S626_LP_CRB(x) (0x0002 + (((x) % 3) * 0x4))
/* Counter PreLoad (write) and Latch (read) Registers: */
#define S626_LP_CNTR0ALSW 0x000C /* 0A lsw. */
......
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