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nexedi
linux
Commits
fa1b4579
Commit
fa1b4579
authored
Jun 19, 2004
by
Linus Torvalds
Browse files
Options
Browse Files
Download
Plain Diff
Merge
bk://bk.arm.linux.org.uk/linux-2.6-rmk
into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents
f614ba1b
e9479a8d
Changes
44
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Inline
Side-by-side
Showing
44 changed files
with
74 additions
and
1242 deletions
+74
-1242
arch/arm/Kconfig
arch/arm/Kconfig
+4
-9
arch/arm/Makefile
arch/arm/Makefile
+0
-3
arch/arm/common/Makefile
arch/arm/common/Makefile
+0
-1
arch/arm/common/dmabounce.c
arch/arm/common/dmabounce.c
+5
-5
arch/arm/common/plx90x0.c
arch/arm/common/plx90x0.c
+0
-178
arch/arm/kernel/traps.c
arch/arm/kernel/traps.c
+1
-1
arch/arm/mach-ftvpci/Makefile
arch/arm/mach-ftvpci/Makefile
+0
-13
arch/arm/mach-ftvpci/core.c
arch/arm/mach-ftvpci/core.c
+0
-96
arch/arm/mach-ftvpci/leds.c
arch/arm/mach-ftvpci/leds.c
+0
-36
arch/arm/mach-ftvpci/pci.c
arch/arm/mach-ftvpci/pci.c
+0
-60
arch/arm/mach-pxa/generic.c
arch/arm/mach-pxa/generic.c
+18
-0
arch/arm/mach-tbox/Makefile
arch/arm/mach-tbox/Makefile
+0
-11
arch/arm/mach-tbox/core.c
arch/arm/mach-tbox/core.c
+0
-73
arch/arm/mm/consistent.c
arch/arm/mm/consistent.c
+1
-1
drivers/serial/pxa.c
drivers/serial/pxa.c
+2
-7
drivers/usb/gadget/pxa2xx_udc.c
drivers/usb/gadget/pxa2xx_udc.c
+2
-2
drivers/video/pxafb.c
drivers/video/pxafb.c
+2
-5
include/asm-arm/arch-nexuspci/dma.h
include/asm-arm/arch-nexuspci/dma.h
+0
-20
include/asm-arm/arch-nexuspci/hardware.h
include/asm-arm/arch-nexuspci/hardware.h
+0
-76
include/asm-arm/arch-nexuspci/io.h
include/asm-arm/arch-nexuspci/io.h
+0
-58
include/asm-arm/arch-nexuspci/irqs.h
include/asm-arm/arch-nexuspci/irqs.h
+0
-34
include/asm-arm/arch-nexuspci/memory.h
include/asm-arm/arch-nexuspci/memory.h
+0
-23
include/asm-arm/arch-nexuspci/param.h
include/asm-arm/arch-nexuspci/param.h
+0
-3
include/asm-arm/arch-nexuspci/system.h
include/asm-arm/arch-nexuspci/system.h
+0
-24
include/asm-arm/arch-nexuspci/time.h
include/asm-arm/arch-nexuspci/time.h
+0
-62
include/asm-arm/arch-nexuspci/timex.h
include/asm-arm/arch-nexuspci/timex.h
+0
-8
include/asm-arm/arch-nexuspci/uncompress.h
include/asm-arm/arch-nexuspci/uncompress.h
+0
-66
include/asm-arm/arch-nexuspci/vmalloc.h
include/asm-arm/arch-nexuspci/vmalloc.h
+0
-15
include/asm-arm/arch-omap/memory.h
include/asm-arm/arch-omap/memory.h
+20
-4
include/asm-arm/arch-pxa/hardware.h
include/asm-arm/arch-pxa/hardware.h
+5
-0
include/asm-arm/arch-tbox/dma.h
include/asm-arm/arch-tbox/dma.h
+0
-37
include/asm-arm/arch-tbox/hardware.h
include/asm-arm/arch-tbox/hardware.h
+0
-60
include/asm-arm/arch-tbox/io.h
include/asm-arm/arch-tbox/io.h
+0
-40
include/asm-arm/arch-tbox/irqs.h
include/asm-arm/arch-tbox/irqs.h
+0
-29
include/asm-arm/arch-tbox/memory.h
include/asm-arm/arch-tbox/memory.h
+0
-21
include/asm-arm/arch-tbox/param.h
include/asm-arm/arch-tbox/param.h
+0
-4
include/asm-arm/arch-tbox/serial.h
include/asm-arm/arch-tbox/serial.h
+0
-32
include/asm-arm/arch-tbox/system.h
include/asm-arm/arch-tbox/system.h
+0
-16
include/asm-arm/arch-tbox/time.h
include/asm-arm/arch-tbox/time.h
+0
-39
include/asm-arm/arch-tbox/timex.h
include/asm-arm/arch-tbox/timex.h
+0
-8
include/asm-arm/arch-tbox/uncompress.h
include/asm-arm/arch-tbox/uncompress.h
+0
-42
include/asm-arm/arch-tbox/vmalloc.h
include/asm-arm/arch-tbox/vmalloc.h
+0
-15
include/asm-arm/dma-mapping.h
include/asm-arm/dma-mapping.h
+4
-4
include/asm-arm/memory.h
include/asm-arm/memory.h
+10
-1
No files found.
arch/arm/Kconfig
View file @
fa1b4579
...
...
@@ -257,7 +257,7 @@ config DISCONTIGMEM
# Now handle the bus types
config PCI
bool "PCI support" if ARCH_INTEGRATOR_AP
default y if ARCH_
FTVPCI || ARCH_
SHARK || FOOTBRIDGE_HOST || ARCH_IOP3XX || ARCH_IXP4XX
default y if ARCH_SHARK || FOOTBRIDGE_HOST || ARCH_IOP3XX || ARCH_IXP4XX
help
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
...
...
@@ -270,11 +270,6 @@ config PCI
doesn't.
# Select the host bridge type
config PCI_HOST_PLX90X0
bool
depends on PCI && ARCH_FTVPCI
default y
config PCI_HOST_VIA82C505
bool
depends on PCI && ARCH_SHARK
...
...
@@ -550,7 +545,7 @@ config CMDLINE
config LEDS
bool "Timer and CPU usage LEDs"
depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_
FTVPCI || ARCH_
SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB
depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB
help
If you say Y here, the LEDs on your machine will be used
to provide useful information about your current system status.
...
...
@@ -564,7 +559,7 @@ config LEDS
config LEDS_TIMER
bool "Timer LED" if LEDS && (ARCH_NETWINDER || ARCH_EBSA285 || ARCH_SHARK || MACH_MAINSTONE || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_P720T || ARCH_VERSATILE_PB)
depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_
FTVPCI || ARCH_
SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB
depends on ARCH_NETWINDER || ARCH_EBSA110 || ARCH_EBSA285 || ARCH_SHARK || ARCH_CO285 || ARCH_SA1100 || ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_PXA_IDP || ARCH_INTEGRATOR || ARCH_CDB89712 || ARCH_P720T || ARCH_OMAP || ARCH_VERSATILE_PB
default y if ARCH_EBSA110
help
If you say Y here, one of the system LEDs (the green one on the
...
...
@@ -620,7 +615,7 @@ source "drivers/acorn/block/Kconfig"
source "net/Kconfig"
if ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX || ARCH_L7200 || ARCH_LH7A40X || ARCH_
FTVPCI || ARCH_
PXA || ARCH_RPC || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE
if ARCH_CLPS7500 || ARCH_IOP3XX || ARCH_IXP4XX || ARCH_L7200 || ARCH_LH7A40X || ARCH_PXA || ARCH_RPC || ARCH_S3C2410 || ARCH_SA1100 || ARCH_SHARK || FOOTBRIDGE
source "drivers/ide/Kconfig"
endif
...
...
arch/arm/Makefile
View file @
fa1b4579
...
...
@@ -74,9 +74,6 @@ textaddr-y := 0xC0008000
textaddr-$(CONFIG_ARCH_CO285)
:=
0x60008000
machine-$(CONFIG_ARCH_CO285)
:=
footbridge
incdir-$(CONFIG_ARCH_CO285)
:=
ebsa285
machine-$(CONFIG_ARCH_FTVPCI)
:=
ftvpci
incdir-$(CONFIG_ARCH_FTVPCI)
:=
nexuspci
machine-$(CONFIG_ARCH_TBOX)
:=
tbox
machine-$(CONFIG_ARCH_SHARK)
:=
shark
machine-$(CONFIG_ARCH_SA1100)
:=
sa1100
ifeq
($(CONFIG_ARCH_SA1100),y)
...
...
arch/arm/common/Makefile
View file @
fa1b4579
...
...
@@ -6,6 +6,5 @@ obj-y += platform.o
obj-$(CONFIG_ARM_AMBA)
+=
amba.o
obj-$(CONFIG_ICST525)
+=
icst525.o
obj-$(CONFIG_SA1111)
+=
sa1111.o
obj-$(CONFIG_PCI_HOST_PLX90X0)
+=
plx90x0.o
obj-$(CONFIG_PCI_HOST_VIA82C505)
+=
via82c505.o
obj-$(CONFIG_DMABOUNCE)
+=
dmabounce.o
arch/arm/common/dmabounce.c
View file @
fa1b4579
...
...
@@ -234,7 +234,7 @@ map_single(struct device *dev, void *ptr, size_t size,
}
}
dma_addr
=
virt_to_
bus
(
ptr
);
dma_addr
=
virt_to_
dma
(
dev
,
ptr
);
if
(
device_info
&&
dma_needs_bounce
(
dev
,
dma_addr
,
size
))
{
struct
safe_buffer
*
buf
;
...
...
@@ -248,7 +248,7 @@ map_single(struct device *dev, void *ptr, size_t size,
dev_dbg
(
dev
,
"%s: unsafe buffer %p (phy=%p) mapped to %p (phy=%p)
\n
"
,
__func__
,
buf
->
ptr
,
(
void
*
)
virt_to_
bus
(
buf
->
ptr
),
__func__
,
buf
->
ptr
,
(
void
*
)
virt_to_
dma
(
dev
,
buf
->
ptr
),
buf
->
safe
,
(
void
*
)
buf
->
safe_dma_addr
);
if
((
dir
==
DMA_TO_DEVICE
)
||
...
...
@@ -290,7 +290,7 @@ unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
dev_dbg
(
dev
,
"%s: unsafe buffer %p (phy=%p) mapped to %p (phy=%p)
\n
"
,
__func__
,
buf
->
ptr
,
(
void
*
)
virt_to_
bus
(
buf
->
ptr
),
__func__
,
buf
->
ptr
,
(
void
*
)
virt_to_
dma
(
dev
,
buf
->
ptr
),
buf
->
safe
,
(
void
*
)
buf
->
safe_dma_addr
);
...
...
@@ -342,7 +342,7 @@ sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
dev_dbg
(
dev
,
"%s: unsafe buffer %p (phy=%p) mapped to %p (phy=%p)
\n
"
,
__func__
,
buf
->
ptr
,
(
void
*
)
virt_to_
bus
(
buf
->
ptr
),
__func__
,
buf
->
ptr
,
(
void
*
)
virt_to_
dma
(
dev
,
buf
->
ptr
),
buf
->
safe
,
(
void
*
)
buf
->
safe_dma_addr
);
DO_STATS
(
device_info
->
bounce_count
++
);
...
...
@@ -367,7 +367,7 @@ sync_single(struct device *dev, dma_addr_t dma_addr, size_t size,
}
consistent_sync
(
buf
->
safe
,
size
,
dir
);
}
else
{
consistent_sync
(
bus_to_virt
(
dma_addr
),
size
,
dir
);
consistent_sync
(
dma_to_virt
(
dev
,
dma_addr
),
size
,
dir
);
}
}
...
...
arch/arm/common/plx90x0.c
deleted
100644 → 0
View file @
f614ba1b
/*
* Driver for PLX Technology PCI9000-series host bridge.
*
* Copyright (C) 1997, 1998, 1999, 2000 FutureTV Labs Ltd
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/ptrace.h>
#include <asm/irq.h>
#include <asm/mach/pci.h>
/*
* Since the following functions are all very similar, the common parts
* are pulled out into these macros.
*/
#define PLX_CLEAR_CONFIG \
__raw_writel(0, PLX_BASE + 0xac); \
local_irq_restore(flags); }
#define PLX_SET_CONFIG \
{ unsigned long flags; \
local_irq_save(flags); \
__raw_writel((1<<31 | (bus->number << 16) \
| (devfn << 8) | (where & ~3) \
| ((bus->number == 0)?0:1)), PLX_BASE + 0xac); \
#define PLX_CONFIG_WRITE(size) \
PLX_SET_CONFIG \
__raw_write##size(value, PCIO_BASE + (where & 3)); \
if (__raw_readw(PLX_BASE + 0x6) & 0x2000) \
__raw_writew(0x2000, PLX_BASE + 0x6); \
PLX_CLEAR_CONFIG \
return PCIBIOS_SUCCESSFUL;
#define PLX_CONFIG_READ(size) \
PLX_SET_CONFIG \
*value = __raw_read##size(PCIO_BASE + (where & 3)); \
if (__raw_readw(PLX_BASE + 0x6) & 0x2000) { \
__raw_writew(0x2000, PLX_BASE + 0x6); \
*value = 0xffffffffUL; \
} \
PLX_CLEAR_CONFIG \
return PCIBIOS_SUCCESSFUL;
/* Configuration space access routines */
static
int
plx90x0_read_config
(
struct
pci_bus
*
bus
,
unsigned
int
devfn
,
int
where
,
int
where
,
int
size
,
u32
*
value
)
{
switch
(
size
)
{
case
1
:
PLX_CONFIG_READ
(
b
)
break
;
case
2
:
PLX_CONFIG_READ
(
w
)
break
;
case
4
:
PLX_CONFIG_READ
(
l
)
break
;
}
return
PCIBIOS_SUCCESSFUL
;
}
static
int
plx90x0_write_config
(
struct
pci_bus
*
bus
,
unsigned
int
devfn
,
int
where
,
int
where
,
int
size
,
u32
value
)
{
switch
(
size
)
{
case
1
:
PLX_CONFIG_WRITE
(
b
)
break
;
case
2
:
PLX_CONFIG_WRITE
(
w
)
break
;
case
4
:
PLX_CONFIG_WRITE
(
l
)
break
;
}
return
PCIBIOS_SUCCESSFUL
;
}
static
struct
pci_ops
plx90x0_ops
=
{
.
read
=
plx90x0_read_config
,
.
write
=
plx90x0_write_config
,
};
static
void
plx_syserr_handler
(
int
irq
,
void
*
handle
,
struct
pt_regs
*
regs
)
{
printk
(
"PLX90x0: machine check %04x (pc=%08lx)
\n
"
,
readw
(
PLX_BASE
+
6
),
regs
->
ARM_pc
);
__raw_writew
(
0xf000
,
PLX_BASE
+
6
);
}
/*
* Initialise the PCI system.
*/
void
__init
plx90x0_init
(
struct
arm_sysdata
*
sysdata
)
{
static
const
unsigned
long
int
base
=
PLX_BASE
;
char
*
what
;
unsigned
long
bar
=
(
unsigned
long
)
virt_to_bus
((
void
*
)
PAGE_OFFSET
);
/* Have a sniff around and see which PLX device is present. */
unsigned
long
id
=
__raw_readl
(
base
+
0xf0
);
#if 0
/* This check was a good idea, but can fail. The PLX9060 puts no
default value in these registers unless NB# is asserted (which it
isn't on these cards). */
if ((id & 0xffff) != PCI_VENDOR_ID_PLX)
return; /* Nothing found */
#endif
/* Found one - now work out what it is. */
switch
(
id
>>
16
)
{
case
0
:
/* PCI_DEVICE_ID_PLX_9060 */
what
=
"PCI9060"
;
break
;
case
PCI_DEVICE_ID_PLX_9060ES
:
what
=
"PCI9060ES"
;
break
;
case
PCI_DEVICE_ID_PLX_9060SD
:
what
=
"PCI9060SD"
;
/* uhuhh.. */
break
;
case
PCI_DEVICE_ID_PLX_9080
:
what
=
"PCI9080"
;
break
;
default:
printk
(
"PCI: Unknown PLX device %04lx found -- ignored.
\n
"
,
id
>>
16
);
return
;
}
printk
(
"PCI: PLX Technology %s host bridge found.
\n
"
,
what
);
/* Now set it up for both master and slave accesses. */
__raw_writel
(
0xffff0147
,
base
+
0x4
);
__raw_writeb
(
32
,
base
+
0xd
);
__raw_writel
(
0x8
|
bar
,
base
+
0x18
);
__raw_writel
(
0xf8000008
,
base
+
0x80
);
__raw_writel
(
0x40000001
,
base
+
0x84
);
__raw_writel
(
0
,
base
+
0x88
);
__raw_writel
(
0
,
base
+
0x8c
);
__raw_writel
(
0x11
,
base
+
0x94
);
__raw_writel
(
0xC3
+
(
4
<<
28
)
+
(
8
<<
11
)
+
(
1
<<
10
)
+
(
1
<<
24
),
base
+
0x98
);
__raw_writel
(
0xC0000000
,
base
+
0x9c
);
__raw_writel
(
PLX_MEM_START
,
base
+
0xa0
);
__raw_writel
(
PLX_IO_START
,
base
+
0xa4
);
__raw_writel
(
0x3
,
base
+
0xa8
);
__raw_writel
(
0
,
base
+
0xac
);
__raw_writel
(
0x10001
,
base
+
0xe8
);
__raw_writel
(
0x8000767e
,
base
+
0xec
);
request_irq
(
IRQ_SYSERR
,
plx_syserr_handler
,
0
,
"system error"
,
NULL
);
pci_scan_bus
(
0
,
&
plx90x0_ops
,
sysdata
);
}
arch/arm/kernel/traps.c
View file @
fa1b4579
...
...
@@ -426,7 +426,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs)
/*
* Flush a region from virtual address 'r0' to virtual address 'r1'
* _
in
clusive_. There is no alignment requirement on either address;
* _
ex
clusive_. There is no alignment requirement on either address;
* user space does not need to know the hardware cache layout.
*
* r2 contains flags. It should ALWAYS be passed as ZERO until it
...
...
arch/arm/mach-ftvpci/Makefile
deleted
100644 → 0
View file @
f614ba1b
#
# Makefile for the linux kernel.
#
# Object file lists.
obj-y
:=
core.o
obj-m
:=
obj-n
:=
obj-
:=
obj-$(CONFIG_PCI)
+=
pci.o
obj-$(CONFIG_LEDS)
+=
leds.o
arch/arm/mach-ftvpci/core.c
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/arch/arm/mach-ftvpci/core.c
*
* Architecture specific fixups.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/init.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/page.h>
extern
unsigned
long
soft_irq_mask
;
static
const
unsigned
char
irq_cmd
[]
=
{
INTCONT_IRQ_DUART
,
INTCONT_IRQ_PLX
,
INTCONT_IRQ_D
,
INTCONT_IRQ_C
,
INTCONT_IRQ_B
,
INTCONT_IRQ_A
,
INTCONT_IRQ_SYSERR
};
static
void
ftvpci_mask_irq
(
unsigned
int
irq
)
{
__raw_writel
(
irq_cmd
[
irq
],
INTCONT_BASE
);
soft_irq_mask
&=
~
(
1
<<
irq
);
}
static
void
ftvpci_unmask_irq
(
unsigned
int
irq
)
{
soft_irq_mask
|=
(
1
<<
irq
);
__raw_writel
(
irq_cmd
[
irq
]
|
1
,
INTCONT_BASE
);
}
static
void
__init
ftvpci_init_irq
(
void
)
{
unsigned
int
i
;
/* Mask all FIQs */
__raw_writel
(
INTCONT_FIQ_PLX
,
INTCONT_BASE
);
__raw_writel
(
INTCONT_FIQ_D
,
INTCONT_BASE
);
__raw_writel
(
INTCONT_FIQ_C
,
INTCONT_BASE
);
__raw_writel
(
INTCONT_FIQ_B
,
INTCONT_BASE
);
__raw_writel
(
INTCONT_FIQ_A
,
INTCONT_BASE
);
__raw_writel
(
INTCONT_FIQ_SYSERR
,
INTCONT_BASE
);
/* Disable all interrupts initially. */
for
(
i
=
0
;
i
<
NR_IRQS
;
i
++
)
{
if
(
i
>=
FIRST_IRQ
&&
i
<=
LAST_IRQ
)
{
irq_desc
[
i
].
valid
=
1
;
irq_desc
[
i
].
probe_ok
=
1
;
irq_desc
[
i
].
mask_ack
=
ftvpci_mask_irq
;
irq_desc
[
i
].
mask
=
ftvpci_mask_irq
;
irq_desc
[
i
].
unmask
=
ftvpci_unmask_irq
;
ftvpci_mask_irq
(
i
);
}
else
{
irq_desc
[
i
].
valid
=
0
;
irq_desc
[
i
].
probe_ok
=
0
;
}
}
}
static
struct
map_desc
ftvpci_io_desc
[]
__initdata
=
{
{
INTCONT_BASE
,
INTCONT_START
,
0x00001000
,
MT_DEVICE
},
{
PLX_BASE
,
PLX_START
,
0x00001000
,
MT_DEVICE
},
{
PCIO_BASE
,
PLX_IO_START
,
0x00100000
,
MT_DEVICE
},
{
DUART_BASE
,
DUART_START
,
0x00001000
,
MT_DEVICE
},
{
STATUS_BASE
,
STATUS_START
,
0x00001000
,
MT_DEVICE
}
};
static
void
__init
ftvpci_map_io
(
void
)
{
iotable_init
(
ftvpci_io_desc
,
ARRAY_SIZE
(
ftvpci_io_desc
));
}
MACHINE_START
(
NEXUSPCI
,
"FTV/PCI"
)
MAINTAINER
(
"Philip Blundell"
)
BOOT_MEM
(
0x40000000
,
0x10000000
,
0xe0000000
)
MAPIO
(
ftvpci_map_io
)
INITIRQ
(
ftvpci_init_irq
)
MACHINE_END
arch/arm/mach-ftvpci/leds.c
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/arch/arm/kernel/leds-ftvpci.c
*
* Copyright (C) 1999 FutureTV Labs Ltd
*/
#include <linux/module.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/leds.h>
#include <asm/system.h>
#include <asm/io.h>
static
void
ftvpci_leds_event
(
led_event_t
ledevt
)
{
static
int
led_state
=
0
;
switch
(
ledevt
)
{
case
led_timer
:
led_state
^=
1
;
raw_writeb
(
0x1a
|
led_state
,
INTCONT_BASE
);
break
;
default:
break
;
}
}
static
int
__init
ftvpci_leds_init
(
void
)
{
leds_event
=
ftvpci_leds_event
;
return
0
;
}
arch_initcall
(
ftvpci_leds_init
);
arch/arm/mach-ftvpci/pci.c
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/arch/arm/kernel/ftv-pci.c
*
* PCI bios-type initialisation for PCI machines
*
* Bits taken from various places.
*/
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <asm/irq.h>
#include <asm/mach/pci.h>
#include <asm/mach-types.h>
/*
* Owing to a PCB cockup, issue A backplanes are wired thus:
*
* Slot 1 2 3 4 5 Bridge S1 S2 S3 S4
* IRQ D C B A A C B A D
* A D C B B D C B A
* B A D C C A D C B
* C B A D D B A D C
*
* ID A31 A30 A29 A28 A27 A26 DEV4 DEV5 DEV6 DEV7
*
* Actually, this isn't too bad, because with the processor card
* in slot 5 on the primary bus, the IRQs rotate on both sides
* as you'd expect.
*/
static
int
irqmap_ftv
[]
__initdata
=
{
IRQ_PCI_D
,
IRQ_PCI_C
,
IRQ_PCI_B
,
IRQ_PCI_A
};
static
int
__init
ftv_map_irq
(
struct
pci_dev
*
dev
,
u8
slot
,
u8
pin
)
{
if
(
slot
>
0x10
)
slot
--
;
return
irqmap_ftv
[(
slot
-
pin
)
&
3
];
}
static
u8
__init
ftv_swizzle
(
struct
pci_dev
*
dev
,
u8
*
pin
)
{
return
PCI_SLOT
(
dev
->
devfn
);
}
/* ftv host-specific stuff */
static
struct
hw_pci
ftv_pci
__initdata
=
{
.
init
=
plx90x0_init
,
.
swizzle
=
ftv_swizzle
,
.
map_irq
=
ftv_map_irq
,
};
static
int
__init
ftv_pci_init
(
void
)
{
if
(
machine_is_ftvpci
())
pci_common_init
(
&
ftv_pci
);
return
0
;
}
subsys_initcall
(
ftv_pci_init
);
arch/arm/mach-pxa/generic.c
View file @
fa1b4579
...
...
@@ -58,6 +58,24 @@ void pxa_gpio_mode(int gpio_mode)
EXPORT_SYMBOL
(
pxa_gpio_mode
);
/*
* Routine to safely enable or disable a clock in the CKEN
*/
void
pxa_set_cken
(
int
clock
,
int
enable
)
{
unsigned
long
flags
;
local_irq_save
(
flags
);
if
(
enable
)
CKEN
|=
clock
;
else
CKEN
&=
~
clock
;
local_irq_restore
(
flags
);
}
EXPORT_SYMBOL
(
pxa_set_cken
);
/*
* Intel PXA2xx internal register mapping.
*
...
...
arch/arm/mach-tbox/Makefile
deleted
100644 → 0
View file @
f614ba1b
#
# Makefile for the linux kernel.
#
# Object file lists.
obj-y
:=
core.o
obj-m
:=
obj-n
:=
obj-
:=
arch/arm/mach-tbox/core.c
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/arch/arm/mm/mm-tbox.c
*
* Copyright (C) 1998, 1999, 2000 Phil Blundell
* Copyright (C) 1998-1999 Russell King
*
* Extra MM routines for the Tbox architecture
*/
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/init.h>
#include <asm/elf.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
extern
unsigned
long
soft_irq_mask
;
static
void
tbox_mask_irq
(
unsigned
int
irq
)
{
__raw_writel
(
0
,
INTCONT
+
(
irq
<<
2
));
soft_irq_mask
&=
~
(
1
<<
irq
);
}
static
void
tbox_unmask_irq
(
unsigned
int
irq
)
{
soft_irq_mask
|=
(
1
<<
irq
);
__raw_writel
(
1
,
INTCONT
+
(
irq
<<
2
));
}
static
void
tbox_init_irq
(
void
)
{
unsigned
int
i
;
/* Disable all interrupts initially. */
for
(
i
=
0
;
i
<
NR_IRQS
;
i
++
)
{
if
(
i
<=
10
||
(
i
>=
12
&&
i
<=
13
))
{
irq_desc
[
i
].
valid
=
1
;
irq_desc
[
i
].
probe_ok
=
0
;
irq_desc
[
i
].
mask_ack
=
tbox_mask_irq
;
irq_desc
[
i
].
mask
=
tbox_mask_irq
;
irq_desc
[
i
].
unmask
=
tbox_unmask_irq
;
tbox_mask_irq
(
i
);
}
else
{
irq_desc
[
i
].
valid
=
0
;
irq_desc
[
i
].
probe_ok
=
0
;
}
}
}
static
struct
map_desc
tbox_io_desc
[]
__initdata
=
{
/* See hardware.h for details */
{
IO_BASE
,
IO_START
,
0x00100000
,
MT_DEVICE
}
};
static
void
__init
tbox_map_io
(
void
)
{
iotable_init
(
tbox_io_desc
,
ARRAY_SIZE
(
tbox_io_desc
));
}
MACHINE_START
(
TBOX
,
"unknown-TBOX"
)
MAINTAINER
(
"Philip Blundell"
)
BOOT_MEM
(
0x80000000
,
0x00400000
,
0xe0000000
)
MAPIO
(
tbox_map_io
)
INITIRQ
(
tbox_init_irq
)
MACHINE_END
arch/arm/mm/consistent.c
View file @
fa1b4579
...
...
@@ -194,7 +194,7 @@ __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, int gfp,
/*
* Set the "dma handle"
*/
*
handle
=
page_to_
bus
(
page
);
*
handle
=
page_to_
dma
(
dev
,
page
);
do
{
BUG_ON
(
!
pte_none
(
*
pte
));
...
...
drivers/serial/pxa.c
View file @
fa1b4579
...
...
@@ -571,14 +571,9 @@ serial_pxa_pm(struct uart_port *port, unsigned int state,
unsigned
int
oldstate
)
{
struct
uart_pxa_port
*
up
=
(
struct
uart_pxa_port
*
)
port
;
if
(
state
)
{
/* sleep */
CKEN
&=
~
up
->
cken
;
}
else
{
/* wake */
CKEN
|=
up
->
cken
;
pxa_set_cken
(
up
->
cken
,
!
state
);
if
(
!
state
)
udelay
(
1
);
}
}
static
void
serial_pxa_release_port
(
struct
uart_port
*
port
)
...
...
drivers/usb/gadget/pxa2xx_udc.c
View file @
fa1b4579
...
...
@@ -1406,7 +1406,7 @@ static void udc_disable(struct pxa2xx_udc *dev)
#ifdef CONFIG_ARCH_PXA
/* Disable clock for USB device */
CKEN
&=
~
CKEN11_USB
;
pxa_set_cken
(
CKEN11_USB
,
0
)
;
#endif
ep0_idle
(
dev
);
...
...
@@ -1452,7 +1452,7 @@ static void udc_enable (struct pxa2xx_udc *dev)
#ifdef CONFIG_ARCH_PXA
/* Enable clock for USB device */
CKEN
|=
CKEN11_USB
;
pxa_set_cken
(
CKEN11_USB
,
1
)
;
#endif
/* try to clear these bits before we enable the udc */
...
...
drivers/video/pxafb.c
View file @
fa1b4579
...
...
@@ -1016,7 +1016,7 @@ static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev)
struct
pxafb_mach_info
*
inf
=
dev
->
platform_data
;
/* Alloc the pxafb_info and pseudo_palette in one step */
fbi
=
kmalloc
(
sizeof
(
struct
pxafb_info
)
+
sizeof
(
u32
)
*
1
7
,
GFP_KERNEL
);
fbi
=
kmalloc
(
sizeof
(
struct
pxafb_info
)
+
sizeof
(
u32
)
*
1
6
,
GFP_KERNEL
);
if
(
!
fbi
)
return
NULL
;
...
...
@@ -1237,7 +1237,6 @@ int __init pxafb_probe(struct device *dev)
{
struct
pxafb_info
*
fbi
;
struct
pxafb_mach_info
*
inf
;
unsigned
long
flags
;
int
ret
;
dev_dbg
(
dev
,
"pxafb_probe
\n
"
);
...
...
@@ -1301,9 +1300,7 @@ int __init pxafb_probe(struct device *dev)
goto
failed
;
}
/* enable LCD controller clock */
local_irq_save
(
flags
);
CKEN
|=
CKEN16_LCD
;
local_irq_restore
(
flags
);
pxa_set_cken
(
CKEN16_LCD
,
1
);
ret
=
request_irq
(
IRQ_LCD
,
pxafb_handle_irq
,
SA_INTERRUPT
,
"LCD"
,
fbi
);
if
(
ret
)
{
...
...
include/asm-arm/arch-nexuspci/dma.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-nexuspci/dma.h
*
* Architecture DMA routines
*
* Copyright (C) 1998, 1999 Philip Blundell
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
/*
* This is the maximum DMA address that can be DMAd to.
*/
#define MAX_DMA_ADDRESS 0xffffffff
#define MAX_DMA_CHANNELS 0
include/asm-arm/arch-nexuspci/hardware.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-nexuspci/hardware.h
*
* Copyright (C) 1998, 1999, 2000 FutureTV Labs Ltd.
*
* This file contains the hardware definitions of the FTV PCI card.
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
/* Logical Physical
* 0xffe00000 0x20000000 INTCONT
* 0xffd00000 0x30000000 Status
* 0xffc00000 0x60000000 PLX registers
* 0xfe000000 0xC0000000 PCI I/O
* 0xfd000000 0x70000000 cache flush
* 0xfc000000 0x80000000 PCI/ISA memory
* 0xe0000000 0x10000000 SCC2691 DUART
*/
/*
* Mapping areas
*/
#define INTCONT_BASE 0xffe00000
#define STATUS_BASE 0xffd00000
#define PLX_BASE 0xffc00000
#define PCIO_BASE 0xfe000000
#define FLUSH_BASE 0xfd000000
#define DUART_BASE 0xe0000000
#define PCIMEM_BASE 0xfc000000
#define PLX_IO_START 0xC0000000
#define PLX_MEM_START 0x80000000
#define PLX_START 0x60000000
#define STATUS_START 0x30000000
#define INTCONT_START 0x20000000
#define DUART_START 0x10000000
/*
* RAM definitions
*/
#define RAM_BASE 0x40000000
#define FLUSH_BASE_PHYS 0x70000000
/*
* Miscellaneous INTCONT bits
*/
#define INTCONT_FIQ_PLX 0x00
#define INTCONT_FIQ_D 0x02
#define INTCONT_FIQ_C 0x04
#define INTCONT_FIQ_B 0x06
#define INTCONT_FIQ_A 0x08
#define INTCONT_FIQ_SYSERR 0x0a
#define INTCONT_IRQ_DUART 0x0c
#define INTCONT_IRQ_PLX 0x0e
#define INTCONT_IRQ_D 0x10
#define INTCONT_IRQ_C 0x12
#define INTCONT_IRQ_B 0x14
#define INTCONT_IRQ_A 0x16
#define INTCONT_IRQ_SYSERR 0x1e
#define INTCONT_WATCHDOG 0x18
#define INTCONT_LED 0x1a
#define INTCONT_PCI_RESET 0x1c
#define UNCACHEABLE_ADDR STATUS_BASE
#endif
include/asm-arm/arch-nexuspci/io.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-nexuspci/io.h
*
* Copyright (C) 1997-1999 Russell King
* Copyright (C) 2000 FutureTV Labs Ltd.
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffff
/*
* Translation of various region addresses to virtual addresses
*/
#define __io(a) (PCIO_BASE + (a))
#if 1
#define __mem_pci(a) ((unsigned long)(a))
#define __mem_isa(a) (PCIMEM_BASE + (unsigned long)(a))
#else
static
inline
unsigned
long
___mem_pci
(
unsigned
long
a
)
{
/* PCI addresses must have been ioremapped */
if
(
a
<=
0xc0000000
||
a
>=
0xe0000000
)
*
((
int
*
)
0
)
=
0
;
return
a
;
}
static
inline
unsigned
long
___mem_isa
(
unsigned
long
a
)
{
BUG_ON
(
a
>=
16
*
1048576
);
return
PCIMEM_BASE
+
a
;
}
#define __mem_pci(a) ___mem_pci((unsigned long)(a))
#define __mem_isa(a) ___mem_isa((unsigned long)(a))
#endif
/*
* ioremap support - validate a PCI memory address,
* and convert a PCI memory address to a physical
* address for the page tables.
*/
#define iomem_valid_addr(iomem,sz) \
((iomem) < 0x80000000 && (iomem) + (sz) <= 0x80000000)
#define iomem_to_phys(iomem) ((iomem) + PLX_MEM_START)
#define __arch_ioremap(off,sz,nocache) \
({ \
unsigned long _off = (off), _size = (sz); \
void *_ret = (void *)0; \
if (iomem_valid_addr(_off, _size)) \
_ret = __ioremap(iomem_to_phys(_off),_size,0); \
_ret; \
})
#define __arch_iounmap __iounmap
#endif
include/asm-arm/arch-nexuspci/irqs.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-nexuspci/irqs.h
*
* Copyright (C) 1997, 1998, 2000 Philip Blundell
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
/*
* The hardware is capable of routing any interrupt source (except the
* DUART) to either IRQ or FIQ. We ignore FIQ and use IRQ exclusively
* for simplicity.
*/
#define IRQ_DUART 0
#define IRQ_PLX 1
#define IRQ_PCI_D 2
#define IRQ_PCI_C 3
#define IRQ_PCI_B 4
#define IRQ_PCI_A 5
#define IRQ_SYSERR 6
/* only from IOSLAVE rev B */
#define FIRST_IRQ IRQ_DUART
#define LAST_IRQ IRQ_SYSERR
/* timer is part of the DUART */
#define IRQ_TIMER IRQ_DUART
#define irq_canonicalize(i) (i)
include/asm-arm/arch-nexuspci/memory.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-nexuspci/memory.h
*
* Copyright (c) 1997, 1998, 2000 FutureTV Labs Ltd.
* Copyright (c) 1999 Russell King
*
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x40000000UL)
#define BUS_OFFSET (0xe0000000UL)
/*
* On the PCI bus the DRAM appears at address 0xe0000000
*/
#define __virt_to_bus(x) ((unsigned long)(x) - PAGE_OFFSET + BUS_OFFSET)
#define __bus_to_virt(x) ((unsigned long)(x) + PAGE_OFFSET - BUS_OFFSET)
#endif
include/asm-arm/arch-nexuspci/param.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-nexuspci/param.h
*/
include/asm-arm/arch-nexuspci/system.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-nexuspci/system.h
*
* Copyright (c) 1996, 97, 98, 99, 2000 FutureTV Labs Ltd.
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static
inline
void
arch_idle
(
void
)
{
cpu_do_idle
();
}
#define arch_reset(mode) do { } while (0)
#endif
include/asm-arm/arch-nexuspci/time.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-nexuspci/time.h
*
* Copyright (c) 1997, 1998, 1999, 2000 FutureTV Labs Ltd.
*
* The FTV PCI card has no real-time clock. We get timer ticks from the
* SCC chip.
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
static
irqreturn_t
timer_interrupt
(
int
irq
,
void
*
dev_id
,
struct
pt_regs
*
regs
)
{
static
int
count
=
25
;
unsigned
char
stat
=
__raw_readb
(
DUART_BASE
+
0x14
);
if
(
!
(
stat
&
0x10
))
return
;
/* Not for us */
/* Reset counter */
__raw_writeb
(
0x90
,
DUART_BASE
+
8
);
if
(
--
count
==
0
)
{
static
int
state
=
1
;
state
^=
1
;
__raw_writeb
(
0x1a
+
state
,
INTCONT_BASE
);
__raw_writeb
(
0x18
+
state
,
INTCONT_BASE
);
count
=
50
;
}
/* Wait for slow rise time */
__raw_readb
(
DUART_BASE
+
0x14
);
__raw_readb
(
DUART_BASE
+
0x14
);
__raw_readb
(
DUART_BASE
+
0x14
);
__raw_readb
(
DUART_BASE
+
0x14
);
__raw_readb
(
DUART_BASE
+
0x14
);
__raw_readb
(
DUART_BASE
+
0x14
);
do_timer
(
regs
);
return
IRQ_HANDLED
;
}
void
__init
time_init
(
void
)
{
int
tick
=
3686400
/
16
/
2
/
100
;
__raw_writeb
(
tick
&
0xff
,
DUART_BASE
+
0x1c
);
__raw_writeb
(
tick
>>
8
,
DUART_BASE
+
0x18
);
__raw_writeb
(
0x80
,
DUART_BASE
+
8
);
__raw_writeb
(
0x10
,
DUART_BASE
+
0x14
);
timer_irq
.
handler
=
timer_interrupt
;
timer_irq
.
flags
=
SA_SHIRQ
;
setup_irq
(
IRQ_TIMER
,
&
timer_irq
);
}
include/asm-arm/arch-nexuspci/timex.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-nexuspci/timex.h
*
* NexusPCI StrongARM card timex specifications
*
* Copyright (C) 1998 Philip Blundell
*/
include/asm-arm/arch-nexuspci/uncompress.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-nexuspci/uncompress.h
*
* Copyright (C) 1998, 1999, 2000 Philip Blundell
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <asm/hardware.h>
#include <asm/io.h>
/*
* Write a character to the UART
*/
void
_ll_write_char
(
char
c
)
{
while
(
!
(
__raw_readb
(
DUART_START
+
0x4
)
&
0x4
))
;
__raw_writeb
(
c
,
DUART_START
+
0xc
);
}
/*
* This does not append a newline
*/
static
void
puts
(
const
char
*
s
)
{
while
(
*
s
)
{
if
(
*
s
==
'\n'
)
_ll_write_char
(
'\r'
);
_ll_write_char
(
*
(
s
++
));
}
}
/*
* Set up for decompression
*/
static
void
arch_decomp_setup
(
void
)
{
/* LED off */
__raw_writel
(
INTCONT_LED
,
INTCONT_START
);
/* Set up SCC */
__raw_writeb
(
42
,
DUART_START
+
8
);
__raw_writeb
(
48
,
DUART_START
+
8
);
__raw_writeb
(
16
,
DUART_START
+
8
);
__raw_writeb
(
0x93
,
DUART_START
);
__raw_writeb
(
0x17
,
DUART_START
);
__raw_writeb
(
0xbb
,
DUART_START
+
4
);
__raw_writeb
(
0x78
,
DUART_START
+
16
);
__raw_writeb
(
0xa0
,
DUART_START
+
8
);
__raw_writeb
(
5
,
DUART_START
+
8
);
}
/*
* Stroke the watchdog so we don't get reset during decompression.
*/
static
inline
void
arch_decomp_wdog
(
void
)
{
__raw_writel
(
INTCONT_WATCHDOG
,
INTCONT_START
);
__raw_writel
(
INTCONT_WATCHDOG
|
1
,
INTCONT_START
);
}
include/asm-arm/arch-nexuspci/vmalloc.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-nexuspci/vmalloc.h
*/
/*
* Just any arbitrary offset to the start of the vmalloc VM area: the
* current 8MB value just means that there will be a 8MB "hole" after the
* physical memory until the kernel virtual memory starts. That means that
* any out-of-bounds memory accesses will hopefully be caught.
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x20000000)
include/asm-arm/arch-omap/memory.h
View file @
fa1b4579
...
...
@@ -57,12 +57,28 @@
/*
* OMAP-1510 bus address is translated into a Local Bus address if the
* OMAP bus type is lbus. See dmadev_uses_omap_lbus().
* OMAP bus type is lbus. We do the address translation based on the
* device overriding the defaults used in the dma-mapping API.
*/
#ifdef CONFIG_ARCH_OMAP1510
#define bus_to_lbus(x) ((x) + (OMAP1510_LB_OFFSET - PHYS_OFFSET))
#define lbus_to_bus(x) ((x) - (OMAP1510_LB_OFFSET - PHYS_OFFSET))
#endif
#define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET)
#define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET)
#define is_lbus_device(dev) (cpu_is_omap1510() && dev->coherent_dma_mask == 0x0fffffff)
#define __arch_page_to_dma(dev, page) ({is_lbus_device(dev) ? \
(dma_addr_t)virt_to_lbus(page_address(page)) : \
(dma_addr_t)__virt_to_bus(page_address(page));})
#define __arch_dma_to_virt(dev, addr) ({is_lbus_device(dev) ? \
lbus_to_virt(addr) : \
__bus_to_virt(addr);})
#define __arch_virt_to_dma(dev, addr) ({is_lbus_device(dev) ? \
virt_to_lbus(addr) : \
__virt_to_bus(addr);})
#endif
/* CONFIG_ARCH_OMAP1510 */
#define PHYS_TO_NID(addr) (0)
#endif
...
...
include/asm-arm/arch-pxa/hardware.h
View file @
fa1b4579
...
...
@@ -82,6 +82,11 @@ typedef struct { volatile u32 offset[4096]; } __regbase;
*/
extern
void
pxa_gpio_mode
(
int
gpio_mode
);
/*
* Routine to enable or disable CKEN
*/
extern
void
pxa_set_cken
(
int
clock
,
int
enable
);
/*
* return current memory and LCD clock frequency in units of 10kHz
*/
...
...
include/asm-arm/arch-tbox/dma.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-tbox/dma.h
*
* Architecture DMA routines. We have to contend with the bizarre DMA
* machine built into the Tbox hardware.
*
* Copyright (C) 1998 Philip Blundell
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
/*
* DMA channel definitions. Some of these are physically strange but
* we sort it out inside dma.c so the user never has to care. The
* exception is the double-buffering which we can't really abstract
* away sensibly.
*/
#define DMA_VIDEO 0
#define DMA_MPEG_B 1
#define DMA_AUDIO_B 2
#define DMA_ASHRX_B 3
#define DMA_ASHTX 4
#define DMA_MPEG 5
#define DMA_AUDIO 6
#define DMA_ASHRX 7
#define MAX_DMA_CHANNELS 0
/* XXX */
/*
* This is the maximum DMA address that can be DMAd to.
*/
#define MAX_DMA_ADDRESS 0xffffffff
include/asm-arm/arch-tbox/hardware.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-tbox/hardware.h
*
* Copyright (C) 1998, 1999, 2000 Philip Blundell
* Copyright (C) 2000 FutureTV Labs Ltd
*
* This file contains the hardware definitions of the Tbox
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
/* Logical Physical
* 0xfff00000 0x00100000 I/O
* 0xfff00000 0x00100000 Expansion CS0
* 0xfff10000 0x00110000 DMA
* 0xfff20000 0x00120000 C-Cube
* 0xfff30000 0x00130000 FPGA 1
* 0xfff40000 0x00140000 UART 2
* 0xfff50000 0x00150000 UART 1
* 0xfff60000 0x00160000 CS8900
* 0xfff70000 0x00170000 INTCONT
* 0xfff80000 0x00180000 RAMDAC
* 0xfff90000 0x00190000 Control 0
* 0xfffa0000 0x001a0000 Control 1
* 0xfffb0000 0x001b0000 Control 2
* 0xfffc0000 0x001c0000 FPGA 2
* 0xfffd0000 0x001d0000 INTRESET
* 0xfffe0000 0x001e0000 C-Cube DMA throttle
* 0xffff0000 0x001f0000 Expansion CS1
* 0xffe00000 0x82000000 cache flush
*/
/*
* Mapping areas
*/
#define IO_BASE 0xfff00000
#define IO_START 0x00100000
#define FLUSH_BASE 0xffe00000
#define INTCONT 0xfff70000
#define FPGA1CONT 0xffff3000
/*
* RAM definitions
*/
#define RAM_BASE 0x80000000
#define FLUSH_BASE_PHYS 0x82000000
#define UNCACHEABLE_ADDR INTCONT
#endif
include/asm-arm/arch-tbox/io.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-tbox/io.h
*
* Copyright (C) 1996-1999 Russell King
* Copyright (C) 1998, 1999 Philip Blundell
*
*/
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
#define IO_SPACE_LIMIT 0xffffffff
#define __io(_x) ((_x) << 2)
/*
* Generic virtual read/write
*/
static
inline
unsigned
int
__arch_getw
(
unsigned
long
a
)
{
unsigned
int
value
;
__asm__
__volatile__
(
"ldr%?h %0, [%1, #0] @ getw"
:
"=&r"
(
value
)
:
"r"
(
a
));
return
value
;
}
static
inline
void
__arch_putw
(
unsigned
int
value
,
unsigned
long
a
)
{
__asm__
__volatile__
(
"str%?h %0, [%1, #0] @ putw"
:
:
"r"
(
value
),
"r"
(
a
));
}
/* Idem, for devices on the upper byte lanes */
#define inb_u(p) __arch_getb(__io_pc(p) + 2)
#define inw_u(p) __arch_getw(__io_pc(p) + 2)
#define outb_u(v,p) __arch_putb(v,__io_pc(p) + 2)
#define outw_u(v,p) __arch_putw(v,__io_pc(p) + 2)
#endif
include/asm-arm/arch-tbox/irqs.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-tbox/irqs.h
*
* Copyright (C) 1998, 2000 Philip Blundell
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#define IRQ_MPEGDMA 0
#define IRQ_ASHTX 1
#define IRQ_ASHRX 2
#define IRQ_VSYNC 3
#define IRQ_HSYNC 4
#define IRQ_MPEG 5
#define IRQ_UART2 6
#define IRQ_UART1 7
#define IRQ_ETHERNET 8
#define IRQ_TIMER 9
#define IRQ_AUDIODMA 10
/* bit 11 used for video field ident */
#define IRQ_EXPMODCS0 12
#define IRQ_EXPMODCS1 13
#define irq_canonicalize(i) (i)
include/asm-arm/arch-tbox/memory.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-tbox/memory.h
*
* Copyright (c) 1996-1999 Russell King.
* Copyright (c) 1998-1999 Phil Blundell
*/
#ifndef __ASM_ARCH_MEMORY_H
#define __ASM_ARCH_MEMORY_H
/*
* Physical DRAM offset.
*/
#define PHYS_OFFSET (0x80000000UL)
/*
* Bus view is the same as physical view
*/
#define __virt_to_bus(x) __virt_to_phys(x)
#define __bus_to_virt(x) __phys_to_virt(x)
#endif
include/asm-arm/arch-tbox/param.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-tbox/param.h
*/
#define __KERNEL_HZ 1000
include/asm-arm/arch-tbox/serial.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-tbox/serial.h
*
* Copyright (c) 1996 Russell King.
* Copyright (c) 1998 Phil Blundell
*
* Changelog:
* 15-10-1996 RMK Created
* 09-06-1998 PJB tbox version
*/
#ifndef __ASM_ARCH_SERIAL_H
#define __ASM_ARCH_SERIAL_H
/*
* This assumes you have a 1.8432 MHz clock for your UART.
*
* It'd be nice if someone built a serial card with a 24.576 MHz
* clock, since the 16550A is capable of handling a top speed of 1.5
* megabits/second; but this requires the faster clock.
*/
#define BASE_BAUD (1843200 / 16)
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
/* UART CLK PORT IRQ FLAGS */
#define STD_SERIAL_PORT_DEFNS \
{ 0, BASE_BAUD, 0xffff4000 >> 2, 6, STD_COM_FLAGS },
/* ttyS0 */
\
{ 0, BASE_BAUD, 0xffff5000 >> 2, 7, STD_COM_FLAGS },
/* ttyS1 */
#define EXTRA_SERIAL_PORT_DEFNS
#endif
include/asm-arm/arch-tbox/system.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-tbox/system.h
*
* Copyright (c) 1996-1999 Russell King.
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static
inline
void
arch_idle
(
void
)
{
cpu_do_idle
();
}
#define arch_reset(mode) do { } while (0)
#endif
include/asm-arm/arch-tbox/time.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-tbox/time.h
*
* Copyright (c) 1997, 1999 Phil Blundell.
* Copyright (c) 2000 FutureTV Labs Ltd
*
* Tbox has no real-time clock -- we get millisecond ticks to update
* our soft copy.
*/
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <asm/io.h>
#include <asm/hardware.h>
#define update_rtc()
static
irqreturn_t
timer_interrupt
(
int
irq
,
void
*
dev_id
,
struct
pt_regs
*
regs
)
{
/* Clear irq */
__raw_writel
(
1
,
FPGA1CONT
+
0xc
);
__raw_writel
(
0
,
FPGA1CONT
+
0xc
);
do_timer
(
regs
);
return
IRQ_HANDLED
;
}
void
__init
time_init
(
void
)
{
timer_irq
.
handler
=
timer_interrupt
;
setup_irq
(
IRQ_TIMER
,
&
timer_irq
);
}
include/asm-arm/arch-tbox/timex.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-tbox/timex.h
*
* Tbox timex specifications
*
* Copyright (C) 1999 Philip Blundell
*/
include/asm-arm/arch-tbox/uncompress.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-nexuspci/uncompress.h
* from linux/include/asm-arm/arch-ebsa110/uncompress.h
*
* Copyright (C) 1996,1997,1998 Russell King
* Copyright (C) 1998, 1999 Phil Blundell
*/
#include <asm/io.h>
#define UARTBASE 0x00400000
/*
* This does not append a newline
*/
static
void
puts
(
const
char
*
s
)
{
while
(
*
s
)
{
char
c
=
*
(
s
++
);
while
(
!
(
__raw_readb
(
UARTBASE
+
0x14
)
&
0x20
));
__raw_writeb
(
c
,
UARTBASE
);
if
(
c
==
10
)
{
while
(
!
(
__raw_readb
(
UARTBASE
+
0x14
)
&
0x20
));
__raw_writeb
(
13
,
UARTBASE
);
}
}
}
/*
* nothing to do
*/
#define arch_decomp_setup()
/*
* Stroke the watchdog so we don't get reset during decompression.
*/
#define arch_decomp_wdog() \
do { \
__raw_writel(1, 0xa00000); \
__raw_writel(0, 0xa00000); \
} while (0)
include/asm-arm/arch-tbox/vmalloc.h
deleted
100644 → 0
View file @
f614ba1b
/*
* linux/include/asm-arm/arch-tbox/vmalloc.h
*/
/*
* Just any arbitrary offset to the start of the vmalloc VM area: the
* current 8MB value just means that there will be a 8MB "hole" after the
* physical memory until the kernel virtual memory starts. That means that
* any out-of-bounds memory accesses will hopefully be caught.
* The vmalloc() routines leaves a hole of 4kB between each vmalloced
* area for the same reason. ;)
*/
#define VMALLOC_OFFSET (8*1024*1024)
#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
include/asm-arm/dma-mapping.h
View file @
fa1b4579
...
...
@@ -124,7 +124,7 @@ dma_map_single(struct device *dev, void *cpu_addr, size_t size,
enum
dma_data_direction
dir
)
{
consistent_sync
(
cpu_addr
,
size
,
dir
);
return
__virt_to_bus
(
(
unsigned
long
)
cpu_addr
);
return
virt_to_dma
(
dev
,
(
unsigned
long
)
cpu_addr
);
}
#else
extern
dma_addr_t
dma_map_single
(
struct
device
*
,
void
*
,
size_t
,
enum
dma_data_direction
);
...
...
@@ -231,7 +231,7 @@ dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
for
(
i
=
0
;
i
<
nents
;
i
++
,
sg
++
)
{
char
*
virt
;
sg
->
dma_address
=
page_to_
bus
(
sg
->
page
)
+
sg
->
offset
;
sg
->
dma_address
=
page_to_
dma
(
dev
,
sg
->
page
)
+
sg
->
offset
;
virt
=
page_address
(
sg
->
page
)
+
sg
->
offset
;
consistent_sync
(
virt
,
sg
->
length
,
dir
);
}
...
...
@@ -288,14 +288,14 @@ static inline void
dma_sync_single_for_cpu
(
struct
device
*
dev
,
dma_addr_t
handle
,
size_t
size
,
enum
dma_data_direction
dir
)
{
consistent_sync
((
void
*
)
__bus_to_virt
(
handle
),
size
,
dir
);
consistent_sync
((
void
*
)
dma_to_virt
(
dev
,
handle
),
size
,
dir
);
}
static
inline
void
dma_sync_single_for_device
(
struct
device
*
dev
,
dma_addr_t
handle
,
size_t
size
,
enum
dma_data_direction
dir
)
{
consistent_sync
((
void
*
)
__bus_to_virt
(
handle
),
size
,
dir
);
consistent_sync
((
void
*
)
dma_to_virt
(
dev
,
handle
),
size
,
dir
);
}
#else
extern
void
dma_sync_single_for_cpu
(
struct
device
*
,
dma_addr_t
,
size_t
,
enum
dma_data_direction
);
...
...
include/asm-arm/memory.h
View file @
fa1b4579
...
...
@@ -159,9 +159,18 @@ static inline void *phys_to_virt(unsigned long x)
#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
/*
* Optional device DMA address remapping. Do _not_ use directly!
* We should really eliminate virt_to_bus() here - it's deprecated.
*/
#define page_to_bus(page) (virt_to_bus(page_address(page)))
#ifndef __arch_page_to_dma
#define page_to_dma(dev, page) ((dma_addr_t)__virt_to_bus(page_address(page)))
#define dma_to_virt(dev, addr) (__bus_to_virt(addr))
#define virt_to_dma(dev, addr) (__virt_to_bus(addr))
#else
#define page_to_dma(dev, page) (__arch_page_to_dma(dev, page))
#define dma_to_virt(dev, addr) (__arch_dma_to_virt(dev, addr))
#define virt_to_dma(dev, addr) (__arch_virt_to_dma(dev, addr))
#endif
#endif
...
...
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