Commit fcc3ff4f authored by Linus Torvalds's avatar Linus Torvalds

Merge git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86

* git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86:
  asm-generic/tlb.h: build fix
  x86: uninline __pte_free_tlb() and __pmd_free_tlb()
  x86: fix small sparse warning
  x86: fix sparse warning in kernel/scx200_32.c
  x86: early_ioremap_reset fix 2
  x86: c_p_a clflush_cache_range fix
  x86: change_page_attr_clear fix
  x86: fix sparse warnings in intel_cacheinfo.c
parents e95035c6 62152d0e
......@@ -274,8 +274,10 @@ void __init cpu_detect(struct cpuinfo_x86 *c)
if (c->x86 >= 0x6)
c->x86_model += ((tfms >> 16) & 0xF) << 4;
c->x86_mask = tfms & 15;
if (cap0 & (1<<19))
if (cap0 & (1<<19)) {
c->x86_cache_alignment = ((misc >> 8) & 0xff) * 8;
c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
}
}
}
static void __cpuinit early_get_cap(struct cpuinfo_x86 *c)
......@@ -317,6 +319,7 @@ static void __init early_cpu_detect(void)
struct cpuinfo_x86 *c = &boot_cpu_data;
c->x86_cache_alignment = 32;
c->x86_clflush_size = 32;
if (!have_cpuid_p())
return;
......
......@@ -352,8 +352,8 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
*/
if ((num_cache_leaves == 0 || c->x86 == 15) && c->cpuid_level > 1) {
/* supports eax=2 call */
int i, j, n;
int regs[4];
int j, n;
unsigned int regs[4];
unsigned char *dp = (unsigned char *)regs;
int only_trace = 0;
......@@ -368,7 +368,7 @@ unsigned int __cpuinit init_intel_cacheinfo(struct cpuinfo_x86 *c)
/* If bit 31 is set, this is an unknown format */
for ( j = 0 ; j < 3 ; j++ ) {
if ( regs[j] < 0 ) regs[j] = 0;
if (regs[j] & (1 << 31)) regs[j] = 0;
}
/* Byte 0 is level count, not a descriptor */
......
......@@ -223,7 +223,7 @@ int ds_free(void **dsp)
if (*dsp)
kfree((void *)get_bts_buffer_base(*dsp));
kfree(*dsp);
*dsp = 0;
*dsp = NULL;
return 0;
}
......
......@@ -65,7 +65,7 @@ static int __devinit scx200_probe(struct pci_dev *pdev, const struct pci_device_
base = pci_resource_start(pdev, 0);
printk(KERN_INFO NAME ": GPIO base 0x%x\n", base);
if (request_region(base, SCx200_GPIO_SIZE, "NatSemi SCx200 GPIO") == 0) {
if (!request_region(base, SCx200_GPIO_SIZE, "NatSemi SCx200 GPIO")) {
printk(KERN_ERR NAME ": can't allocate I/O for GPIOs\n");
return -EBUSY;
}
......
......@@ -340,7 +340,7 @@ void __init early_ioremap_reset(void)
for (idx = FIX_BTMAP_BEGIN; idx >= FIX_BTMAP_END; idx--) {
addr = fix_to_virt(idx);
pte = early_ioremap_pte(addr);
if (!*pte & _PAGE_PRESENT) {
if (*pte & _PAGE_PRESENT) {
phys = *pte & PAGE_MASK;
set_fixmap(idx, phys);
}
......
......@@ -399,8 +399,7 @@ static inline int change_page_attr_set(unsigned long addr, int numpages,
static inline int change_page_attr_clear(unsigned long addr, int numpages,
pgprot_t mask)
{
return __change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
}
int set_memory_uc(unsigned long addr, int numpages)
......
......@@ -376,3 +376,26 @@ void check_pgt_cache(void)
{
quicklist_trim(0, pgd_dtor, 25, 16);
}
void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
{
paravirt_release_pt(page_to_pfn(pte));
tlb_remove_page(tlb, pte);
}
#ifdef CONFIG_X86_PAE
void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
{
/* This is called just after the pmd has been detached from
the pgd, which requires a full tlb flush to be recognized
by the CPU. Rather than incurring multiple tlb flushes
while the address space is being pulled down, make the tlb
gathering machinery do a full flush when we're done. */
tlb->fullmm = 1;
paravirt_release_pd(__pa(pmd) >> PAGE_SHIFT);
tlb_remove_page(tlb, virt_to_page(pmd));
}
#endif
......@@ -15,6 +15,7 @@
#include <linux/swap.h>
#include <linux/quicklist.h>
#include <asm/pgalloc.h>
#include <asm/tlbflush.h>
/*
......
......@@ -3,6 +3,7 @@
#include <linux/threads.h>
#include <linux/mm.h> /* for struct page */
#include <linux/pagemap.h>
#include <asm/tlb.h>
#include <asm-generic/tlb.h>
......@@ -51,11 +52,7 @@ static inline void pte_free(struct page *pte)
}
static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte)
{
paravirt_release_pt(page_to_pfn(pte));
tlb_remove_page(tlb, pte);
}
extern void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte);
#ifdef CONFIG_X86_PAE
/*
......@@ -72,18 +69,7 @@ static inline void pmd_free(pmd_t *pmd)
free_page((unsigned long)pmd);
}
static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd)
{
/* This is called just after the pmd has been detached from
the pgd, which requires a full tlb flush to be recognized
by the CPU. Rather than incurring multiple tlb flushes
while the address space is being pulled down, make the tlb
gathering machinery do a full flush when we're done. */
tlb->fullmm = 1;
paravirt_release_pd(__pa(pmd) >> PAGE_SHIFT);
tlb_remove_page(tlb, virt_to_page(pmd));
}
extern void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd);
static inline void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd)
{
......
......@@ -6,7 +6,6 @@
#include <linux/mmzone.h>
#include <linux/list.h>
#include <linux/sched.h>
#include <linux/pagemap.h>
#include <asm/atomic.h>
#include <asm/page.h>
......
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