usb: dwc3: of-simple: add support for shared and pulsed reset lines
Some SoCs (such as Amlogic Meson GXL for example) share the reset line with other components (in case of the Meson GXL example there's a shared reset line between the USB2 PHYs, USB3 PHYs and the dwc3 controller). Additionally SoC implementations may prefer a reset pulse over level resets. For now this falls back to the old defaults, which are: - reset lines are exclusive - level resets are being used Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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