- 11 Feb, 2019 1 commit
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git://linuxtv.org/pinchartl/mediaDave Airlie authored
Renesas display drivers changes for v5.1 (2nd part): - R8A7744 LVDS support - DPAD0 output support on D3/E3 Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190208003355.GG10386@pendragon.ideasonboard.com
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- 08 Feb, 2019 8 commits
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Dave Airlie authored
Merge tag 'exynos-drm-next-for-v5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next - Add rotator support for s5pv210 . With this patch series, s5pv210 SoC can use rotator module but only NV12 and XRGB8888 formats are supported. - Modify e-mail address . It changes email address of scaler module author. Signed-off-by:
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Laurent Pinchart authored
On the D3 and E3 SoCs the LVDS PLL clock output provides the dot clock to the DU channels, even when the LVDS outputs are not in use. Enable and disable the LVDS clock output when enabling or disabling a CRTC connected to the DPAD0 output. Signed-off-by:Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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Laurent Pinchart authored
On the D3 and E3 platforms, the LVDS internal PLL supplies the pixel clock to the DU. This works automatically for LVDS outputs as the LVDS encoder is enabled through the bridge API, enabling the internal PLL and clock output. However, when using the DU DPAD output with the LVDS outputs turned off, the LVDS PLL needs to be controlled manually. Add an API to do so, to be called by the DU driver. The drivers/gpu/drm/rcar-du/ directory has to be treated as obj-y unconditionally, as the LVDS driver could be built-in while the DU driver is compiled as a module. Signed-off-by: -
Laurent Pinchart authored
On the D3 and E3 SoCs the LVDS encoder has an extended internal PLL and supplies a clock to the DU. That clock is used not only for the LVDS outputs but also for the DPAD output. The LVDS encoder thus needs to be available to the DU even when its output is disabled. Don't fail probe in that case on D3 and E3. Signed-off-by: -
Laurent Pinchart authored
Before the driver fully moved to drm_bridge and drm_panel, it was necessary to parse DT and locate encoder and connector nodes. The connector node is now unused and can be removed as a parameter to rcar_du_encoder_init(). As a consequence rcar_du_encoders_init_one() can be greatly simplified, removing most of the DT parsing. Signed-off-by: -
Biju Das authored
The LVDS encoders on RZ/G1N SoC is similar to RZ/G1M. Add support for RZ/G1N (R8A7744) SoC to the LVDS encoder driver. Signed-off-by:
Biju Das <biju.das@bp.renesas.com> Reviewed-by:
Simon Horman <horms+renesas@verge.net.au>
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Biju Das authored
Document the RZ/G1N (R8A7744) LVDS bindings. Signed-off-by:
Rob Herring <robh@kernel.org>
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Julia Lawall authored
Add an of_node_put when the result of of_graph_get_remote_port_parent is not available. Add a second of_node_put if no encoder is selected (encoder remains NULL). The semantic match that finds the first problem is as follows (http://coccinelle.lip6.fr): // <smpl> @r exists@ local idexpression e; expression x; @@ e = of_graph_get_remote_port_parent(...); ... when != x = e when != true e == NULL when != of_node_put(e) when != of_fwnode_handle(e) ( return e; | *return ...; ) // </smpl> Signed-off-by:
Julia Lawall <Julia.Lawall@lip6.fr> Reviewed-by:
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by:
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- 07 Feb, 2019 3 commits
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Andrzej Pietrasiewicz authored
My @samusung.com address is going to cease existing soon, so change it to an address which can actually be used to contact me. Signed-off-by:
Andrzej Pietrasiewicz <andrzej.p@samsung.com> Signed-off-by:
Inki Dae <inki.dae@samsung.com>
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Paweł Chmiel authored
This commit documents new compatible for s5pv210 soc, which will be also supported by this driver. Signed-off-by:
Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Reviewed-by:
Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by:
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Paweł Chmiel authored
This commit adds support for s5pv210. Currently only NV12 and XRGB8888 formats are supported. It was tested by using tool from https://www.spinics.net/lists/linux-samsung-soc/msg60498.htmlSigned-off-by:
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- 04 Feb, 2019 3 commits
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git://anongit.freedesktop.org/drm/drm-intelDave Airlie authored
- Make background color and LUT more robust (Matt) - Icelake display fixes (Ville, Imre) - Workarounds fixes and reorg (Tvrtko, Talha) - Enable fastboot by default on VLV and CHV (Hans) - Add another PCI ID for Coffee Lake (Rodrigo) Signed-off-by:
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
ttm: - Replace ref/unref naming with get/put amdgpu: - Revert DC clang fix, causes a segfault with some compiler versions - SR-IOV fix - PCIE fix for vega20 - Misc DC fixes Signed-off-by:
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for 5.1: UAPI Changes: Cross-subsystem Changes: Core Changes: - Split out some part of drm_crtc_helper.h into drm_probe_helper.h - DRIVER_* flags improvements - New tasks on the TODO-list - Improvements to the documentation Driver Changes: - Continual of drmP.h removal in multiple drivers - Removal of FBINFO_(FLAG_)DEFAULT in multiple drivers - sun4i: Addition of the A23 support, multiple fixes for the tiled formats - atmel-hlcdc: Fix of clipping and rotation properties - qxl: various BO-related improvements, prime and generic fbdev emulation support - dw-hdmi: Support for HDMI2.0 2160p modes and YUV420 output - New Sitronix ST7701 panel driver - New Kingdisplay KD097D04 panel driver - New LeMaker BL035-RGB-002 panel driver - New PDA 91-00156-A0 panel driver Signed-off-by:
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- 02 Feb, 2019 1 commit
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Rodrigo Vivi authored
Signed-off-by:Rodrigo Vivi <rodrigo.vivi@intel.com>
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- 01 Feb, 2019 5 commits
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Neil Armstrong authored
In order to support the HDMI2.0 YUV420 display modes, this patch adds support for the YUV420 TMDS Clock divided by 2 and the controller passthrough mode. YUV420 Synopsys PHY support will need some specific configuration table to support theses modes. This patch is based on work from Zheng Yang <zhengyang@rock-chips.com> in the Rockchip Linux 4.4 BSP at [1] [1] https://github.com/rockchip-linux/kernel/tree/release-4.4 Cc: Zheng Yang <zhengyang@rock-chips.com> Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Tested-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
Andrzej Hajda <a.hajda@samsung.com> Signed-off-by:
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Neil Armstrong authored
Now we support the TMDS Clock > 3.4GHz and support the SCDC Control operation in the DW-HDMI Controller, we can enable support for the HDMI2.0 3840x2160@60/50 RGB444 display modes. Signed-off-by:
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Neil Armstrong authored
Add support for TMDS Clock > 3.4GHz for HDMI2.0 display modes. Signed-off-by:
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Neil Armstrong authored
Add support for SCDC Setup for TMDS Clock > 3.4GHz and enable TMDS Scrambling when supported or mandatory. This patch also adds an helper to setup the control bit to support the high TMDS Bit Period/TMDS Clock-Period Ratio as required with TMDS Clock > 3.4GHz for HDMI2.0 3840x2160@60/50 modes. These changes were based on work done by Huicong Xu <xhc@rock-chips.com> and Nickey Yang <nickey.yang@rock-chips.com> to support HDMI2.0 modes on the Rockchip 4.4 BSP kernel at [1] [1] https://github.com/rockchip-linux/kernel/tree/release-4.4 Cc: Nickey Yang <nickey.yang@rock-chips.com> Cc: Huicong Xu <xhc@rock-chips.com> Signed-off-by:
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git://linux-arm.org/linux-ldDave Airlie authored
This pull includes the new Arm "komeda" DRM driver. It is currently hosted in the same repo as the other "mali-dp" driver because it is the next iteration of the IP. Signed-off-by:
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- 31 Jan, 2019 4 commits
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git://anongit.freedesktop.org/drm/drm-intelDave Airlie authored
- Track all runtime-PM wakerefs and other rpm improvements (Chris) - Fix ILK-IVB primary plane enable delays (Juha-Pekka) - Differentiate between gtt->mutex and ppgtt->mutex (Chris) - Prevent concurrent GGTT update and use on Braswell (Chris) - Fix CNL macros for DDI vswing (Aditya) - Fix static code analysis warning (RK) - Only dump GPU state on set-wedged if interesting (Chris) - Port F detection improvements (Imre) - userptr mutex lock fixes (Chris) - Fix on MST allocation by propagating error value at compute_config (Lyude) - Serialise concurrent calls to set_wedge (Chris) - Unify reset functionality into i915_reset.c (Chris) - Switch to kernel fixed size types (Jani) - Limit the for_each_set_bit to the valid range (Chris) - Fix wakeref cooie handling (Tvrtko) - IRQs handling improvements (Chris) - Selftests improvements (Chris) - Remove superfluous PANEL_POWER_OFF macro (Jani) - Global seqno fix (Chris) - DSI fixes (Hans) - Refactor out intel_context_init() (Chris) - Show all active engines on hangcheck (Chris) - PSR2 fixes and improvements (Jose) - Do a posting read after irq install on Ice Lake (Daniele) - Add few more device IDs for Ice Lake (Rodrigo) - Mark up priority boost on preemption (Chris) - Add color management LUT validation helper (Matt) - Split out intel_crt_present to platform specific setup (Jani) - LVDS and TV clean up and improvements (Jani) - Simplify CRT VBT check for per-VLV/DDI (Jani) - De-inline intel_context_init() (Chris) - Backlight fixes (Maarten) - Enable fastset for non-boot modesets (Maarten) - Make HW readout mark CRTC scaler as in use (Maarten) Signed-off-by:
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
New stuff for 5.1. amdgpu: - DC bandwidth formula updates - Support for DCC on scanout surfaces - Support for multiple IH rings on soc15 asics - Fix xgmi locking - Add sysfs interface to get pcie usage stats - Simplify DC i2c/aux code - Initial support for BACO on vega10/20 - New runtime SMU feature debug interface - Expand existing sysfs power interfaces to new clock domains - Handle kexec properly - Simplify IH programming - Rework doorbell handling across asics - Drop old CI DPM implementation - DC page flipping fixes - Misc SR-IOV fixes amdkfd: - Simplify the interfaces between amdkfd and amdgpu ttm: - Add a callback to notify the driver when the lru changes sched: - Refactor mirror list handling - Rework hw fence processing Signed-off-by:
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Sean Paul authored
Drivers shouldn't be using these values, add a TODO so someone removes them. Changes in v2: - Add drm_display_mode.vrefresh removal (Ville) - Add Sam's R-b and bonus points Changes in v3: - Add hsync removal todo item (Daniel) - Change vrefresh wording to make removal less optional Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Suggested-by:
Daniel Vetter <daniel@ffwll.ch> Reviewed-by:
Sam Ravnborg <sam@ravnborg.org> Bonus-points-awarded-by:
Sean Paul <seanpaul@chromium.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190129192637.73296-1-sean@poorly.run
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Rodrigo Vivi authored
While cross checking PCI IDs from Intel Media SDK and kernel Dmitry noticed this gap. So we checked the spec and this new ID had been recently added. v2: Adding new H_GT1 entry to i915_pci.c (Jose) Reported-by: Dmitry Rogozhkin<dmitry.v.rogozhkin@intel.com> Cc: Dmitry Rogozhkin<dmitry.v.rogozhkin@intel.com> Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by:
José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190201235049.27206-1-rodrigo.vivi@intel.com
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- 01 Feb, 2019 5 commits
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https://github.com/intel/gvt-linuxRodrigo Vivi authored
gvt-next-2019-02-01 - new VFIO EDID region support (Henry) Signed-off-by:
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Hans de Goede authored
We really want to have fastboot enabled by default to avoid an ugly modeset during boot. Currently we are enabling fastboot by default on gen9+ (Skylake and newer). The intention is to enable it on older generations after it has seen more testing on gen9+. VLV and CHV devices are still being sold in stores today, as such it is desirable to also enable fastboot by default on these now. I've extensively tested fastboot=1 support on over 50 different Bay- and Cherry-Trail devices. Testing DSI and eDP panels as well as HDMI output (and even DP over Type-C on one device). All 50 devices work fine with fastboot=1. On 2 devices their DSI panel turns black as soon as the i915 driver loads when fastboot=0, so having fastboot enabled is required for these 2 to work properly (for lack of a better fix). Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Reviewed-by:
Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190129142237.8684-1-hdegoede@redhat.com
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Talha Nassar authored
Enables blend optimization for floating point RTs This restores the workaround that was reverted in c358514b ("Revert "drm/i915/icl: WaEnableFloatBlendOptimization""). The revert was due to the register write seemingly not sticking, but the HW team has confirmed that this is because the register is WO and that the workaround is indeed required. Here the wa is added with a mask of 0 since the register is WO. References: https://hsdes.intel.com/resource/1408134172 References: https://bugs.freedesktop.org/show_bug.cgi?id=107338 Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Signed-off-by:
Talha Nassar <talha.nassar@intel.com> Reviewed-by:
Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:
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Tvrtko Ursulin authored
No functional or code size change - just notice we can compact the source by re-using a single helper for adding workarounds. Signed-off-by:
Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by:
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Tvrtko Ursulin authored
Top comment in intel_workarounds.c says common code should come first so lets respect that. Also, by moving the common code together opportunities to reduce duplication will become more obvious. Signed-off-by:
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- 31 Jan, 2019 9 commits
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Imre Deak authored
VBT may include incorrect information about the presence of port F. Work around this on SKUs where we know the port is not present. v2: - Fix IS_ICL_WITH_PORT_F, so it's useable from any context. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108915 Cc: Mika Kahola <mika.kahola@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by:
Imre Deak <imre.deak@intel.com> Reviewed-by:
Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181220155211.31456-1-imre.deak@intel.com
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Imre Deak authored
We can't safely probe Type C ports, whether they are a legacy or a USB/Thunderbolt DP Alternate Type C port. This would require performing the TypeC connect sequence - as described by the specification - but that may have unwanted side-effects. These side-effects include at least - without completeness - timeouts during AUX power well enabling and subsequent PLL enabling errors. To safely identify these ports we really need VBT, which has the proper flag for this (ddi_vbt_port_info::supports_typec_usb, supports_tbt). Based on the above disable Type C ports if we can't load VBT for some reason. v2: - Notice that we disable TypeC ports completely and simplify accordingly (Jose). - Add code comment explaining why we disabled the ports. (Jani) Cc: Jani Nikula <jani.nikula@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Cc: Jose Roberto de Souza <jose.souza@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by:
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Ville Syrjälä authored
commit 5b0bd14d ("drm/i915/icl: keep track of unused pll while looping") inadvertently (I presume) changed the code to pick the last unused dpll rather than the first unused one like we did before. While there should most likely be no harm in changing the order let's change back just to avoid a change in the behaviour. At least it might reduce the confusion when staring at logs (took me a while to figure out why DPLL1 being picked over DPLL0 when the latter was most definitely available). Cc: Lucas De Marchi <lucas.demarchi@intel.com> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190130181359.20693-1-ville.syrjala@linux.intel.comReviewed-by:
Paulo Zanoni <paulo.r.zanoni@intel.com> Acked-by:
Lucas De Marchi <lucas.demarchi@intel.com>
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Ville Syrjälä authored
The code managing the dbuf slices is borked and needs some real work to fix. In the meantime let's just stop using the second slice. v2: Drop the change to intel_enabled_dbuf_slices_num() (Mahesh) Cc: Mahesh Kumar <mahesh1.sh.kumar@gmail.com> Reviewed-by: Imre Deak <imre.deak@intel.com> #v1 Signed-off-by:
Mahesh Kumar <mahesh1.sh.kumar@gmail.com>
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Hang Yuan authored
Implement VFIO EDID region for vgpu. Support EDID blob update and notify guest on link state change via hotplug event. v3: move struct edid_region to kvmgt.c <zhenyu> v2: add EDID sanity check and size update <zhenyu> Tested-by:
Gerd Hoffmann <kraxel@redhat.com> Reviewed-by:
Hang Yuan <hang.yuan@linux.intel.com> Signed-off-by:
Zhenyu Wang <zhenyuw@linux.intel.com>
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Hang Yuan authored
Add function to emulate hotplug interrupt for SKL/KBL platforms Signed-off-by:
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Hang Yuan authored
These functions will get default resolution according to vgpu type. Signed-off-by:
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Matt Roper authored
Use of the new DRM_COLOR_LUT_NON_DECREASING test was a bit over-zealous; it doesn't actually need to be applied to the degamma on "bdw-style" platforms. Likewise, we overlooked the fact that CHV should have that test applied to the gamma LUT as well as the degamma LUT. Rather than adding more complicated platform checking to intel_color_check(), let's just store the appropriate set of LUT validation flags for each platform in the intel_device_info structure. v2: - Shuffle around LUT size tests so that the hardware-specific tests won't be applied to legacy gamma tables. (Ville) - Add a debug message so that it will be easier to understand why an atomic transaction involving incorrectly-sized LUT's got rejected by the driver. v3: - Switch size_t's to int's. (Ville) Fixes: 85e2d61e ("drm/i915: Validate userspace-provided color management LUT's (v4)") References: https://lists.freedesktop.org/archives/intel-gfx/2019-January/187634.html Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
Matt Roper <matthew.d.roper@intel.com> Reviewed-by:
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Matt Roper authored
We don't yet allow userspace to control the CRTC background color, but we should manually program the color to black to ensure the BIOS didn't leave us with some other color. We should also set the pipe gamma and pipe CSC bits so that the background color goes through the same color management transformations that a plane with black pixels would. v2: Rename register to SKL_BOTTOM_COLOR to more closely follow bspec naming. (Ville) Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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- 30 Jan, 2019 1 commit
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Ville Syrjälä authored
Decode the NAK reply fields to make it easier to parse the logs. v2: s/STR/DP_STR/ to avoid conflict with some header stuff (0day) Use drm_dp_mst_req_type_str() more (DK) Signed-off-by:
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