1. 29 May, 2020 1 commit
  2. 28 May, 2020 5 commits
    • Mark Brown's avatar
      Merge series "add ecspi ERR009165 for i.mx6/7 soc family" from Robin Gong <yibin.gong@nxp.com>: · b7d73cb6
      Mark Brown authored
      There is ecspi ERR009165 on i.mx6/7 soc family, which cause FIFO
      transfer to be send twice in DMA mode. Please get more information from:
      https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf. The workaround is adding
      new sdma ram script which works in XCH  mode as PIO inside sdma instead
      of SMC mode, meanwhile, 'TX_THRESHOLD' should be 0. The issue should be
      exist on all legacy i.mx6/7 soc family before i.mx6ul.
      NXP fix this design issue from i.mx6ul, so newer chips including i.mx6ul/
      6ull/6sll do not need this workaroud anymore. All other i.mx6/7/8 chips
      still need this workaroud. This patch set add new 'fsl,imx6ul-ecspi'
      for ecspi driver and 'ecspi_fixed' in sdma driver to choose if need errata
      or not.
      The first two reverted patches should be the same issue, though, it
      seems 'fixed' by changing to other shp script. Hope Sean or Sascha could
      have the chance to test this patch set if could fix their issues.
      Besides, enable sdma support for i.mx8mm/8mq and fix ecspi1 not work
      on i.mx8mm because the event id is zero.
      
      PS:
         Please get sdma firmware from below linux-firmware and copy it to your
      local rootfs /lib/firmware/imx/sdma.
      https://git.kernel.org/pub/scm/linux/kernel/git/firmware/linux-firmware.git/tree/imx/sdma
      
      v2:
        1.Add commit log for reverted patches.
        2.Add comment for 'ecspi_fixed' in sdma driver.
        3.Add 'fsl,imx6sll-ecspi' compatible instead of 'fsl,imx6ul-ecspi'
          rather than remove.
      v3:
        1.Confirm with design team make sure ERR009165 fixed on i.mx6ul/i.mx6ull
          /i.mx6sll, not fixed on i.mx8m/8mm and other i.mx6/7 legacy chips.
          Correct dts related dts patch in v2.
        2.Clean eratta information in binding doc and new 'tx_glitch_fixed' flag
          in spi-imx driver to state ERR009165 fixed or not.
        3.Enlarge burst size to fifo size for tx since tx_wml set to 0 in the
          errata workaroud, thus improve performance as possible.
      v4:
        1.Add Ack tag from Mark and Vinod
        2.Remove checking 'event_id1' zero as 'event_id0'.
      v5:
        1.Add the last patch for compatible with the current uart driver which
          using rom script, so both uart ram script and rom script supported
          in latest firmware, by default uart rom script used. UART driver
          will be broken without this patch.
      v6:
        1.Resend after rebase the latest next branch.
        2.Remove below No.13~No.15 patches of v5 because they were mergered.
        	ARM: dts: imx6ul: add dma support on ecspi
        	ARM: dts: imx6sll: correct sdma compatible
        	arm64: defconfig: Enable SDMA on i.mx8mq/8mm
        3.Revert "dmaengine: imx-sdma: fix context cache" since
          'context_loaded' removed.
      v7:
        1.Put the last patch 13/13 'Revert "dmaengine: imx-sdma: fix context
          cache"' to the ahead of 03/13 'Revert "dmaengine: imx-sdma: refine
          to load context only once" so that no building waring during comes out
          during bisect.
        2.Address Sascha's comments, including eliminating any i.mx6sx in this
          series, adding new 'is_imx6ul_ecspi()' instead imx in imx51 and taking
          care SMC bit for PIO.
        3.Add back missing 'Reviewed-by' tag on 08/15(v5):09/13(v7)
         'spi: imx: add new i.mx6ul compatible name in binding doc'
      v8:
        1.remove 0003-Revert-dmaengine-imx-sdma-fix-context-cache.patch and merge
          it into 04/13 of v7
        2.add 0005-spi-imx-fallback-to-PIO-if-dma-setup-failure.patch for no any
          ecspi function broken even if sdma firmware not updated.
        3.merge 'tx.dst_maxburst' changes in the two continous patches into one
          patch to avoid confusion.
        4.fix typo 'duplicated'.
      
      Robin Gong (13):
        Revert "ARM: dts: imx6q: Use correct SDMA script for SPI5 core"
        Revert "ARM: dts: imx6: Use correct SDMA script for SPI cores"
        Revert "dmaengine: imx-sdma: refine to load context only once"
        dmaengine: imx-sdma: remove duplicated sdma_load_context
        spi: imx: fallback to PIO if dma setup failure
        dmaengine: imx-sdma: add mcu_2_ecspi script
        spi: imx: fix ERR009165
        spi: imx: remove ERR009165 workaround on i.mx6ul
        spi: imx: add new i.mx6ul compatible name in binding doc
        dmaengine: imx-sdma: remove ERR009165 on i.mx6ul
        dma: imx-sdma: add i.mx6ul compatible name
        dmaengine: imx-sdma: fix ecspi1 rx dma not work on i.mx8mm
        dmaengine: imx-sdma: add uart rom script
      
       .../devicetree/bindings/dma/fsl-imx-sdma.txt       |  1 +
       .../devicetree/bindings/spi/fsl-imx-cspi.txt       |  1 +
       arch/arm/boot/dts/imx6q.dtsi                       |  2 +-
       arch/arm/boot/dts/imx6qdl.dtsi                     |  8 +-
       drivers/dma/imx-sdma.c                             | 67 ++++++++++------
       drivers/spi/spi-imx.c                              | 92 +++++++++++++++++++---
       include/linux/platform_data/dma-imx-sdma.h         |  8 +-
       7 files changed, 135 insertions(+), 44 deletions(-)
      
      --
      2.7.4
      
      _______________________________________________
      linux-arm-kernel mailing list
      linux-arm-kernel@lists.infradead.org
      http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
      b7d73cb6
    • Dinghao Liu's avatar
      spi: tegra20-sflash: Fix runtime PM imbalance on error · 117858bd
      Dinghao Liu authored
      pm_runtime_get_sync() increments the runtime PM usage counter even
      when it returns an error code. Thus a pairing decrement is needed on
      the error handling path to keep the counter balanced.
      Signed-off-by: default avatarDinghao Liu <dinghao.liu@zju.edu.cn>
      Link: https://lore.kernel.org/r/20200523124758.28604-1-dinghao.liu@zju.edu.cnSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      117858bd
    • Dinghao Liu's avatar
      spi: tegra20-slink: Fix runtime PM imbalance on error · faedcc17
      Dinghao Liu authored
      pm_runtime_get_sync() increments the runtime PM usage counter even
      when it returns an error code. Thus a pairing decrement is needed on
      the error handling path to keep the counter balanced.
      Signed-off-by: default avatarDinghao Liu <dinghao.liu@zju.edu.cn>
      Link: https://lore.kernel.org/r/20200523122909.25247-1-dinghao.liu@zju.edu.cnSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      faedcc17
    • Dinghao Liu's avatar
      spi: tegra114: Fix runtime PM imbalance on error · cddc36f3
      Dinghao Liu authored
      pm_runtime_get_sync() increments the runtime PM usage counter even
      when it returns an error code. Thus a pairing decrement is needed on
      the error handling path to keep the counter balanced.
      Signed-off-by: default avatarDinghao Liu <dinghao.liu@zju.edu.cn>
      Link: https://lore.kernel.org/r/20200523125704.30300-1-dinghao.liu@zju.edu.cnSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      cddc36f3
    • Robin Gong's avatar
      spi: imx: fallback to PIO if dma setup failure · bcd8e776
      Robin Gong authored
      Fallback to PIO in case dma setup failed. For example, sdma firmware not
      updated but ERR009165 workaroud added in kernel.
      Signed-off-by: default avatarRobin Gong <yibin.gong@nxp.com>
      Acked-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
      Link: https://lore.kernel.org/r/1590006865-20900-6-git-send-email-yibin.gong@nxp.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      bcd8e776
  3. 26 May, 2020 2 commits
  4. 25 May, 2020 2 commits
    • dillon min's avatar
      spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be... · aee67fe8
      dillon min authored
      spi: flags 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX' can't be coexit with 'SPI_3WIRE' mode
      
      since chip spi driver need get the transfer direction by 'tx_buf' and
      'rx_buf' of 'struct spi_transfer' in 'SPI_3WIRE' mode.
      
      so, we need bypass 'SPI_CONTROLLER_MUST_RX' and 'SPI_CONTROLLER_MUST_TX'
      feature in 'SPI_3WIRE' mode
      Signed-off-by: default avatardillon min <dillon.minfei@gmail.com>
      Link: https://lore.kernel.org/r/1590378348-8115-9-git-send-email-dillon.minfei@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      aee67fe8
    • dillon min's avatar
      spi: stm32: Add 'SPI_SIMPLEX_RX', 'SPI_3WIRE_RX' support for stm32f4 · 61367d0b
      dillon min authored
      in l3gd20 driver startup, there is a setup failed error return from
      stm32 spi driver
      
           "
           [    2.687630] st-gyro-spi spi0.0: supply vdd not found, using dummy
           regulator
           [    2.696869] st-gyro-spi spi0.0: supply vddio not found, using dummy
           regulator
           [    2.706707] spi_stm32 40015000.spi: SPI transfer setup failed
           [    2.713741] st-gyro-spi spi0.0: SPI transfer failed: -22
           [    2.721096] spi_master spi0: failed to transfer one message from queue
           [    2.729268] iio iio:device0: failed to read Who-Am-I register.
           [    2.737504] st-gyro-spi: probe of spi0.0 failed with error -22
           "
      
      after debug into spi-stm32 driver, st-gyro-spi split two steps to read
      l3gd20 id
      
      first: send command to l3gd20 with read id command in tx_buf, rx_buf
      is null.
      second: read id with tx_buf is null, rx_buf not null.
      
      so, for second step, stm32 driver recongise this process as 'SPI_SIMPLE_RX'
      from stm32_spi_communication_type(), but there is no related process for this
      type in stm32f4_spi_set_mode(), then we get error from
      stm32_spi_transfer_one_setup().
      
      we can use two method to fix this bug.
      1, use stm32 spi's "In unidirectional receive-only mode (BIDIMODE=0 and
      RXONLY=1)". but as our code running in sdram, the read latency is too large
      to get so many receive overrun error in interrupts handler.
      
      2, use stm32 spi's "In full-duplex (BIDIMODE=0 and RXONLY=0)", as tx_buf is
      null, so add flag 'SPI_MASTER_MUST_TX' to spi master.
      
      Change since V4:
      1 remove dummy data sent out by stm32 spi driver
      2 add flag 'SPI_MASTER_MUST_TX' to spi master
      Signed-off-by: default avatardillon min <dillon.minfei@gmail.com>
      Link: https://lore.kernel.org/r/1590378348-8115-8-git-send-email-dillon.minfei@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      61367d0b
  5. 22 May, 2020 9 commits
    • Mark Brown's avatar
      spi: Make spi_delay_exec() warn if called from atomic context · 8fede89f
      Mark Brown authored
      If the delay used is long enough the spi_delay_exec() will use a sleeping
      function to implement it. Add a might_sleep() here to help avoid callers
      using this from an atomic context and running into problems at runtime on
      other systems.
      Suggested-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Link: https://lore.kernel.org/r/20200522155005.46099-1-broonie@kernel.orgSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      8fede89f
    • Mark Brown's avatar
      Merge series "spi: dw: Add generic DW DMA controller support" from Serge Semin... · 36f8f189
      Mark Brown authored
      Merge series "spi: dw: Add generic DW DMA controller support" from Serge Semin <Sergey.Semin@baikalelectronics.ru>:
      
      Baikal-T1 SoC provides a DW DMA controller to perform low-speed peripherals
      Mem-to-Dev and Dev-to-Mem transaction. This is also applicable to the DW
      APB SSI devices embedded into the SoC. Currently the DMA-based transfers
      are supported by the DW APB SPI driver only as a middle layer code for
      Intel MID/Elkhart PCI devices. Seeing the same code can be used for normal
      platform DMAC device we introduced a set of patches to fix it within this
      series.
      
      First of all we need to add the Tx and Rx DMA channels support into the DW
      APB SSI binding. Then there are several fixes and cleanups provided as a
      initial preparation for the Generic DMA support integration: add Tx/Rx
      finish wait methods, clear DMAC register when done or stopped, Fix native
      CS being unset, enable interrupts in accordance with DMA xfer mode,
      discard static DW DMA slave structures, discard unused void priv pointer
      and dma_width member of the dw_spi structure, provide the DMA Tx/Rx burst
      length parametrisation and make sure it's optionally set in accordance
      with the DMA max-burst capability.
      
      In order to have the DW APB SSI MMIO driver working with DMA we need to
      initialize the paddr field with the physical base address of the DW APB SSI
      registers space. Then we unpin the Intel MID specific code from the
      generic DMA one and placed it into the spi-dw-pci.c driver, which is a
      better place for it anyway. After that the naming cleanups are performed
      since the code is going to be used for a generic DMAC device. Finally the
      Generic DMA initialization can be added to the generic version of the
      DW APB SSI IP.
      
      Last but not least we traditionally convert the legacy plain text-based
      dt-binding file with yaml-based one and as a cherry on a cake replace
      the manually written DebugFS registers read method with a ready-to-use
      for the same purpose regset32 DebugFS interface usage.
      
      This patchset is rebased and tested on the spi/for-next (5.7-rc5):
      base-commit: fe9fce6b2cf3 ("Merge remote-tracking branch 'spi/for-5.8' into spi-next")
      
      Link: https://lore.kernel.org/linux-spi/20200508132943.9826-1-Sergey.Semin@baikalelectronics.ru/
      Changelog v2:
      - Rebase on top of the spi repository for-next branch.
      - Move bindings conversion patch to the tail of the series.
      - Move fixes to the head of the series.
      - Apply as many changes as possible to be applied the Generic DMA
        functionality support is added and the spi-dw-mid is moved to the
        spi-dw-dma driver.
      - Discard patch "spi: dw: Fix dma_slave_config used partly uninitialized"
        since the problem has already been fixed.
      - Add new patch "spi: dw: Discard unused void priv pointer".
      - Add new patch "spi: dw: Discard dma_width member of the dw_spi structure".
        n_bytes member of the DW SPI data can be used instead.
      - Build the DMA functionality into the DW APB SSI core if required instead
        of creating a separate kernel module.
      - Use conditional statement instead of the ternary operator in the ref
        clock getter.
      
      Link: https://lore.kernel.org/linux-spi/20200515104758.6934-1-Sergey.Semin@baikalelectronics.ru/
      Changelog v3:
      - Use spi_delay_exec() method to wait for the DMA operation completion.
      - Explicitly initialize the dw_dma_slave members on stack.
      - Discard the dws->fifo_len utilization in the Tx FIFO DMA threshold
        setting from the patch where we just add the default burst length
        constants.
      - Use min() method to calculate the optimal burst values.
      - Add new patch which moves the spi-dw.c source file to spi-dw-core.c in
        order to preserve the DW APB SSI core driver name.
      - Add commas in the debugfs_reg32 structure initializer and after the last
        entry of the dw_spi_dbgfs_regs array.
      
      Link: https://lore.kernel.org/linux-spi/20200521012206.14472-1-Sergey.Semin@baikalelectronics.ru
      Changelog v4:
      - Get back ndelay() method to wait for an SPI transfer completion.
        spi_delay_exec() isn't suitable for the atomic context.
      Co-developed-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Signed-off-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Co-developed-by: default avatarRamil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
      Signed-off-by: default avatarRamil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
      Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
      Cc: Maxim Kaurkin <Maxim.Kaurkin@baikalelectronics.ru>
      Cc: Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>
      Cc: Ekaterina Skachko <Ekaterina.Skachko@baikalelectronics.ru>
      Cc: Vadim Vlasov <V.Vlasov@baikalelectronics.ru>
      Cc: Alexey Kolotnikov <Alexey.Kolotnikov@baikalelectronics.ru>
      Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
      Cc: Paul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-spi@vger.kernel.org
      Cc: devicetree@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      
      Serge Semin (16):
        spi: dw: Add Tx/Rx finish wait methods to the MID DMA
        spi: dw: Enable interrupts in accordance with DMA xfer mode
        spi: dw: Discard static DW DMA slave structures
        spi: dw: Discard unused void priv pointer
        spi: dw: Discard dma_width member of the dw_spi structure
        spi: dw: Parameterize the DMA Rx/Tx burst length
        spi: dw: Use DMA max burst to set the request thresholds
        spi: dw: Fix Rx-only DMA transfers
        spi: dw: Add core suffix to the DW APB SSI core source file
        spi: dw: Move Non-DMA code to the DW PCIe-SPI driver
        spi: dw: Remove DW DMA code dependency from DW_DMAC_PCI
        spi: dw: Add DW SPI DMA/PCI/MMIO dependency on the DW SPI core
        spi: dw: Cleanup generic DW DMA code namings
        spi: dw: Add DMA support to the DW SPI MMIO driver
        spi: dw: Use regset32 DebugFS method to create regdump file
        dt-bindings: spi: Convert DW SPI binding to DT schema
      
       .../bindings/spi/snps,dw-apb-ssi.txt          |  44 ---
       .../bindings/spi/snps,dw-apb-ssi.yaml         | 127 +++++++++
       .../devicetree/bindings/spi/spi-dw.txt        |  24 --
       drivers/spi/Kconfig                           |  15 +-
       drivers/spi/Makefile                          |   5 +-
       drivers/spi/{spi-dw.c => spi-dw-core.c}       |  88 ++----
       drivers/spi/{spi-dw-mid.c => spi-dw-dma.c}    | 261 ++++++++++--------
       drivers/spi/spi-dw-mmio.c                     |   4 +
       drivers/spi/spi-dw-pci.c                      |  50 +++-
       drivers/spi/spi-dw.h                          |  33 ++-
       10 files changed, 392 insertions(+), 259 deletions(-)
       delete mode 100644 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
       create mode 100644 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
       delete mode 100644 Documentation/devicetree/bindings/spi/spi-dw.txt
       rename drivers/spi/{spi-dw.c => spi-dw-core.c} (82%)
       rename drivers/spi/{spi-dw-mid.c => spi-dw-dma.c} (55%)
      
      --
      2.25.1
      36f8f189
    • Christopher Hill's avatar
      spi: rb4xx: add corresponding device tree documentation · 39690c8d
      Christopher Hill authored
      This patch adds the correcsponding MikroTik vendor and device tree
      documentation
      Signed-off-by: default avatarChristopher Hill <ch6574@gmail.com>
      Link: https://lore.kernel.org/r/20200521183631.37806-3-ch6574@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      39690c8d
    • Christopher Hill's avatar
      spi: rb4xx: update driver to be device tree aware · 9a436c62
      Christopher Hill authored
      This patch updates the spi driver spi-rb4xx.c to be device tree aware
      Signed-off-by: default avatarChristopher Hill <ch6574@gmail.com>
      Link: https://lore.kernel.org/r/20200521183631.37806-2-ch6574@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      9a436c62
    • Christopher Hill's avatar
      spi: rb4xx: null pointer bug fix · 678e5e1e
      Christopher Hill authored
      This patch fixes a null pointer bug in the spi driver spi-rb4xx.c by
      moving the private data initialization to earlier in probe
      Signed-off-by: default avatarChristopher Hill <ch6574@gmail.com>
      Link: https://lore.kernel.org/r/20200521183631.37806-1-ch6574@gmail.comSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      678e5e1e
    • Serge Semin's avatar
      spi: dw: Discard dma_width member of the dw_spi structure · 4fdc03a9
      Serge Semin authored
      This member has exactly the same value as n_bytes of the DW SPI private
      data object, it's calculated at the same point of the transfer method,
      n_bytes isn't changed during the whole transfer, and they even serve for
      the same purpose - keep number of bytes per transfer word, though the
      dma_width is used only to calculate the DMA source/destination addresses
      width, which n_bytes could be also utilized for. Taking all of these
      into account let's replace the dma_width member usage with n_bytes one
      and remove the former.
      Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Cc: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
      Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
      Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
      Cc: Paul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: devicetree@vger.kernel.org
      
      Link: https://lore.kernel.org/r/20200522000806.7381-6-Sergey.Semin@baikalelectronics.ruSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      4fdc03a9
    • Serge Semin's avatar
      spi: dw: Discard unused void priv pointer · 595c19d4
      Serge Semin authored
      Seeing the "void *priv" member of the dw_spi data structure is unused
      let's remove it. The glue-layers can embed the DW APB SSI controller
      descriptor into their private data object. MMIO driver for instance
      already utilizes that design pattern.
      Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Cc: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
      Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
      Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
      Cc: Paul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: devicetree@vger.kernel.org
      Link: https://lore.kernel.org/r/20200522000806.7381-5-Sergey.Semin@baikalelectronics.ruSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      595c19d4
    • Serge Semin's avatar
      spi: dw: Discard static DW DMA slave structures · 2afccbd2
      Serge Semin authored
      Having them declared is redundant since each struct dw_dma_chan has
      the same structure embedded and the structure from the passed dma_chan
      private pointer will be copied there as a result of the next calls
      chain:
      dma_request_channel() -> find_candidate() -> dma_chan_get() ->
      device_alloc_chan_resources() = dwc_alloc_chan_resources() ->
      dw_dma_filter().
      So just remove the static dw_dma_chan structures and use a locally
      declared data instance with dst_id/src_id set to the same values as
      the static copies used to have.
      Co-developed-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Signed-off-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Co-developed-by: default avatarRamil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
      Signed-off-by: default avatarRamil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
      Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
      Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
      Cc: Paul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: devicetree@vger.kernel.org
      
      Link: https://lore.kernel.org/r/20200522000806.7381-4-Sergey.Semin@baikalelectronics.ruSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      2afccbd2
    • Serge Semin's avatar
      spi: dw: Enable interrupts in accordance with DMA xfer mode · 43dba9f3
      Serge Semin authored
      It's pointless to track the Tx overrun interrupts if Rx-only SPI
      transfer is issued. Similarly there is no need in handling the Rx
      overrun/underrun interrupts if Tx-only SPI transfer is executed.
      So lets unmask the interrupts only if corresponding SPI
      transactions are implied.
      Co-developed-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Signed-off-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Cc: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
      Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
      Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
      Cc: Paul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: devicetree@vger.kernel.org
      Link: https://lore.kernel.org/r/20200522000806.7381-3-Sergey.Semin@baikalelectronics.ruSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      43dba9f3
  6. 20 May, 2020 5 commits
  7. 19 May, 2020 1 commit
  8. 15 May, 2020 8 commits
    • Serge Semin's avatar
      spi: dw: Add Tx/Rx DMA properties · 7db097dc
      Serge Semin authored
      Since commit 22d48ad7 ("spi: dw: Add Elkhart Lake PSE DMA support")
      the spi-dw-mid.c module supports a platform DMA engine handling the DW APB
      SSI controller requests. Lets alter the DW SPI bindings file to accept the
      Rx and Tx DMA line specifiers.
      Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Cc: Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Cc: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
      Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
      Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
      Cc: Paul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Allison Randal <allison@lohutok.net>
      Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Gareth Williams <gareth.williams.jx@renesas.com>
      Cc: linux-mips@vger.kernel.org
      Link: https://lore.kernel.org/r/20200515104758.6934-2-Sergey.Semin@baikalelectronics.ruSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      7db097dc
    • Mark Brown's avatar
      Merge series "spi: dw: Add generic DW DMA controller support" from Serge Semin... · b271cf33
      Mark Brown authored
      Merge series "spi: dw: Add generic DW DMA controller support" from Serge Semin <Sergey.Semin@baikalelectronics.ru>:
      
      Baikal-T1 SoC provides a DW DMA controller to perform low-speed peripherals
      Mem-to-Dev and Dev-to-Mem transaction. This is also applicable to the DW
      APB SSI devices embedded into the SoC. Currently the DMA-based transfers
      are supported by the DW APB SPI driver only as a middle layer code for
      Intel MID/Elkhart PCI devices. Seeing the same code can be used for normal
      platform DMAC device we introduced a set of patches to fix it within this
      series.
      
      First of all we need to add the Tx and Rx DMA channels support into the DW
      APB SSI binding. Then there are several fixes and cleanups provided as a
      initial preparation for the Generic DMA support integration: add Tx/Rx
      finish wait methods, clear DMAC register when done or stopped, Fix native
      CS being unset, enable interrupts in accordance with DMA xfer mode,
      discard static DW DMA slave structures, discard unused void priv pointer
      and dma_width member of the dw_spi structure, provide the DMA Tx/Rx burst
      length parametrisation and make sure it's optionally set in accordance
      with the DMA max-burst capability.
      
      In order to have the DW APB SSI MMIO driver working with DMA we need to
      initialize the paddr field with the physical base address of the DW APB SSI
      registers space. Then we unpin the Intel MID specific code from the
      generic DMA one and placed it into the spi-dw-pci.c driver, which is a
      better place for it anyway. After that the naming cleanups are performed
      since the code is going to be used for a generic DMAC device. Finally the
      Generic DMA initialization can be added to the generic version of the
      DW APB SSI IP.
      
      Last but not least we traditionally convert the legacy plain text-based
      dt-binding file with yaml-based one and as a cherry on a cake replace
      the manually written DebugFS registers read method with a ready-to-use
      for the same purpose regset32 DebugFS interface usage.
      
      This patchset is rebased and tested on the spi/for-next (5.7-rc5):
      base-commit: fe9fce6b2cf3 ("Merge remote-tracking branch 'spi/for-5.8' into spi-next")
      Co-developed-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Signed-off-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Co-developed-by: default avatarRamil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
      Signed-off-by: default avatarRamil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
      Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>
      Cc: Maxim Kaurkin <Maxim.Kaurkin@baikalelectronics.ru>
      Cc: Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>
      Cc: Ekaterina Skachko <Ekaterina.Skachko@baikalelectronics.ru>
      Cc: Vadim Vlasov <V.Vlasov@baikalelectronics.ru>
      Cc: Alexey Kolotnikov <Alexey.Kolotnikov@baikalelectronics.ru>
      Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
      Cc: Paul Burton <paulburton@kernel.org>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Allison Randal <allison@lohutok.net>
      Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Gareth Williams <gareth.williams.jx@renesas.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-spi@vger.kernel.org
      Cc: devicetree@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      
      ---
      
      Changelog v2:
      - Rebase on top of the spi repository for-next branch.
      - Move bindings conversion patch to the tail of the series.
      - Move fixes to the head of the series.
      - Apply as many changes as possible to be applied the Generic DMA
        functionality support is added and the spi-dw-mid is moved to the
        spi-dw-dma driver.
      - Discard patch "spi: dw: Fix dma_slave_config used partly uninitialized"
        since the problem has already been fixed.
      - Add new patch "spi: dw: Discard unused void priv pointer".
      - Add new patch "spi: dw: Discard dma_width member of the dw_spi structure".
        n_bytes member of the DW SPI data can be used instead.
      - Build the DMA functionality into the DW APB SSI core if required instead
        of creating a separate kernel module.
      - Use conditional statement instead of the ternary operator in the ref
        clock getter.
      
      Serge Semin (19):
        dt-bindings: spi: dw: Add Tx/Rx DMA properties
        spi: dw: Add Tx/Rx finish wait methods to the MID DMA
        spi: dw: Clear DMAC register when done or stopped
        spi: dw: Fix native CS being unset
        spi: dw: Enable interrupts in accordance with DMA xfer mode
        spi: dw: Discard static DW DMA slave structures
        spi: dw: Discard unused void priv pointer
        spi: dw: Discard dma_width member of the dw_spi structure
        spi: dw: Parameterize the DMA Rx/Tx burst length
        spi: dw: Use DMA max burst to set the request thresholds
        spi: dw: Initialize paddr in DW SPI MMIO private data
        spi: dw: Fix Rx-only DMA transfers
        spi: dw: Move Non-DMA code to the DW PCIe-SPI driver
        spi: dw: Remove DW DMA code dependency from DW_DMAC_PCI
        spi: dw: Add DW SPI DMA/PCI/MMIO dependency on the DW SPI core
        spi: dw: Cleanup generic DW DMA code namings
        spi: dw: Add DMA support to the DW SPI MMIO driver
        spi: dw: Use regset32 DebugFS method to create regdump file
        dt-bindings: spi: Convert DW SPI binding to DT schema
      
       .../bindings/spi/snps,dw-apb-ssi.txt          |  42 ---
       .../bindings/spi/snps,dw-apb-ssi.yaml         | 127 +++++++++
       .../devicetree/bindings/spi/spi-dw.txt        |  24 --
       drivers/spi/Kconfig                           |  15 +-
       drivers/spi/Makefile                          |   7 +-
       drivers/spi/{spi-dw-mid.c => spi-dw-dma.c}    | 257 ++++++++++--------
       drivers/spi/spi-dw-mmio.c                     |   9 +-
       drivers/spi/spi-dw-pci.c                      |  50 +++-
       drivers/spi/spi-dw.c                          |  98 +++----
       drivers/spi/spi-dw.h                          |  33 ++-
       10 files changed, 405 insertions(+), 257 deletions(-)
       delete mode 100644 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
       create mode 100644 Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
       delete mode 100644 Documentation/devicetree/bindings/spi/spi-dw.txt
       rename drivers/spi/{spi-dw-mid.c => spi-dw-dma.c} (53%)
      
      --
      2.25.1
      b271cf33
    • Chris Ruehl's avatar
      spi: spi-rockchip: use num-cs property and ctlr->enable_gpiods · eb1262e3
      Chris Ruehl authored
      The original implementation set num_chipselect to ROCKCHIP_SPI_MAX_CS_NUM (2)
      which seems wrong here. spi0 has 2 native cs, all others just one. With
      enable and use of cs_gpiods / GPIO CS, its correct to set the num_chipselect
      from the num-cs property and set max_native_cs with the define.
      If num-cs is missing the default set to num_chipselect = 1.
      Signed-off-by: default avatarChris Ruehl <chris.ruehl@gtsys.com.hk>
      Link: https://lore.kernel.org/r/20200511083022.23678-4-chris.ruehl@gtsys.com.hkSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      eb1262e3
    • Chris Ruehl's avatar
      spi: spi-rockchip: add support for spi slave mode · d065f41a
      Chris Ruehl authored
      Add support for spi slave mode in spi-rockchip. The register map has an entry
      for it. If spi-slave is set in dts, set this corresponding bit and add to
      mode_bits the SPI_NO_CS, allow slave mode without explicit CS use.
      Slave abort function had been added.
      Signed-off-by: default avatarChris Ruehl <chris.ruehl@gtsys.com.hk>
      Link: https://lore.kernel.org/r/20200511083022.23678-3-chris.ruehl@gtsys.com.hkSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      d065f41a
    • Chris Ruehl's avatar
      spi: spi-rockchip: cleanup use struct spi_controller · d66571a2
      Chris Ruehl authored
      Cleanup, move from the compatibily layer struct spi_master over
      to struct spi_controller, and rename the related function calls.
      Signed-off-by: default avatarChris Ruehl <chris.ruehl@gtsys.com.hk>
      Link: https://lore.kernel.org/r/20200511083022.23678-2-chris.ruehl@gtsys.com.hkSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      d66571a2
    • Serge Semin's avatar
      spi: dw: Clear DMAC register when done or stopped · 0327f0b8
      Serge Semin authored
      If DMAC register is left uncleared any further DMAless transfers
      may cause the DMAC hardware handshaking interface getting activated.
      So the next DMA-based Rx/Tx transaction will be started right
      after the dma_async_issue_pending() method is invoked even if no
      DMATDLR/DMARDLR conditions are met. This at the same time may cause
      the Tx/Rx FIFO buffers underrun/overrun. In order to fix this we
      must clear DMAC register after a current DMA-based transaction is
      finished.
      Co-developed-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Signed-off-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Link: https://lore.kernel.org/r/20200515104758.6934-4-Sergey.Semin@baikalelectronics.ruSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      0327f0b8
    • Serge Semin's avatar
      spi: dw: Initialize paddr in DW SPI MMIO private data · 77810d48
      Serge Semin authored
      This field is used only for the DW SPI DMA code initialization, that's
      why there were no problems with it being uninitialized in Dw SPI MMIO
      driver. Since in a further patch we are going to introduce the DW SPI DMA
      support in the MMIO version of the driver, lets set the field with the
      physical address of the DW SPI controller registers region.
      Co-developed-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Co-developed-by: default avatarRamil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
      Signed-off-by: default avatarGeorgy Vlasov <Georgy.Vlasov@baikalelectronics.ru>
      Signed-off-by: default avatarRamil Zaripov <Ramil.Zaripov@baikalelectronics.ru>
      Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Link: https://lore.kernel.org/r/20200515104758.6934-12-Sergey.Semin@baikalelectronics.ruSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      77810d48
    • Serge Semin's avatar
      spi: dw: Fix native CS being unset · 9aea644c
      Serge Semin authored
      Commit 6e0a32d6 ("spi: dw: Fix default polarity of native
      chipselect") attempted to fix the problem when GPIO active-high
      chip-select is utilized to communicate with some SPI slave. It fixed
      the problem, but broke the normal native CS support. At the same time
      the reversion commit ada9e3fc ("spi: dw: Correct handling of native
      chipselect") didn't solve the problem either, since it just inverted
      the set_cs() polarity perception without taking into account that
      CS-high might be applicable. Here is what is done to finally fix the
      problem.
      
      DW SPI controller demands any native CS being set in order to proceed
      with data transfer. So in order to activate the SPI communications we
      must set any bit in the Slave Select DW SPI controller register no
      matter whether the platform requests the GPIO- or native CS. Preferably
      it should be the bit corresponding to the SPI slave CS number. But
      currently the dw_spi_set_cs() method activates the chip-select
      only if the second argument is false. Since the second argument of the
      set_cs callback is expected to be a boolean with "is-high" semantics
      (actual chip-select pin state value), the bit in the DW SPI Slave
      Select register will be set only if SPI core requests the driver
      to set the CS in the low state. So this will work for active-low
      GPIO-based CS case, and won't work for active-high CS setting
      the bit when SPI core actually needs to deactivate the CS.
      
      This commit fixes the problem for all described cases. So no matter
      whether an SPI slave needs GPIO- or native-based CS with active-high
      or low signal the corresponding bit will be set in SER.
      Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
      Fixes: ada9e3fc ("spi: dw: Correct handling of native chipselect")
      Fixes: 6e0a32d6 ("spi: dw: Fix default polarity of native chipselect")
      Reviewed-by: default avatarCharles Keepax <ckeepax@opensource.cirrus.com>
      Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      
      Link: https://lore.kernel.org/r/20200515104758.6934-5-Sergey.Semin@baikalelectronics.ruSigned-off-by: default avatarMark Brown <broonie@kernel.org>
      9aea644c
  9. 12 May, 2020 2 commits
  10. 11 May, 2020 4 commits
  11. 07 May, 2020 1 commit