1. 18 Feb, 2019 8 commits
    • Oded Gabbay's avatar
      habanalabs: add event queue and interrupts · 1251f23a
      Oded Gabbay authored
      This patch adds support for receiving events from Goya's control CPU and
      for receiving MSI-X interrupts from Goya's DMA engines and CPU.
      
      Goya's PCI controller supports up to 8 MSI-X interrupts, which only 6 of
      them are currently used. The first 5 interrupts are dedicated for Goya's
      DMA engine queues. The 6th interrupt is dedicated for Goya's control CPU.
      
      The DMA queue will signal its MSI-X entry upon each completion of a command
      buffer that was placed on its primary queue. The driver will then mark that
      CB as completed and free the related resources. It will also update the
      command submission object which that CB belongs to.
      
      There is a dedicated event queue (EQ) between the driver and Goya's control
      CPU. The EQ is located on the Host memory. The control CPU writes a new
      entry to the EQ for various reasons, such as ECC error, MMU page fault, Hot
      temperature. After writing the new entry to the EQ, the control CPU will
      trigger its dedicated MSI-X entry to signal the driver that there is a new
      entry in the EQ. The driver will then read the entry and act accordingly.
      Reviewed-by: default avatarMike Rapoport <rppt@linux.ibm.com>
      Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      1251f23a
    • Oded Gabbay's avatar
      habanalabs: add h/w queues module · 9494a8dd
      Oded Gabbay authored
      This patch adds the H/W queues module and the code to initialize Goya's
      various compute and DMA engines and their queues.
      
      Goya has 5 DMA channels, 8 TPC engines and a single MME engine. For each
      channel/engine, there is a H/W queue logic which is used to pass commands
      from the user to the H/W. That logic is called QMAN.
      
      There are two types of QMANs: external and internal. The DMA QMANs are
      considered external while the TPC and MME QMANs are considered internal.
      For each external queue there is a completion queue, which is located on
      the Host memory.
      
      The differences between external and internal QMANs are:
      
      1. The location of the queue's memory. External QMANs are located on the
         Host memory while internal QMANs are located on the on-chip memory.
      
      2. The external QMAN write an entry to a completion queue and sends an
         MSI-X interrupt upon completion of a command buffer that was given to
         it. The internal QMAN doesn't do that.
      Reviewed-by: default avatarMike Rapoport <rppt@linux.ibm.com>
      Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      9494a8dd
    • Oded Gabbay's avatar
      habanalabs: add basic Goya h/w initialization · 839c4803
      Oded Gabbay authored
      This patch adds the basic part of Goya's H/W initialization. It adds code
      that initializes Goya's internal CPU, various registers that are related to
      internal routing, scrambling, workarounds for H/W bugs, etc.
      
      It also initializes Goya's security scheme that prevents the user from
      abusing Goya to steal data from the host, crash the host, change
      Goya's F/W, etc.
      Reviewed-by: default avatarMike Rapoport <rppt@linux.ibm.com>
      Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      839c4803
    • Oded Gabbay's avatar
      habanalabs: add command buffer module · be5d926b
      Oded Gabbay authored
      This patch adds the command buffer (CB) module, which allows the user to
      create and destroy CBs and to map them to the user's process
      address-space.
      
      A command buffer is a memory blocks that reside in DMA-able address-space
      and is physically contiguous so it can be accessed by the device without
      MMU translation. The command buffer memory is allocated using the
      coherent DMA API.
      
      When creating a new CB, the IOCTL returns a handle of it, and the
      user-space process needs to use that handle to mmap the buffer to get a VA
      in the user's address-space.
      
      Before destroying (freeing) a CB, the user must unmap the CB's VA using the
      CB handle.
      
      Each CB has a reference counter, which tracks its usage in command
      submissions and also its mmaps (only a single mmap is allowed).
      
      The driver maintains a pool of pre-allocated CBs in order to reduce
      latency during command submissions. In case the pool is empty, the driver
      will go to the slow-path of allocating a new CB, i.e. calling
      dma_alloc_coherent.
      Reviewed-by: default avatarMike Rapoport <rppt@linux.ibm.com>
      Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      be5d926b
    • Oded Gabbay's avatar
      habanalabs: add context and ASID modules · 0861e41d
      Oded Gabbay authored
      This patch adds two modules - ASID and context.
      
      Each user process that opens a device's file must have at least one
      context before it is able to "work" with the device. Each context has its
      own device address-space and contains information about its runtime state
      (its active command submissions).
      
      To have address-space separation between contexts, each context is assigned
      a unique ASID, which stands for "address-space id". Goya supports up to
      1024 ASIDs.
      
      Currently, the driver doesn't support multiple contexts. Therefore, the
      user doesn't need to actively create a context. A "primary context" is
      created automatically when the user opens the device's file.
      Reviewed-by: default avatarMike Rapoport <rppt@linux.ibm.com>
      Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      0861e41d
    • Oded Gabbay's avatar
      habanalabs: add basic Goya support · 99b9d7b4
      Oded Gabbay authored
      This patch adds a basic support for the Goya device. The code initializes
      the device's PCI controller and PCI bars. It also initializes various S/W
      structures and adds some basic helper functions.
      Reviewed-by: default avatarMike Rapoport <rppt@linux.ibm.com>
      Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      99b9d7b4
    • Oded Gabbay's avatar
      habanalabs: add Goya registers header files · 1ea2a20e
      Oded Gabbay authored
      This patch just adds a lot of header files that contain description of
      Goya's registers.
      Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      1ea2a20e
    • Oded Gabbay's avatar
      habanalabs: add skeleton driver · c4d66343
      Oded Gabbay authored
      This patch adds the habanalabs skeleton driver. The driver does nothing at
      this stage except very basic operations. It contains the minimal code to
      insmod and rmmod the driver and to create a /dev/hlX file per PCI device.
      Reviewed-by: default avatarMike Rapoport <rppt@linux.ibm.com>
      Signed-off-by: default avatarOded Gabbay <oded.gabbay@gmail.com>
      Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      c4d66343
  2. 15 Feb, 2019 1 commit
  3. 14 Feb, 2019 1 commit
  4. 13 Feb, 2019 2 commits
  5. 12 Feb, 2019 14 commits
  6. 11 Feb, 2019 5 commits
  7. 10 Feb, 2019 7 commits
  8. 09 Feb, 2019 2 commits
    • Linus Torvalds's avatar
      Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux · df3865f8
      Linus Torvalds authored
      Pull i2c fixes from Wolfram Sang:
       "One PM related driver bugfix and a MAINTAINERS update"
      
      * 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
        MAINTAINERS: Update the ocores i2c bus driver maintainer, etc
        i2c: omap: Use noirq system sleep pm ops to idle device for suspend
      df3865f8
    • Linus Torvalds's avatar
      Merge tag 'mips_fixes_5.0_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux · e8b50608
      Linus Torvalds authored
      Pull MIPS fixes from Paul Burton:
       "A batch of MIPS fixes for 5.0, nothing too scary.
      
         - A workaround for a Loongson 3 CPU bug is the biggest change, but
           still fairly straightforward. It adds extra memory barriers (sync
           instructions) around atomics to avoid a CPU bug that can break
           atomicity.
      
         - Loongson64 also sees a fix for powering off some systems which
           would incorrectly reboot rather than waiting for the power down
           sequence to complete.
      
         - We have DT fixes for the Ingenic JZ4740 SoC & the JZ4780-based Ci20
           board, and a DT warning fix for the Nexsys4/MIPSfpga board.
      
         - The Cavium Octeon platform sees a further fix to the behaviour of
           the pcie_disable command line argument that was introduced in v3.3.
      
         - The VDSO, introduced in v4.4, sees build fixes for configurations
           of GCC that were built using the --with-fp-32= flag to specify a
           default 32-bit floating point ABI.
      
         - get_frame_info() sees a fix for configurations with
           CONFIG_KALLSYMS=n, for which it previously always returned an
           error.
      
         - If the MIPS Coherence Manager (CM) reports an error then we'll now
           clear that error correctly so that the GCR_ERROR_CAUSE register
           will be updated with information about any future errors"
      
      * tag 'mips_fixes_5.0_3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
        mips: cm: reprime error cause
        mips: loongson64: remove unreachable(), fix loongson_poweroff().
        MIPS: Remove function size check in get_frame_info()
        MIPS: Use lower case for addresses in nexys4ddr.dts
        MIPS: Loongson: Introduce and use loongson_llsc_mb()
        MIPS: VDSO: Include $(ccflags-vdso) in o32,n32 .lds builds
        MIPS: VDSO: Use same -m%-float cflag as the kernel proper
        MIPS: OCTEON: don't set octeon_dma_bar_type if PCI is disabled
        DTS: CI20: Fix bugs in ci20's device tree.
        MIPS: DTS: jz4740: Correct interrupt number of DMA core
      e8b50608