- 13 May, 2016 21 commits
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Mark Brown authored
Merge remote-tracking branches 'asoc/topic/es8328', 'asoc/topic/find-dai', 'asoc/topic/fsl', 'asoc/topic/fsl-sai' and 'asoc/topic/fsl-ssi' into asoc-next
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Mark Brown authored
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Mark Brown authored
Merge remote-tracking branches 'asoc/topic/bcm2835', 'asoc/topic/cs42l56', 'asoc/topic/da7213', 'asoc/topic/da7218' and 'asoc/topic/da7219' into asoc-next
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Mark Brown authored
Merge remote-tracking branches 'asoc/topic/adsp', 'asoc/topic/ak4624', 'asoc/topic/atmel' and 'asoc/topic/au1x' into asoc-next
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
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Mark Brown authored
Merge remote-tracking branches 'asoc/fix/davinci', 'asoc/fix/fsl-ssi', 'asoc/fix/rockchip' and 'asoc/fix/rt286' into asoc-linus
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Arnaud Mouiche authored
Happened when the Playback (or Capture) is running continuously and Capture (or Playback) is restarted (xrun, manual stop/start...) Since the RX (or TX) FIFO are only reset when the whole SSI is disabled, pending samples from previous capture (or playback) session may still be present. They must be erased to not introduce channel slipping. FIFO Clear register fields are documented in IMX51, IMX35 reference manual. They are not documented in IMX50 or IMX6 RM, despite they are working as expected on IMX6SL and IMX6solo. Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Caleb Crome <caleb@crome.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Arnaud Mouiche authored
Previously, SCR.SSIEN and SCR.TE were enabled at once if no capture stream was also running. This may not give a chance for the DMA to write the first sample in TX FIFO before the streaming starts on the PCM bus, inserting void samples first. Those void samples are then responsible for slipping the channels. Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Caleb Crome <caleb@crome.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Arnaud Mouiche authored
If the capture is already running while playback is started, it is highly probable (>80% in a 8 channels scenario) that samples are lost between the DMA and TX fifo. The reason is that SIER.TDMAE is set before STCR.TFEN0, leaving a time window where the FIFO doesn't receive the samples written by the DMA. This particular case happened only if capture is already enabled as SCR.SSIEN is already set at the playback startup instant. Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Caleb Crome <caleb@crome.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Arnaud Mouiche authored
Most of functions only receive the ssi_private reference and don't have a knowledge of 'dev' pointer, even for debug purpose. Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com> Tested-by: Caleb Crome <caleb@crome.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Arnaud Mouiche authored
im6sl reference manual 47.7.4: " Bit clock - Used to serially clock the data bits in and out of the SSI port. This clock is either generated internally (from SSI's sys clock) or taken from external clock source (through the Tx/Rx clock ports). [...] Care should be taken to ensure that the bit clock frequency (either internally generated by dividing the SSI's sys clock or sourced from external device through Tx/Rx clock ports) is never greater than 1/5 of the ipg_clk (from CCM) frequency. " Since, in master mode, the sysclk is a multiple of bitclk, we can easily reach a high sysclk value, whereas keeping a reasonable bitclk. ex: 8ch x 16bit x 48kHz = 6144000, requires a 24576000 sysclk (PM=1) yet ipg_clk/5 = 66Mhz/5 = 13.2 Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Caleb Crome <caleb@crome.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Arnaud Mouiche authored
The max number of slots in TDM mode is 32: - Frame Rate Divider Control is a 5bit value - Time slot mask registers control 32 slots. Signed-off-by: Arnaud Mouiche <arnaud.mouiche@invoxia.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Caleb Crome <caleb@crome.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Florian Meier authored
Some definitions to support the PCM5102A codec by Texas Instruments. Signed-off-by: Florian Meier <florian.meier@koalo.de> Changes to original patch by Florian Meier: * rebased (Makefile and Kconfig * fixed checkpath errors (spaces, newlines) * added dt-binding documentation Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Vinod Koul authored
Manage the hda idisp link using shiny new link APIs. We need to keep link On while we probe and also hold the reference in runtime resume and drop in suspend Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Vinod Koul authored
Use shiny new link APIs to manage the links. Also remove old link configuration logic from driver. We need to keep link and cmd dma to off during active suspend to allow system to enter low power state and turn it on if the link and cmd dma was on before active suspend in active resume. Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Vinod Koul authored
The HDA links can be switched off when not is use, similarly command DMA can be stopped as well. This calls for a reference counting mechanism on the link by it's users to manage the link power. The DMA can be turned off when all links are off For this we add two APIs snd_hdac_ext_bus_link_get snd_hdac_ext_bus_link_put They help users to turn up/down link and manage the DMA as well Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 12 May, 2016 3 commits
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Vinod Koul authored
Broxton-P reference platform also uses combo jack for audio connector so we need to set codec pdata to use this based on DMI match for this board. Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Senthilnathan Veppur <senthilnathanx.veppur@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Vinod Koul authored
ACPI driver data can be NULL so we need to check that before dereference the driver data. Signed-off-by: Senthilnathan Veppur <senthilnathanx.veppur@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Acked-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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John Keeping authored
Commit 086d7f80 ("ASoC: Convert WM8962 MICBIAS to a supply widget", 2011-09-23) says: A supply widget is generally clearer than a MICBIAS widget and a mic bias is just a type of supply so use a supply widget for the MICBIAS. This also avoids confusion with the routing when connected to multiple inputs. but this has never been documented as a policy. Add some comments to make it clear. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 11 May, 2016 3 commits
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Stephen Rothwell authored
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Mark Brown authored
Merge branch 'topic/dai-link' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into asoc-intel
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Joonas Lahtinen authored
Format number after 0x in hex. Cc: Jie Yang <yang.jie@linux.intel.com> Cc: Liam Girdwood <lgirdwood@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 10 May, 2016 13 commits
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Adam Thomson authored
Current checking for PLL 32KHz mode fails in driver code when bypassing the PLL. This is due to an incorrect check of PLL source type when 32KHz clock is provided. Removal of this check resolves the issue. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Adam Thomson authored
This update changes the dividers used for ranges of input MCLK frequencies, to improve PLL locking for a corner case when at edge of MCLK frequency input divider range. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Adam Thomson authored
Currently PC counter is always synchronised to DAI which means that when the DAI is disabled, features such as ALC calibration cannot be executed successfully. This patch makes sure that when the DAI is disabled, PC counter is set to free-running. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Adam Thomson authored
When the codec is DAI clk slave, and the SRM feature of the PLL is being used, the enabling of the DAI should occur only after the PLL has locked to the incoming WCLK. This update adds checking to the the DAI widget event, so it waits for SRM to lock. There is also a timeout if that lock doesn't occur within a given time. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Adam Thomson authored
Currently, when Codec is I2S master DAI clocks are continuously generated even if all audio streams have stopped. To improve efficiency, control of the DAI clocks for master mode have been moved to a DAPM widget event so they're only enabled as required. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Ramesh Babu authored
This patch adds the Broxton-P machine driver for Intel Broxton-P reference boards. This machine uses the RT298 codec Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Senthilnathan Veppur <senthilnathanx.veppur@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Pardha Saradhi K authored
The Broxton-P platform has 6 SSPs so we need to add ssp2 thru ssp5 to DAI list for the driver. Signed-off-by: Pardha Saradhi K <pardha.saradhi.kesapragada@intel.com> Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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John Keeping authored
Although the ES8328 does support different rates for capture and playback, only very limited combinations are supported (8kHz and 48kHz or 8.0182kHz and 44.1kHz) with most rates required to be symmetric. Instead of adding a lot of complexity for little gain, let's enforce symmetric rates. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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John Keeping authored
Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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John Keeping authored
The values are the same for the DAC and ADC so remove the specific values and use values with shifts. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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John Keeping authored
This is a refactor in preparation for supporting more sample sizes which has no functional change. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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John Keeping authored
The chip only supports single reads and writes. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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John Keeping authored
This is always used along with ES8328_CONTROL1_ENREF so there is no change in the generated code as a result of this fix. Signed-off-by: John Keeping <john@metanate.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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