- 30 Jan, 2008 40 commits
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Glauber de Oliveira Costa authored
This patch moves definitions that are present in only one of the files (between processor_32.h and processor_64.h), to processor.h. They're mostly structures and function definitions. Signed-off-by:
Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu> Signed-off-by:
Thomas Gleixner <tglx@linutronix.de>
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Glauber de Oliveira Costa authored
This patch moves the mm_segment_t structure definition to processor.h This makes mmsegment.h file useless, and it is deleted. Signed-off-by:
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Glauber de Oliveira Costa authored
This patch removes definitions and macros that are not used anymore from processor_64.h Signed-off-by:
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Glauber de Oliveira Costa authored
x86_cpuinfo is one more to the family of "not fundamentally different" structs. It's unified in processor.h, with very specific fields enclosed around ifdefs. Signed-off-by:
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Glauber de Oliveira Costa authored
This patch changes the bitwise operations in bitops.h to get a void pointers as a parameter. Before this patch, a lot of warnings can be seen. They're gone after it. Signed-off-by:
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Glauber de Oliveira Costa authored
This patch moves the TASK_ALIGN constraints to common header. The base of it is the same for x86_64 and i386. The only difference is the presence of vSMP in x86_64. As it's not a worry in i386, we can safely use the same code for both. Signed-off-by:
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Glauber de Oliveira Costa authored
The thread_struct is not fundamentally different between architectures, and this patch puts it in the common header. What's really unique for each of them is enclosed in ifdefs. Signed-off-by:
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Glauber de Oliveira Costa authored
Paravirt guests need to inform the underlying hypervisor whenever the sp0 tss field changes. i386 already has such a function, and we use it for x86_64 too. There's an unnecessary (for 64-bit) msr handling part in the original version, and it is placed around an ifdef. Making no more sense in processor_32.h, it is moved to the common header Signed-off-by:
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Glauber de Oliveira Costa authored
Although slighly different, the tss_struct is very similar in x86_64 and i386. The really different part, which matchs the hardware vision of it, is now called x86_hw_tss, and each of the architectures provides yours. It's then used as a field in the outter tss_struct. Signed-off-by:
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Glauber de Oliveira Costa authored
current_text_addr() has a different implementation in x86_64 and i386, but it is not fundamentally different. I stick to the i386 implementation, that seem to be a common base, and move it to processor.h Signed-off-by:
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Glauber de Oliveira Costa authored
This patch moves the pieces of processor_32.h and processor_64 that are equal to processor.h. Only what's exactly the same is moved around, the rest not being touched. Signed-off-by:
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Glauber de Oliveira Costa authored
This patch moves the definition of set_iopl_mask to processor.h, instead of letting it at processor_32.h. For x86_64, nothing is done, as we don't really need such a function. However, having it on both arches saves us from putting an ifdef in the pv_cpu_ops struct. Signed-off-by:
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Glauber de Oliveira Costa authored
This patch unifies the paravirt pieces of processor.h The functionality present in 32 bit, but not (yet) in 64-bit, like load_sp0 is _not_ done here, and let to a different patch. With this unification, we get paravirt for free in x86_64 processor.h Signed-off-by:
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Glauber de Oliveira Costa authored
There are currently two definitions of load_cr3, that essentially do the same thing. This patch moves them all to processor.h. Signed-off-by:
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Glauber de Oliveira Costa authored
This patch moves the (duplicated) desc_empty implementation to desc.h, where the descriptor things belong. Signed-off-by:
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Glauber de Oliveira Costa authored
There's no need for the *_MASK flags (TF_MASK, IF_MASK, etc), found in processor.h (both _32 and _64). They have a one-to-one mapping with the EFLAGS value. This patch removes the definitions, and use the already existent X86_EFLAGS_ version when applicable. [ roland@redhat.com: KVM build fixes. ] Signed-off-by:
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Glauber de Oliveira Costa authored
This patch wipes out the definitions of tsc_disable from processor_32.h and move it to tsc.h, were it belongs Signed-off-by:
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Neil Horman authored
clean up checkpatch errors. No code changed. text data bss dec hex filename 705 120 0 825 339 early-quirks.o.before 705 120 0 825 339 early-quirks.o.after Signed-off-by:Neil Horman <nhorman@tuxdriver.com> Signed-off-by:
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Cyrill Gorcunov authored
clean up checkpatch warnings/errors on i387_32.c The old and new i387_32.s (asm listings) were checked with diff to be identical so it's safe to apply this patch. Signed-off-by:
Cyrill Gorcunov <gorunov@gmail.com> Signed-off-by:
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Harvey Harrison authored
One section collecting all constant defines. Ifdef the asm blocks for X86_32/64. Signed-off-by:
Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by:
Vivek Goyal <vgoyal@redhat.com>
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Harvey Harrison authored
Mostly space after comma, one space after if. Signed-off-by:
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Harvey Harrison authored
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Harvey Harrison authored
Handle the use of long on X86_32 and quad on X86_64 Signed-off-by:
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Harvey Harrison authored
Use the shorter +m form rather than =m and m. Signed-off-by:
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Harvey Harrison authored
Common prefix from both files moved to local.h Change __inline__ to inline Signed-off-by:
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Cyrill Gorcunov authored
clean up include/asm-x86/pda.h, as suggested by checkpatch.pl. Signed-off-by:
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Neil Horman authored
Recently a kdump bug was discovered in which a system would hang inside calibrate_delay during the booting of the kdump kernel. This was caused by the fact that the jiffies counter was not being incremented during timer calibration. The root cause of this problem was found to be a bios misconfiguration of the hypertransport bus. On system affected by this hang, the bios had assigned APIC ids which used extended apic bits (more than the nominal 4 bit ids's), but failed to configure bit 17 of the hypertransport transaction config register, which indicated that the mask for the destination field of interrupt packets accross the ht bus (see section 3.3.9 of http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/26094.PDF). If a crash occurs on a cpu with an APIC id that extends beyond 4 bits, it will not recieve interrupts during the kdump kernel boot, and this hang will be the result. The fix is to add this patch, whcih add an early pci quirk check, to forcibly enable this bit in the httcfg register. This enables all cpus on a system to receive interrupts, and allows kdump kernel bootup to procede normally. Signed-off-by:
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Ingo Molnar authored
replace outb_p() with udelay(2). This is a real ISA device so it likely needs this particular delay. Signed-off-by:
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Jan Beulich authored
The patch introducing this left out x86-64, despite it also having extra entries. [ mingo@elte.hu: re-merged this to after the unification patches. ] Signed-off-by:
Jan Beulich <jbeulich@novell.com> Signed-off-by:
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Jan Beulich authored
Its previous use in a call to on_each_cpu() was pointless, as at the time that code gets executed only one CPU is online. Further, the function can be __cpuinit, and for this to work without CONFIG_HOTPLUG_CPU setup_nmi() must also get an attribute (this one can even be __init; on 64-bits check_timer() also was lacking that attribute). Signed-off-by:
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Jan Beulich authored
.. allowing to remove their declarations from a global include file (the symbols don't exist for anything but x86). Likewise for 64-bits' fix_processor_context(), just that that one was properly declared in an arch-specific header. Signed-off-by:
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Jan Beulich authored
The array is never written, and on 64-bits it's not even being used past initial boot. Signed-off-by:
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Jan Beulich authored
This requires making die() return a value, making its callers honor this (and be prepared that it may return), and making oops_end() have two additional parameters. Signed-off-by:
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Jan Beulich authored
This generally allows better code to be generated, since the zero- extension during 32-bit operations comes for free (needed when the result is used as array index or similar), whereas sign extension must be done explicitly and frequently requires a one byte larger instruction due to the necessary rex64 prefix. Signed-off-by:
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Jan Beulich authored
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Masami Hiramatsu authored
This patch unifies kprobes code. - Unify kprobes_*.h to kprobes.h - Unify kprobes_*.c to kprobes.c (Differences are separated by ifdefs) - Most differences are related to REX prefix and rip relatives. - Two inline assembly code are different. - One difference in kprobe_handlre() - One fixup exception code is different, but it will be unified if mm/extable_*.c are unified. - Merge history logs into arch/x86/kernel/kprobes.c. Signed-off-by:
Masami Hiramatsu <mhiramat@redhat.com> Signed-off-by:
Jim Keniston <jkenisto@us.ibm.com> Signed-off-by:
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Masami Hiramatsu authored
This patch cleanup kprobes code on x86 for unification. This patch is based on Arjan's previous work. - Remove spurious whitespace changes - Add harmless includes - Make the 32/64 files more identical - Generalize structure fields' and local variable name. - Wrap accessing to stack address by macros. - Modify bitmap making macro. - Merge fixup code into is_riprel() and change its name to fix_riprel(). - Set MAX_INSN_SIZE to 16 on both arch. - Use u32 for bitmaps on both architectures. - Clarify some comments. Signed-off-by:
Arjan van de Ven <arjan@infradead.org> Signed-off-by:
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Masami Hiramatsu authored
This patch adds kretprobe-booster to kprobes_64.c. - Changes are based on x86-32. - Rewrite register saving/restoring code Signed-off-by:
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Masami Hiramatsu authored
This patch adds kprobe-booster to kprobes_64.c. - Changes are based on x86-32. - Add REX prefix checking code. Signed-off-by:
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Nick Piggin authored
Introduce ticket lock spinlocks for x86 which are FIFO. The implementation is described in the comments. The straight-line lock/unlock instruction sequence is slightly slower than the dec based locks on modern x86 CPUs, however the difference is quite small on Core2 and Opteron when working out of cache, and becomes almost insignificant even on P4 when the lock misses cache. trylock is more significantly slower, but they are relatively rare. On an 8 core (2 socket) Opteron, spinlock unfairness is extremely noticable, with a userspace test having a difference of up to 2x runtime per thread, and some threads are starved or "unfairly" granted the lock up to 1 000 000 (!) times. After this patch, all threads appear to finish at exactly the same time. The memory ordering of the lock does conform to x86 standards, and the implementation has been reviewed by Intel and AMD engineers. The algorithm also tells us how many CPUs are contending the lock, so lockbreak becomes trivial and we no longer have to waste 4 bytes per spinlock for it. After this, we can no longer spin on any locks with preempt enabled and cannot reenable interrupts when spinning on an irq safe lock, because at that point we have already taken a ticket and the would deadlock if the same CPU tries to take the lock again. These are questionable anyway: if the lock happens to be called under a preempt or interrupt disabled section, then it will just have the same latency problems. The real fix is to keep critical sections short, and ensure locks are reasonably fair (which this patch does). Signed-off-by:
Nick Piggin <npiggin@suse.de> Signed-off-by:
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