- 17 Apr, 2008 40 commits
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Glauber Costa authored
The code is now the same between i386 and x86_64. We already know what happens when it reaches this point: They go away from the arch-specific headers, and suddenly appears in the common header. Signed-off-by:
Glauber Costa <gcosta@redhat.com> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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Glauber Costa authored
We provide a bogus macro for x86_64 in case CONFIG_X86_LOCAL_APIC is not set. It will always be set for x86_64, so the effect is just to make the code equal to i386. Signed-off-by:
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Glauber Costa authored
APIC_DEFINITION is not defined in x86_64, so in practice, we keep our old code here. But as a nice side effect, the code is now equal to smp_32.h. Signed-off-by:
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Ben Castricum authored
Report when microcode was successfully updated. It used to be there but now with DEBUG unset it becomes very silent. Also some cosmetic fixes. Signed-off-by:
Ben Castricum <lk08@bencastricum.nl> Signed-off-by:
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Alexey Starikovskiy authored
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Alexey Starikovskiy <astarikovskiy@suse.de> Signed-off-by:
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Ingo Molnar authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Ingo Molnar authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Ingo Molnar authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Ingo Molnar authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Alexey Starikovskiy authored
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Arjan van de Ven authored
The new cacheflush.h API's didn't have any comments describing how they're to be used yet and the conventions around these functions. This patch adds comments to this effect; in order for that to be a logical series, some prototypes had to move around. Signed-off-by:
Arjan van de Ven <arjan@linux.intel.com> Signed-off-by:
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Dave Jones authored
Upcoming 64 bit processors from Centaur can use sysenter. Signed-off-by:
Dave Jones <davej@codemonkey.org.uk> Signed-off-by:
Jesse Ahrens <jahrens@centtech.com> Signed-off-by:
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Jeremy Fitzhardinge authored
Using a naked parameterless macro could lead to other tokens being unexpectedly replaced. Signed-off-by:
Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Signed-off-by:
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Jesper Juhl authored
When compilers became generally better at optimizing code than humans, the register keyword became mostly useless. For the floppy driver it certainly is since it's so slow compared to the rest of the system that optimizing access to a single variable or two isn't going to make any real difference So let's just leave it to the compiler - it'll do a better job anyway. This patch does away with a few register keywords in the x86 floppy driver. Signed-off-by:
Jesper Juhl <jesper.juhl@gmail.com> Signed-off-by:
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Glauber Costa authored
take them out of the x86_64-specific asm/mach_apic.h Signed-off-by:
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Cyrill Gorcunov authored
By including processor-flags.h we are allowed to use predefined macroses instead of keeping own ones Signed-off-by:
Cyrill Gorcunov <gorcunov@gmail.com> Signed-off-by:
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Ingo Molnar authored
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Glauber Costa authored
take them out of the x86_64-only asm/mach_apic.h Signed-off-by:
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Andi Kleen authored
On AMD SMM protected memory is part of the address map, but handled internally like an MTRR. That leads to large pages getting split internally which has some performance implications. Check for the AMD TSEG MSR and split the large page mapping on that area explicitely if it is part of the direct mapping. There is also SMM ASEG, but it is in the first 1MB and already covered by the earlier split first page patch. Idea for this came from an earlier patch by Andreas Herrmann On a RevF dual Socket Opteron system kernbench shows a clear improvement from this: (together with the earlier patches in this series, especially the split first 2MB patch) [lower is better] no split stddev split stddev delta Elapsed Time 87.146 (0.727516) 84.296 (1.09098) -3.2% User Time 274.537 (4.05226) 273.692 (3.34344) -0.3% System Time 34.907 (0.42492) 34.508 (0.26832) -1.1% Percent CPU 322.5 (38.3007) 326.5 (44.5128) +1.2% => About 3.2% improvement in elapsed time for kernbench. With GB pages on AMD Fam1h the impact of splitting is much higher of course, since it would split two full GB pages (together with the first 1MB split patch) instead of two 2MB pages. I could not benchmark a clear difference in kernbench on gbpages, so I kept it disabled for that case That was only limited benchmarking of course, so if someone was interested in running more tests for the gbpages case that could be revisited (contributions welcome) I didn't bother implementing this for 32bit because it is very unlikely the 32bit lowmem mapping overlaps into the TSEG near 4GB and the 2MB low split is already handled for both. [ mingo@elte.hu: do it on gbpages kernels too, there's no clear reason why it shouldnt help there. ] Signed-off-by:Andi Kleen <ak@suse.de> Acked-by: andreas.herrmann3@amd.com Cc: mingo@elte.hu Signed-off-by:
Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
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Andi Kleen authored
RDMSR for 64bit values with exception handling. Makes it easier to deal with 64bit valued MSRs. The old 64bit code base had that too as checking_rdmsrl(), but it got dropped somehow. Signed-off-by:
Andi Kleen <andi@firstfloor.org> Cc: andreas.herrmann3@amd.com Cc: mingo@elte.hu Signed-off-by:
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