1. 13 Nov, 2012 1 commit
    • Ralf Baechle's avatar
      MIPS: Malta: Fix interupt number of CBUS UART. · 225ae5fd
      Ralf Baechle authored
      The CBUS UART's interrupt number was wrong conflicting with the interrupt
      being tied to the Intel PIIX4.  Since the PIIX4's interrupt is registered
      before the CBUS UART which is not being used on most systems this would
      not be noticed.
      
      Attempts to open the ttyS2 CBUS UART would result in:
      
      genirq: Flags mismatch irq 18. 00000000 (serial) vs. 00010000 (XT-PIC cascade)
      serial_link_irq_chain: request failed: -16 for irq: 18
      
      Qemu was written to match the kernel so will need to be fixed also.
      Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      225ae5fd
  2. 09 Nov, 2012 6 commits
  3. 04 Nov, 2012 1 commit
  4. 03 Nov, 2012 15 commits
  5. 02 Nov, 2012 17 commits