Commits · 2665ec41718a8514c85f2becf83c58b8c5041ed6 · nexedi / linux

18 Jul, 2019 40 commits

drm/amdgpu: disable concurrent flushes on Navi14 · 2665ec41
Alex Deucher authored Jul 02, 2019
```
Same thing applies to navi14 as navi10.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
```
2665ec41

drm/amdgpu: enable gfxoff code path for navi14 · ba02636d

Jack Xiao authored Jul 05, 2019

Based on navi10 gfxoff logic, enable the related code
path for navi14.
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

ba02636d

drm/amdgpu/vcn: enable indirect DPG SRAM mode for navi14 · 0377b088

Xiaojie Yuan authored Jul 02, 2019

Enable VCN dynamic powergating for navi14.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

0377b088

drm/amd/powerplay: disable gfxoff for navi14 · e017bb80

Xiaojie Yuan authored May 13, 2019

gfxoff doesn't work on navi14 yet, so disable it for now
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

e017bb80

drm/amdgpu/nv: set vcn pg flag for navi14 · 03917df7

Xiaojie Yuan authored Jul 02, 2019

Enable VCN power gating by default.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

03917df7

drm/amd/display: disable display writeback for navi14 · c5cc14e3

Xiaojie Yuan authored Apr 18, 2019

not used.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

c5cc14e3

drm/amdgpu: enable async gfx ring for navi14 · 5e0f378d

Xiaojie Yuan authored Mar 28, 2019

Same as navi10.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

5e0f378d

drm/amdgpu: enable clock gatings for navi14 · d0c39f8c

Xiaojie Yuan authored Mar 20, 2019

Set appropriate CG flags for navi14.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

d0c39f8c

drm/amdgpu/athub2: set clock gating for navi14 · 29e6fd7c

Xiaojie Yuan authored Mar 22, 2019

same as navi10.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

29e6fd7c

drm/amdgpu/mmhub2: set clock gating for navi14 · 408c49de

Xiaojie Yuan authored Mar 22, 2019

same as navi10.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

408c49de

drm/amdgpu: declare asd firmware for navi14 · 8687b47e

Xiaojie Yuan authored Mar 20, 2019

So the dependency gets properly tracked.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Snow Zhang <snow.zhang@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

8687b47e

drm/amdgpu: Enable VCN on navi14 · e149a2f6

James Zhu authored Mar 01, 2019

Add navi14 vcn firmware, and enable VCN on navi14.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

e149a2f6

drm/amd/display: skip to load dmcu firmware for navi14 · baebcf2e

Xiaojie Yuan authored Mar 15, 2019

not needed for navi14 at the moment.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

baebcf2e

drm/amdgpu: skip to load ta firmware for navi14 · e470d287

Xiaojie Yuan authored Mar 15, 2019

Not relevant on navi14.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

e470d287

drm/amd/display: add ASICREV defines v2 · c6e764b4

Bhawanpreet Lakha authored Jul 02, 2019

Add revs for navi10 and 14.
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

c6e764b4

drm/amd/display: add dm block · 8fceceb6

Bhawanpreet Lakha authored Feb 26, 2019

enable DC for navi14.
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

8fceceb6

drm/amd/display: add NAVI14 in resource construct · 2ebe1773

Bhawanpreet Lakha authored Feb 26, 2019

Change the pipes to 5 if the asic is nv14

This is a temp patch, there was some refactor in the dml part of the code.
which is not in this branch. for now this is good, we can implement this
properly once we have an updated branch.
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2ebe1773

drm/amd/display: add nv14 cases to amdgpu_dm · fce651e3

Bhawanpreet Lakha authored Jul 02, 2019

Mostly shared with navi10.
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

fce651e3

drm/amdgpu: enable sw smu ip for navi14 · ab5e5121

Xiaojie Yuan authored Feb 13, 2019

same as navi10.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

ab5e5121

drm/amdgpu/smu11: add support for navi14 · b02ff126

Xiaojie Yuan authored Feb 13, 2019

Same as navi10.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

b02ff126

drm/amdgpu/psp: start rlc autoload after psp received rlcg for navi14 · 7840d8ba

Xiaojie Yuan authored Feb 12, 2019

Update for navi14.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

7840d8ba

drm/amdgpu: enable psp ip block for navi14 · 4adc0732

Xiaojie Yuan authored Feb 10, 2019

Same as navi10.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Snow Zhang <Snow.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4adc0732

drm/amdgpu/psp: add psp support for navi14 (v3) · 82522b2d

Xiaojie Yuan authored Jul 08, 2019

Same as navi10.

v2: squash in logic fix (Colin Ian King)
v3: squash in logic simplification (Alex)
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Snow Zhang <Snow.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

82522b2d

drm/amdgpu: enable virtual display for navi14 · 691f69b6

Xiaojie Yuan authored Jan 16, 2019

Virtual display is a sw based kms interface for virtualization
and emulation.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

691f69b6

drm/amdgpu: add ip blocks for navi14 · a29bfd12

Xiaojie Yuan authored Dec 19, 2018

Add the initial IP blocks for navi14
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

a29bfd12

drm/amdgpu/soc15: add support for navi14 · 5e71e011

Xiaojie Yuan authored Dec 17, 2018

same as navi10
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

5e71e011

drm/amdgpu/gfx10: fix programming of SC_HIZ_TILE_FIFO_SIZE field · b8cb98cd

Jack Xiao authored May 28, 2019

max fifo size is 128 and PA_SC_FIFO_SIZE[20:15]=SC_HIZ_TILE_FIFO_SIZE
field is programmed in units of two entries, but 6 bits is insufficient
to hold value 128/2 = 64, so set this field as 0 which is interpreted by
the hardware as maximum physical fifo size(128).
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

b8cb98cd

drm/amdgpu/gfx10: update gfx golden settings for navi14 · 3ddec515

Tao Zhou authored Jul 02, 2019

Updated settings from hw team.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

3ddec515

drm/amdgpu/gfx10: update gfx golden settings for navi14 · 4904ede1

Xiaojie Yuan authored Mar 29, 2019

Add updated settings from hw team.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4904ede1

drm/amdgpu/gfx: update gc_v10_1_1 golden setting · be184b4c

Xiaojie Yuan authored Feb 14, 2019

Updated settings for hw team.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

be184b4c

drm/amdgpu/gfx10: add gfx v10_1_1 golden settings for navi14 · 74178467

Xiaojie Yuan authored Feb 12, 2019

Add golden settings for navi14.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Snow Zhang <Snow.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

74178467

drm/amdgpu/gfx: add definition of mmCGTT_GS_NGG_CLK_CTRL · 58acab66

Xiaojie Yuan authored Feb 14, 2019

Needed for clockgating.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

58acab66

drm/amdgpu/gfx10: set tcp harvest for navi14 · d55c193d

Xiaojie Yuan authored Jan 29, 2019

Update settings for navi14.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

d55c193d

drm/amdgpu: set rlc funcs for navi14 · e938ded6

Xiaojie Yuan authored Dec 25, 2018

Same as navi10.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

e938ded6

drm/amdgpu: add me/mec configurations for navi14 · 0c090023

Xiaojie Yuan authored Dec 25, 2018

Add navi14 to appropriate cases.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

0c090023

drm/amdgpu/gfx10: add clockgating support for navi14 · 41957a8e

Xiaojie Yuan authored Dec 17, 2018

Same as navi10.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

41957a8e

drm/amdgpu/gfx10: add gfx config for navi14 · 4bd80a46

Xiaojie Yuan authored Dec 17, 2018

Add gfx config details for navi14.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4bd80a46

drm/amdgpu/gfx10: add placeholder for navi14 golden settings · 47b67bd7

Xiaojie Yuan authored Jul 16, 2019

To be filled in once available.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

47b67bd7

drm/amdgpu/gfx10: add support for navi14 firmware · 654bcee0

Xiaojie Yuan authored Dec 17, 2018

Add support for navi14 CP firmware files.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

654bcee0

drm/amdgpu/sdma5: set clock gating for navi14 · 9571710f

Xiaojie Yuan authored Mar 22, 2019

same as navi10.
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

9571710f