- 21 Jun, 2016 40 commits
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Ido Schimmel authored
The argument 'br_dev' is never used, so remove it. Signed-off-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Ido Schimmel authored
When responding to unlinking CHANGEUPPER notifications we shouldn't return any value, as it's not checked by upper layers. In addition, there's nothing the driver can do in case of failure, so it should simply continue and try to free as much resources as possible and not stop on first error. Signed-off-by:
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Ido Schimmel authored
Instead of checking for a condition and then issue the warning, just do it in one go and simplify the code. Signed-off-by:
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Ido Schimmel authored
When upper device of a VLAN device changes we already made sure it's a bridge device in PRECHANGEUPPER, so no need to check it's a master device in CHANGEUPPER. Signed-off-by:
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Ido Schimmel authored
When a port netdev is put under LAG it cannot have VLAN upper devices, so forbid that. The LAG device itself can have VLAN upper devices. Signed-off-by:
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Ido Schimmel authored
We currently only support the following upper devices for port netdevs: 1) Bridge 2) LAG (bond / team) 3) VLAN Any other device is forbidden, so return an error. Signed-off-by:
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Ido Schimmel authored
Instead of checking the error value and returning NOTIFY_BAD, just use notifier_from_errno() and simplify the code. Signed-off-by:
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David S. Miller authored
Yisen Zhuang says: ==================== net: hns: fix some bugs in hns driver This series includes some bugs fixed. All these patches needs to be applied after the patchset about ACPI support, so this series is floated to net-next list. The patches are: > from Daode, fixes about pfc pause frame, getting coaslesce, led control logic, TSO on|off and tcam table configuration. > from Jun He, fix the potential leak to port unavailable > from Kejian, fix bug of loopback and failing to test ping6 > from Qianqian, fix the several typo in hns driver For more details, please see individual patches. ==================== Signed-off-by: -
Daode Huang authored
When enable/disable tso, the driver tries to access the hardware register, but this operation will cause the port unavalible when there is traffic. This patch tries to enable TSO when initialize, then control tso through TSE bit in transmit descriptor. Signed-off-by:
Daode Huang <huangdaode@hisilicon.com> Signed-off-by:
Yisen Zhuang <Yisen.Zhuang@huawei.com> Signed-off-by:
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Daode Huang authored
The default coalesce timeout is 3us, which is will cause CPU usage is too high. This patch change it to 50us in order to reduce CPU usage and the value makes sure network latency also meets requirement. Signed-off-by:
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Daode Huang authored
The default sbm config parameter leaves little buffer when there is heavy traffic, which will cause packets drop. This patch changes them to make enough buffers for handling packets. Signed-off-by:
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Jun He authored
When hns_nic_poll_rx_skb alloc skb fail, it will break receive cycle and read new fbd_num to start new receive cycle. It recomputes cycle num is fbd_num minus clean_count, actually this cycle num is too big because it drop out receive cycle. It brings about the port unavailable. So we will goto out when alloc skb fail to fix this bug. Signed-off-by:
Jun He <hjat2005@huawei.com> Signed-off-by:
Ding Tianhong <dingtianhong@huawei.com> Signed-off-by:
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Daode Huang authored
The default driver sets anchor led bit to 0 when link down, actually, the anchor bit should be set to 1, so fixes it when link status is down. Secondly, change the return value of cpld_set_led_id to 0, which means leave the cpld to control led blink frequece other than the driver itself. Signed-off-by:
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Daode Huang authored
When network interface is enabled, the ring enable operation is conducted twice. This patch deletes the redundancy code of ring enable, and integrates hnae_ae_ops.toggle_queue_status other functions to hns_ae_start. Signed-off-by:
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Daode Huang authored
This patch adds get_coalesce_range api for hns, it shows range of coalesce usecs and frames that can be set on this interface. Signed-off-by:
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Daode Huang authored
The current driver stores the high bit value of tcam data register to the tcam data low element, stores the low bit value of tcam data register to tcam data high element, this patch fixes this bug. Signed-off-by:
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Daode Huang authored
This patch adds spin lock for tcam table operation, there maybe a race condition happens when more than one thread try to change the tcam talbe entries. Signed-off-by:
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Daode Huang authored
For SoC hip06, PFC pause handled in dsaf, while hip05 in XGMAC, so change the statistics of pfc pause in dsaf and remove the old pfc pause frame statistics. Signed-off-by:
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Qianqian Xie authored
For debug-ports,there are two non-synchronized processes: Speed-Auto-Negotiation and Link-Update-Status. The two processes are towed by two different state machines. Bond reads the speed when link up, but the speed maybe not update the right value at that time.That make for bond's wrong speed. Thus only one state machine should be used and if phy_state_machine is used, it does not need to do hns_nic_update_link_status(). Signed-off-by:
Qianqian Xie <xieqianqian@huawei.com> Signed-off-by:
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Kejian Yan authored
When run ethtool cmd(ethtool -t ethx) again and again for a long time, it will be probabilistically fail. The PHYs' registers may be on different pages, so it must be switch to the right page before setting PHYs' registers. And __lb_up() calls phy_start() to startup the PHYs device, but this function may change Copper Control Register(Page 0, Register 0) to an other value. It would cause phy loopback test fail. if we remove phy_start(), we have to remove the relative phy_stop(), phy_disconnect() when doing phy loopback to keep the phy stay in right status. Reported-by:
Kejian Yan <yankejian@huawei.com> Signed-off-by:
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Kejian Yan authored
As Hilink3 and Hilink4 use the same xge training and xge u adaptor for HNSv2, it needs to select which Hilink to be set before relative serdes being configed. The hilink_access_sel is the register to do that. Signed-off-by:
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Qianqian Xie authored
The error info should be printed as "set mask to 64bit fail!" instead of "set mask to 32bit fail!" in dma_set_mask_and_coherent(). Signed-off-by:
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Qianqian Xie authored
The driver uses devm_ioremap_resource, it will unmap the map automatically, remove the unnecessary the resource free. Signed-off-by:
Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by:
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Qianqian Xie authored
The annotation info for hns_nic_reset_subtask() should be "for resetting subtask" instead of "for resetting suntask". Signed-off-by:
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Kejian Yan authored
HNS receives a packet without doing anything, but it should call skb_reset_mac_header() to initialize the header before using eth_hdr(). Fixes: 0d6b425aSigned-off-by:
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Qianqian Xie authored
For service port, hns dsaf v1 support to close tx_pause. However, the port will be invalid when it run command ethtool to close tx_pause. This patch will fix it. Signed-off-by:
Qianqian Xie <xieqiaqian@huawei.com> Signed-off-by:
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Qianqian Xie authored
The bit fileds of PPE reset register are different between HNS v1 and HNS v2, but the current procedure just only match HNS v1. Here is a patch to fix it. Signed-off-by:
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David S. Miller authored
Vivien Didelot says: ==================== net: dsa: mv88e6xxx: probe compatible This patchset factorizes the legacy and new SMI probing and abstracts the switch register accesses. This simplifies adding support for new chips or alternative register accesses. This will allow us to use a compatible chip info to describe how to access the SMI device and its switch ID register at probe time. For the legacy probe, we fix the compatible info to 88E6085. For the MDIO probe, we will use the compatible info from the device node data. All patches are reviewed. Changes since v4: - fix debug printing (was 'val' instead of '*val') Changes since v3 [3]: - better register access abstraction using the chip structure Changes since v2 [2]: - do not guess compatible model in legacy probe - add low level SMI API using a chip structure - allocate before probe and detection - add 3 cosmetic patches Changes since v1 [1]: - merge style fix from Ben Dooks - add Acked-by/Reviewed-by tags - drop one compatible string per model - detect the SMI device based on the compatible info - add an SMI ops structure [1] https://lkml.org/lkml/2016/6/8/1201 [2] https://lkml.org/lkml/2016/6/14/671 [3] https://lkml.org/lkml/2016/6/17/995 ==================== Signed-off-by:
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Vivien Didelot authored
When the SMI address of the switch chip is zero, the chip assumes to be the only one on the SMI master bus and thus responds to all its known SMI devices addresses (port registers, Global2, etc.) When its SMI address is not zero, some chips (e.g. 88E6352) use an indirect access through two SMI Command and Data registers. Other models (e.g. 88E6060) using less than 16 internal SMI addresses always use a direct access. Add a capability flag to describe chips supporting the (indirect) Multi-chip Addressing Mode, and a low-level API to access the registers via SMI. Other accesses (like Ethernet management frames) may be added later. Signed-off-by:
Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Vivien Didelot authored
The switch ID is located at address 0x3 of every Port Registers bank. But not all Marvell switches have their Port Registers SMI Addresses starting at 0x10. 88E6060 starts at 0x8 and 88E6390 starts at 0x0. Add this data in the info structure and use it in the detection code. Signed-off-by:
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Vivien Didelot authored
After allocating the chip structure, pass it a compatible info pointer. The compatible info structure will be used later to describe how to access the switch registers and where to read the switch ID. For the standard MDIO probe, get it from the device node data. For the legacy DSA driver probing, pass it the 88E6085 info. Signed-off-by:
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Vivien Didelot authored
Extract the common detection code which assigns the info structure to the chip given the read switch ID. Signed-off-by:
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Vivien Didelot authored
Add an helper function to isolate SMI specific assignments and checks. This function will later help choosing the different SMI accesses based of the compatible info. Since the chip structure is already allocated in the legacy probe, use the mv88e6xxx_reg_read access routine instead of __mv88e6xxx_reg_read. Signed-off-by:
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Vivien Didelot authored
Add an helper function to allocate the chip structure at the beginning of the probe functions. It will be used to initialize the SMI access. Signed-off-by:
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Vivien Didelot authored
The chip smi_mutex mutex is used to protect the access to the internal switch registers, not only the Multi-chip Addressing Mode, as commented. Since we will isolate SMI-specific pieces of code, avoid the confusion now by renaming smi_mutex to reg_lock. No functional changes here. Signed-off-by:
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Vivien Didelot authored
The mv88e6xxx_table array and the mv88e6xxx_lookup_info function are static, so remove the table and size arguments from the lookup function. Signed-off-by:
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Vivien Didelot authored
Use the optional variant to get the reset GPIO line, instead of checking for the -ENOENT error. Signed-off-by:
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Vivien Didelot authored
The mixed assignments, allocations and registrations in the probe code make it hard to follow the logic and figure out what is DSA or chip specific. Extract the struct dsa_switch related code in a simple mv88e6xxx_register_switch helper function. For symmetry in the code, add a mv88e6xxx_unregister_switch function. Signed-off-by:
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Vivien Didelot authored
The MDIO device probe and remove functions are respectively incrementing and decrementing the bus refcount themselves. Since these bus level actions are out of the device scope, remove them. Signed-off-by:
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Vivien Didelot authored
In the MDIO probing function, dev is already assigned to &mdiodev->dev and np is already assigned to mdiodev->dev.of_node, so use them. Signed-off-by:
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