1. 26 Jan, 2015 5 commits
  2. 23 Jan, 2015 29 commits
  3. 21 Jan, 2015 1 commit
  4. 20 Jan, 2015 5 commits
    • Marcelo Tosatti's avatar
      KVM: x86: workaround SuSE's 2.6.16 pvclock vs masterclock issue · 54750f2c
      Marcelo Tosatti authored
      SuSE's 2.6.16 kernel fails to boot if the delta between tsc_timestamp
      and rdtsc is larger than a given threshold:
      
       * If we get more than the below threshold into the future, we rerequest
       * the real time from the host again which has only little offset then
       * that we need to adjust using the TSC.
       *
       * For now that threshold is 1/5th of a jiffie. That should be good
       * enough accuracy for completely broken systems, but also give us swing
       * to not call out to the host all the time.
       */
      #define PVCLOCK_DELTA_MAX ((1000000000ULL / HZ) / 5)
      
      Disable masterclock support (which increases said delta) in case the
      boot vcpu does not use MSR_KVM_SYSTEM_TIME_NEW.
      
      Upstreams kernels which support pvclock vsyscalls (and therefore make
      use of PVCLOCK_STABLE_BIT) use MSR_KVM_SYSTEM_TIME_NEW.
      Signed-off-by: default avatarMarcelo Tosatti <mtosatti@redhat.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      54750f2c
    • Fengguang Wu's avatar
      KVM: fix "Should it be static?" warnings from sparse · 69b0049a
      Fengguang Wu authored
      arch/x86/kvm/x86.c:495:5: sparse: symbol 'kvm_read_nested_guest_page' was not declared. Should it be static?
      arch/x86/kvm/x86.c:646:5: sparse: symbol '__kvm_set_xcr' was not declared. Should it be static?
      arch/x86/kvm/x86.c:1183:15: sparse: symbol 'max_tsc_khz' was not declared. Should it be static?
      arch/x86/kvm/x86.c:1237:6: sparse: symbol 'kvm_track_tsc_matching' was not declared. Should it be static?
      Signed-off-by: default avatarFengguang Wu <fengguang.wu@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      69b0049a
    • Andre Przywara's avatar
      arm/arm64: KVM: force alignment of VGIC dist/CPU/redist addresses · 4fa96afd
      Andre Przywara authored
      Although the GIC architecture requires us to map the MMIO regions
      only at page aligned addresses, we currently do not enforce this from
      the kernel side.
      Restrict any vGICv2 regions to be 4K aligned and any GICv3 regions
      to be 64K aligned. Document this requirement.
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      Signed-off-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
      4fa96afd
    • Andre Przywara's avatar
      arm/arm64: KVM: allow userland to request a virtual GICv3 · ac3d3735
      Andre Przywara authored
      With all of the GICv3 code in place now we allow userland to ask the
      kernel for using a virtual GICv3 in the guest.
      Also we provide the necessary support for guests setting the memory
      addresses for the virtual distributor and redistributors.
      This requires some userland code to make use of that feature and
      explicitly ask for a virtual GICv3.
      Document that KVM_CREATE_IRQCHIP only works for GICv2, but is
      considered legacy and using KVM_CREATE_DEVICE is preferred.
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      Signed-off-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
      ac3d3735
    • Andre Przywara's avatar
      arm/arm64: KVM: enable kernel side of GICv3 emulation · b5d84ff6
      Andre Przywara authored
      With all the necessary GICv3 emulation code in place, we can now
      connect the code to the GICv3 backend in the kernel.
      The LR register handling is different depending on the emulated GIC
      model, so provide different implementations for each.
      Also allow non-v2-compatible GICv3 implementations (which don't
      provide MMIO regions for the virtual CPU interface in the DT), but
      restrict those hosts to support GICv3 guests only.
      If the device tree provides a GICv2 compatible GICV resource entry,
      but that one is faulty, just disable the GICv2 emulation and let the
      user use at least the GICv3 emulation for guests.
      To provide proper support for the legacy KVM_CREATE_IRQCHIP ioctl,
      note virtual GICv2 compatibility in struct vgic_params and use it
      on creating a VGICv2.
      Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
      Signed-off-by: default avatarChristoffer Dall <christoffer.dall@linaro.org>
      b5d84ff6