1. 25 Apr, 2008 4 commits
    • Kenji Kaneshige's avatar
      pciehp: Add missing memory barrier · 2d32a9ae
      Kenji Kaneshige authored
      Fix the possible race condition between pcie_isr() and pciehp_write_cmd()
      because of the lack of memory barrier.
      Signed-off-by: default avatarKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: default avatarKristen Carlson Accardi <kristen.c.accardi@intel.com>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      2d32a9ae
    • Kenji Kaneshige's avatar
      pciehp: Fix interrupt event handlig · c6b069e9
      Kenji Kaneshige authored
      Current pciehp implementation disables and re-enables hotplug interrupts
      in its interrupt handler. This operation might be intend to guarantee
      that interrupts for the events newly occured during previous events are
      being handled will be successfully generated. But current implementaion
      has the following prolems.
      
        - Current interrupt service routin clears status changes without
          waiting command completion. Because of this, events might not be
          cleared properly.
        - Current interrupt service routine clears status changes caused by
          disabling or enabling hotplug interrupts itself. This will lose new
          events that occurs during previous interrupts are being handled.
        - Current implementation doesn't have any serialization mechanism
          between the code to wait for command completion and the interrupt
          handler that clears the command completion events caused by itself.
          There is clearly race conditions between them, and it may cause
          the problem that waiting for command completion doesn't work for
          example.
      
      To fix those problems, this patch stops disabling/re-enabling hotplug
      interrupts in interrupt service routine. Instead of this, this patch
      re-inspects Slot Status register after clearing what is presumed to
      be the last bending interrupt in order to guarantee that all interrupt
      events are serviced.
      Signed-off-by: default avatarKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: default avatarKristen Carlson Accardi <kristen.c.accardi@intel.com>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      c6b069e9
    • Kenji Kaneshige's avatar
      pciehp: fix slot name · 3800345f
      Kenji Kaneshige authored
      Current pciehp uses the combination of bus number and slot number as a
      slot name. But it is not a good idea because bus number is not a
      physical identifier but a logical identifier. This is against the PCIE
      specification. So remove the bus number from the physical identifier.
      
      However, there are some platforms with the problem that it provides
      the same slot number. For those platforms, this patch also introduces
      new module option 'pciehp_slot_with_bus'. If it is specified, pciehp
      uses the combination of bus number and slot number as a slot name.
      Signed-off-by: default avatarKenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
      Signed-off-by: default avatarKristen Carlson Accardi <kristen.c.accardi@intel.com>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      3800345f
    • Jesse Barnes's avatar
      Update MAINTAINERS with location of PCI tree · 460895c4
      Jesse Barnes authored
      The PCI tree is now in git at
      kernel.org:/pub/scm/linux/kernel/git/jbarnes/pci-2.6.git; add that info to
      MAINTAINERS.
      460895c4
  2. 24 Apr, 2008 1 commit
  3. 23 Apr, 2008 22 commits
  4. 22 Apr, 2008 13 commits