- 12 Sep, 2016 8 commits
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Amitesh Singh authored
Both gpio_export and gpio_free APIs are obsolete now. Signed-off-by: Amitesh Singh <singh.amitesh@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
pca953x_gpio_set_multiple() has some coding style issues that make it harder to read. Tweak the code a bit. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
The chip_type variable in struct pca953x_chip is no longer required. Remove it. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
Avoid the unnecessary if-else in pca953x_read_regs() by spltting the routine into smaller, specialized functions and calling the right one via a function pointer held in struct pca953x. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
Avoid the unnecessary if-else in pca953x_write_regs() by splitting the routine into smaller, specialized functions and calling the right one via a function pointer held in struct pca953x_chip. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bartosz Golaszewski authored
There are multiple places in the driver code where a switch (chip->chip_type) is used to determine the proper register offset. Unduplicate the code by adding a simple structure holding the possible offsets that differ between the pca953x and pca957x chip families and use it to avoid the checks. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Vladimir Zapolskiy authored
ARM LPC32xx platform is device-tree only, there is no need to keep a file with GPIO platform data structures, however some of macro definitions should be moved to the driver code, which is the only user of the removed header file. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Marc Zyngier authored
Using a default trigger is a bad idea if using DT to configure interrupts, as the device's interrupt specifier will always contain the trigger configuration. Let's warn about that particular situation, and revert to not having a default. Hopefully, the couple of drivers still using this feature will quickly be fixed. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 07 Sep, 2016 5 commits
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Simon Horman authored
R-Car Gen3's GPIO blocks are identical to Gen2's in every respect. Based on work for the r8a7795 (R-Car H3) by Ulrich Hecht. Cc: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Baruch Siach authored
The Orion GPIO controller binding description in mrvl-gpio.txt is obsolete, and duplicates the description in gpio-mvebu.txt. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Joel Stanley authored
The Aspeed SoCs contain GPIOs banked by letter, where each bank contains 8 pins. The GPIO banks are then grouped in sets of four in the register layout. The implementation exposes multiple banks through the one driver and requests and releases pins via the pinctrl subsystem. The hardware supports generation of interrupts from all GPIO-capable pins. A number of hardware features are not yet supported: Configuration of interrupt direction (ARM or LPC), debouncing, and WDT reset tolerance for output ports. Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Alistair Popple <alistair@popple.id.au> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andrew Jeffery authored
Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Acked-by: Joel Stanley <joel@jms.id.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Arnd Bergmann authored
The recent addition of the regulator support has led to the pca953x_remove function returning uninitialized data when no platform data pointer is provided, as gcc warns when using -Wmaybe-uninitialized: drivers/gpio/gpio-pca953x.c: In function 'pca953x_remove': drivers/gpio/gpio-pca953x.c:860:9: error: 'ret' may be used uninitialized in this function [-Werror=maybe-uninitialized] This restores the previous behavior, returning 0 on success. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Fixes: e23efa31 ("gpio: pca954x: Add vcc regulator and enable it") Acked-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 24 Aug, 2016 1 commit
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Andrew F. Davis authored
Add binding for TPIC2810 GPO device. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 23 Aug, 2016 4 commits
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Paul Gortmaker authored
The Kconfig currently controlling compilation of this code is: drivers/gpio/Kconfig:config GPIO_VF610 drivers/gpio/Kconfig: def_bool y ...meaning that it currently is not being built as a module by anyone. Lets remove the couple traces of modular infrastructure use, so that when reading the driver there is no doubt it is builtin-only. We delete the MODULE_LICENSE tag etc. since all that information is now contained at the top of the file in the comments. We don't replace module.h with init.h since the file already has that. Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Paul Gortmaker authored
The Kconfig currently controlling compilation of this code is: drivers/gpio/Kconfig:config GPIO_SPEAR_SPICS drivers/gpio/Kconfig: bool "ST SPEAr13xx SPI Chip Select as GPIO support" ...meaning that it currently is not being built as a module by anyone. Lets remove the couple traces of modular infrastructure use, so that when reading the driver there is no doubt it is builtin-only. We delete the MODULE_LICENSE tag etc. since all that information is now contained at the top of the file in the comments. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Shiraz Hashim <shiraz.linux.kernel@gmail.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Paul Gortmaker authored
The Kconfig currently controlling compilation of this code is: drivers/gpio/Kconfig:config GPIO_MXC drivers/gpio/Kconfig: def_bool y ...meaning that it currently is not being built as a module by anyone. Lets remove the couple traces of modular infrastructure use, so that when reading the driver there is no doubt it is builtin-only. We delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Note the original e-mail had a missing/typo'd @ symbol anyway. We don't replace module.h with init.h since the file already has that. Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Daniel Mack <daniel@caiaq.de> Cc: Juergen Beisert <kernel@pengutronix.de> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Paul Gortmaker authored
The Kconfig currently controlling compilation of this code is: drivers/gpio/Kconfig:config GPIO_MSIC drivers/gpio/Kconfig: bool "Intel MSIC mixed signal gpio support" ...meaning that it currently is not being built as a module by anyone. Lets remove the couple traces of modular infrastructure use, so that when reading the driver there is no doubt it is builtin-only. We delete the MODULE_LICENSE tag etc. since all that information is already contained at the top of the file in the comments. We don't replace module.h with init.h since the file already has that. Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Mathias Nyman <mathias.nyman@linux.intel.com> Cc: linux-gpio@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 19 Aug, 2016 5 commits
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Bin Gao authored
This patch adds .get_direction method for the gpio_chip structure of the wcove_gpio driver. Signed-off-by: Bin Gao <bin.gao@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lucile Quirion authored
This driver is generic and aims to support all Technologic Systems's boards embedding FPGA GPIOs with an I2C interface. This driver supports TS-4900, TS-7970, TS-7990 and TS-4100 series. Signed-off-by: Lucile Quirion <lucile.quirion@savoirfairelinux.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lucile Quirion authored
Device tree binding documentation for Technologic's I2C-FPGA GPIO controller. Signed-off-by: Lucile Quirion <lucile.quirion@savoirfairelinux.com> [Quirked in a reference to gpio.txt] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andrew F. Davis authored
This binding is no longer correct, the GPIO information can should be added to the parent node and not into this child node. See Documentation/devicetree/bindings/mfd/tps65086.txt for the correct usage. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Masahiro Yamada authored
The if...else... block after the loop can be dropped with a slight refactoring. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 11 Aug, 2016 7 commits
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Christian Lamparter authored
This patch adds support for the GPIO found in Broadcom's bcm63xx-gpio chips. This GPIO controller is used in the following Broadcom SoCs: BCM6338, BCM6345. It can be used in newer SoCs, without the capability of pin multiplexing. Signed-off-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Álvaro Fernández Rojas authored
This patch adds the device tree bindings for the Broadcom's BCM6345 memory-mapped GPIO controllers. The gpios will be supported by gpio-mmio code of the GPIO generic library. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfdLinus Walleij authored
Immutable branch between MFD and GPIO due for the v4.9 merge window
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William Breathitt Gray authored
The Diamond Systems GPIO-MM device features 48 lines of digital I/O via the emulation of dual 82C55A PPI chips. This driver provides GPIO support for these 48 channels of digital I/O. The base port addresses for the devices may be configured via the base array module parameter. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Bin Gao authored
This patch introduces a separate GPIO driver for Intel WhiskeyCove PMIC. This driver is based on gpio-crystalcove.c. Changes in v7: - Fixed various coding style comments from Andy Shevchenko Changes in v6: - Removed unnecessary wcove_gpio_remove() - Used devm_gpiochip_remove() instead of gpiochip_remove() - Various coding style changes per Mika's comment Changes in v5: - Revisited the interrupt handler code to iterate until all pending interrupts are handled. This change is to avoid missing interrupt when we're inside the interrupt handler. - Used regmap_bulk_read() to read address adjacent registers. Changes in v4: - Converted CTLI_INTCNT_XX macros to less verbose ones INT_DETECT_XX. - Add comments about why there is no .pm for the driver. - Header files re-ordered. - Various coding style change to address Andy's comments. Changes in v3: - Fixed the year in copyright line(2015-->2016). - Removed DRV_NAME macro. - Added kernel-doc for regmap_irq_chip of the wcove_gpio structure. - Line length fix. Changes in v2: - Typo fix (Whsikey --> Whiskey). - Included linux/gpio/driver.h instead of linux/gpio.h - Implemented .set_single_ended(). - Added GPIO register description. - Replaced container_of() with gpiochip_get_data(). - Removed unnecessary "if (gpio > WCOVE_VGPIO_NUM" check. - Removed the device id table and added MODULE_ALIAS(). Signed-off-by: Ajay Thomas <ajay.thomas.david.rajamanickam@intel.com> Signed-off-by: Bin Gao <bin.gao@intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Maxime Ripard authored
The AXP209 PMIC has a bunch of GPIOs accessible, that are usually used to control LEDs or backlight. Add a driver for them Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Phil Reid authored
Some i2c gpio devices are connected to a switchable power supply which needs to be enabled prior to probing the device. This patch allows the drive to enable the devices vcc regulator prior to probing. Signed-off-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 10 Aug, 2016 10 commits
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Patrice Chotard authored
The particularities of this variant are: - GPIO_XXX_LSB and GPIO_XXX_MSB memory locations are inverted compared to other variants. - There is no Edge detection, Rising Edge and Falling Edge registers. - IRQ flags are cleared when read, no need to write in Status register. Signed-off-by: Amelie DELAUNAY <amelie.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Patrice Chotard authored
STMPE1600 is a 16-bit port expander. Datasheet is available here : http://www2.st.com/content/st_com/en/products/interfaces-and-transceivers/ i-o-expanders-and-level-translators/i-o-expanders/stmpe1600.html Signed-off-by: Amelie DELAUNAY <amelie.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Patrice Chotard authored
This patch adds a new compatible string for stmpe mfd to support stmpe1600 variant. Signed-off-by: Amelie DELAUNAY <amelie.delaunay@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Patrice Chotard authored
This update allows to use registers map as following : regs[reg_index + offset] instead of regs[reg_index] + offset This makes code clearer and will facilitate the addition of STMPE1600 on which LSB and MSB registers are respectively located at addr and addr + 1. Despite for all others STMPE variant, LSB and MSB registers are respectively located in reverse order at addr + 1 and addr. For variant which have 3 registers's bank, we use LSB,CSB and MSB indexes which contains respectively LSB (or LOW), CSB (or MID) and MSB (or HIGH) register addresses (STMPE1801/STMPE24xx). For variant which have 2 registers's bank, we use LSB and CSB indexes only. In this case the CSB index contains the MSB regs address (STMPE 1601). Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Patrice Chotard authored
this update allows to use registers map as following : regs[reg_index + offset] instead of regs[reg_index] + offset This makes code clearer and will facilitate the addition of STMPE1600 on which LSB and MSB registers are respectively located at addr and addr + 1. Despite for all others STMPE variant, LSB and MSB registers are respectively located in reverse order at addr + 1 and addr. For variant which have 3 registers's bank, we use LSB,CSB and MSB indexes which contains respectively LSB (or LOW), CSB (or MID) and MSB (or HIGH) register addresses (STMPE1801/STMPE24xx). For variant which have 2 registers's bank, we use LSB and CSB indexes only. In this case the CSB index contains the MSB regs address (STMPE 1601). Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Patrice Chotard authored
In order to prepare the ground to STMPE1600, as STMPE1600's SYS_CTRL register has the same layout as STMPE801 variant, unify STMPExxx_REG_SYS_CTRL_RESET/INT_EN/INT_HI bit masks to more generic STMPE_SYS_CTRL_RESET/INT_EN/INT_HI Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Patrice Chotard authored
On STMPE801/1801 datasheets, it's mentionned writing in interrupt status register has no effect, bits are cleared when reading. Signed-off-by: Amelie DELAUNAY <amelie.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Patrice Chotard authored
By cross-checking STMPE 610/801/811/1601/2401/2403 datasheets, it appears that edge detection and rising/falling edge detection is not supported by all STMPE variant: GPIO GPIO Edge detection rising/falling edge detection 610 | X | X | 801 | | | 811 | X | X | 1600 | | | 1601 | X | X | 1801 | | X | 2401 | X | X | 2403 | X | X | Rework stmpe_dbg_show_one() and stmpe_gpio_irq to correctly take these cases into account. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Patrice Chotard authored
Reset was only implemented for STMPE1801 variant despite all variant have a SOFT_RESET bit. For STMPE2401/2403/801/1601/1801 SOFT_RESET bit is bit 7 of SYS_CTRL register. For STMPE610/811 (which have the same variant id) SOFT_RESET bit is bit 1 of SYS_CTRL register. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Patrice Chotard authored
As STMPE1801/1601/24xx has a SYS_CTRL register and STMPE1601/2403 has even a SYS_CTRL2 register, add STMPE_IDX_SYS_CTRL/2 and update driver code accordingly This update prepares the ground for not yet supported STMPE1600 which share similar REG_SYS_CTRL register. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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