- 22 Dec, 2015 27 commits
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Damien Riegel authored
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Haibo Chen authored
Add ADC support for imx7d-sdb board. Signed-off-by: Haibo Chen <haibo.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Haibo Chen authored
Add imx7d ADC support. Signed-off-by: Haibo Chen <haibo.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Stefan Agner authored
Add Colibri standard pinmux for FlexCAN controller instances. CAN is not a standard Colibri feature, but the datasheet predefines pins which provide CAN (compatible across some modules). Hence, add the pinmux on module level. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Alexandre Belloni authored
The backlight PWM is actually pwm4. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lucas Stach authored
No functional change, just moving the node to the place where it belongs according to its unit address. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Philipp Zabel authored
This allows for consistent numbering of the IPU output and input ports. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Lucas Stach authored
This has been moved to the reg property where it belongs for quite some time. The range has been unused by the kernel since then and with kernel 4.4 it's flagged as an unparsable range, as it does not comply to the PCI ranges DT binding. Fix this by removing the superfluous range. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Shengjiu Wang authored
Audio IP need the spba clock, but original clock name "dma" is not accurate, so change it to name "spba". The audio driver has been using the new name "spba", the binding document has been updated. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Meng Yi authored
Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com> Signed-off-by: Meng Yi <b56799@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Meng Yi authored
Signed-off-by: Alison Wang <b18965@freescale.com> Signed-off-by: Xiubo Li <lixiubo@cmss.chinamobile.com> Signed-off-by: Jianwei Wang <jianwei.wang.chn@gmail.com> Signed-off-by: Meng Yi <b56799@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Bai Ping authored
As on i.MX7D, we using a virtual arm clk for CPU frequency scaling, so correct the clocks info used by the cpufreq driver. Signed-off-by: Bai Ping <b51503@freescale.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
This addes support for SPI available on an off-board connector available on some models of the GW52xx. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
Ventana boards have an off-board connector with signals that can be pinmuxed as either GPIO or PWM. This patch adds pwm device-tree nodes in the disabled state which the bootloader can decide to enable based on bootloader config. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Afzal Mohammed authored
Minimal Cortex-M4 device tree to boot Linux to shell. M4 is booted via Cortex-A5 running Linux using Stefan Agner's <stefan@agner.ch> "m4boot" utility. Signed-off-by: Afzal Mohammed <afzal.mohd.ma@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Cory Tusar authored
Extend the existing Vybrid DSPI devicetree implementation to also describe the dspi2 and dspi3 functional blocks. Signed-off-by: Cory Tusar <cory.tusar@pid1solutions.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Marc Kleine-Budde authored
This, together with the corresponding patch to pwm-imx.c, allows to order the pwm devices correctly. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Markus Pargmann authored
imx6qdl.dtsi uses compatibles "fsl,imx6q-gpt", "fsl,imx31-gpt". imx6dl.dtsi uses compatibles "fsl,imx6dl-gpt", "fsl,imx6q-gpt" since commit 4e415ed8 (ARM: dts: imx6dl: add imx6dl gpt specific compatible string) If imx6dl would be compatible with imx6q-gpt it would also have to be compatible with imx31-gpt which is currently missing. Based on the above mentioned patch I assume imx6q-gpt and imx6dl-gpt are not compatible. So imx6q-gpt should be removed as compatible. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
Currently it is not possible to have HDMI and LVDS working simultaneously, because both ports try to use PLL5. Move the LVDS clock parent to PLL3_USB_OTG, so that HDMI and LVDS can be driven from independent sources. With this change the LDB pixel clock goes to 68.57 MHz, which is still within the valid range for the displays supported by the Ventana boards. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Tim Harvey authored
The GW54xx PMIC swbst regulator is used for LVDS power, CANbus xceiver and HDMI DDC and is enabled by the bootloader. Set the regulator to always-on so that Linux doesn't turn it off thinking its not needed. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Uwe Kleine-König authored
This patch adds some values that are needed for an out-of-tree device tree I'm currently working with. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Add support for ADC1. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Fabio Estevam authored
Specify the 'adck-max-frequency' property in the adc nodes. According to Documentation/devicetree/bindings/iio/adc/vf610-adc.txt this is a recommended property. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peter Chen authored
It can improve the USB performance when choosing larger burst size at some systems (bus size is larger), there is no side effect if this burst size is larger than bus size. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Peter Chen authored
After setting ahb burst configuration as 0, we can increase tx/rx burst size, it will improve the USB performance Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Shawn Guo authored
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- 15 Dec, 2015 2 commits
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Krzysztof Hałasa authored
Gateworks Ventana boards seem to need "RGMII-ID" (internal delay) PHY mode, instead of simple "RGMII", for their Marvell 88E1510 transceiver. Otherwise, the Ethernet MAC doesn't work with Marvell PHY driver (TX doesn't seem to work correctly). Tested on GW5400 rev. C. This bug affects ARM Fedora 23. Signed-off-by: Krzysztof Hałasa <khalasa@piap.pl> Acked-by: Tim Harvey <tharvey@gateworks.com> Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Bai Ping authored
The 'assigned-clock-parents' and 'assigned-clock-rates' list should corresponding to the 'assigned-clocks' property clock list. Signed-off-by: Bai Ping <b51503@freescale.com> Fixes: ed339363 ("ARM: dts: imx6qdl-sabreauto: Allow HDMI and LVDS to work simultaneously") Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 11 Dec, 2015 1 commit
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Stefan Agner authored
Linux on Vybrid used several different L2 latencies so far, none of them seem to be the right ones. According to the application note AN4947 ("Understanding Vybrid Architecture"), the tag portion runs on CPU clock and is inside the L2 cache controller, whereas the data portion is stored in the external SRAM running on platform clock. Hence it is likely that the correct value requires a higher data latency then tag latency. These are the values which have been used so far: - The mainline values: arm,data-latency = <1 1 1>; arm,tag-latency = <2 2 2>; Those values have lead to problems on higher clocks. They look like a poor translation from the reset values (missing +1 offset and a mix up between tag/latency values). - The Linux 3.0 (SoC vendor BSP) values (converted to DT notation): arm,data-latency = <4 2 3> arm,tag-latency = <4 2 3> The cache initialization function along with the value matches the i.MX6 code from the same kernel, so it seems that those values have just been copied. - The Colibri values: arm,data-latency = <2 1 2>; arm,tag-latency = <3 2 3>; Those were a mix between the values of the Linux 3.0 based BSP and the mainline values above. - The SoC Reset values (converted to DT notation): arm,data-latency = <3 3 3>; arm,tag-latency = <2 2 2>; So far there is no official statement on what the correct values are. See also the related Freescale community thread: https://community.freescale.com/message/579785#579785 For now, the reset values seem to be the best bet. Remove all other "bogus" values and use the reset value on vf610.dtsi level. Signed-off-by: Stefan Agner <stefan@agner.ch> Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 02 Dec, 2015 5 commits
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Patrick Brünn authored
To obtain exact pixel clocks, allow the DI clock selectors to influence the PLLs that they are derived from. Commit 4591b132 ("ARM: i.MX6: ipu_di_sel clocks can set parent rates") did this for i.MX6. Port it to enable high display resolutions on i.MX53 based platforms such as CX9020 Embedded PC, too. Signed-off-by: Patrick Brünn <p.bruenn@beckhoff.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Bai Ping authored
As we already have a 'imx_check_clocks' to do the clock error check, so cleanup the error check code. Signed-off-by: Bai Ping <b51503@freescale.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Bai Ping authored
Add a virtual arm clk to abstract the actual steps when changing the ARM core frequency.So we can using the 'cpufreq-dt' driver on i.MX7D/Solo. Signed-off-by: Bai Ping <b51503@freescale.com> Acked-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Stefan Agner authored
So far, only the bus clock has been assigned, but in reality the SAI IP has for clock inputs. The driver has been updated to make use of the additional clock inputs by c3ecef21 ("ASoC: fsl_sai: add sai master mode support"). Due to a bug in the clock tree, the audio clock has been enabled none the less by the specified bus clock (see "ARM: imx: clk-vf610: fix SAI clock tree"), which made master mode even without the proper clock assigned working. This patch completes the clock definition for SAI2. On Vybrid, only two MCLK out of the four options are available (the first being the bus clock itself). See chapter 8.10.1.2.3 of the Vybrid Reference manual ("SAI transmitter and receiver options for MCLK selection"). Note: The audio clocks are only required in master mode. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Stefan Agner authored
The Synchronous Audio Interface (SAI) instances are clocked by independent clocks: The bus clock and the audio clock (as shown in Figure 51-1 in the Vybrid Reference Manual). The clock gates in CCGR0/CCGR1 for SAI0 through SAI3 are bus clock gates, as access tests to the registers with/without gating those clocks have shown. The audio clock is gated by the SAIx_EN gates in CCM_CSCDR1, followed by a clock divider (SAIx_DIV). Currently, the parent of the bus clock gates has been assigned to SAIx_DIV, which is not involved in the bus clock path for the SAI instances (see chapter 9.10.12, SAI clocking in the Vybrid Reference Manual). Fix this by define the parent clock of VF610_CLK_SAIx to be the bus clock. If the driver needs the audio clock (when used in master mode), a fixed device tree is required which assign the audio clock properly to VF610_CLK_SAIx_DIV. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 25 Nov, 2015 3 commits
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Michael Trimarchi authored
OSC can be used as USB hub source clock. An example we can route to CLK2_P imx6 pin. This show a usage example: [...] usb_hub: usb-hub { compatible = "smsc,usb3503a"; clocks = <&clks IMX6QDL_CLK_LVDS2_GATE>; clock-names = "refclk"; }; }; [...] &clks { assigned-clocks = <&clks IMX6QDL_CLK_LVDS2_SEL>; assigned-clock-parents = <&clks IMX6QDL_CLK_OSC>; }; /sys/kernel/debug/clk/clk_summary osc 5 5 24000000 0 0 [...] lvds2_sel 1 1 24000000 0 0 lvds2_gate 1 1 24000000 0 0 [...] Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Bai Ping authored
Add 'is_prepared' callback function for pllv3 type clk to make sure when the system is bootup, the unused clk is in a known state to match the prepare count info. Signed-off-by: Bai Ping <b51503@freescale.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Markus Pargmann authored
The 'osc' clock is already initialized by the fixed clock defined in imx25.dtsi. The imx25 clock driver tries to add this clock for a second time and fails with -EEXIST: i.MX clk 1: register failed with -17 As the clock is already properly setup in DT with a different driver, we can completely remove the handling in the imx25 clock driver. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 24 Nov, 2015 1 commit
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Cory Tusar authored
Per the Vybrid Reference Manual (section 3.8.6.1), dspi0 has 6 chip select signals associated with it, while dspi1 has only 4. Signed-off-by: Cory Tusar <cory.tusar@pid1solutions.com> Acked-by: Stefan Agner <stefan@agner.ch> Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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- 23 Nov, 2015 1 commit
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Anson Huang authored
GPC irq domain is a child domain of GIC, now all of platform irqs are inside GPC domain, during the module populate, all devices irq should have correct type setting in GIC, however, there is no .irq_set_type callback setting in GPC, so the irq_set_type will be skipped and cause all irqs' type in /proc/interrupt are "edge" which mismatch with irq type setting in dtb file. Since GPC has no irq type setting, so just tell kernel to use irq_chip_set_type_parent. Signed-off-by: Anson Huang <Anson.Huang@freescale.com> Cc: <stable@vger.kernel.org> # 4.1+ Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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