Add HPB-DMAC platform device on R8A7778 SoC along with its slave and channel
configurations (only for SDHI0 so far).
Signed-off-by: Max Filippov <max.filippov@cogentembedded.com>
[Sergei: moved *enum* declaring HPB-DMAC slave IDs from now removed <mach/dma.h>
to <mach/r8a7778.h>, removed #include <mach/dma.h> from setup-r8a7778.c, removed
SSI-related *enum* values and SSI-related data from hpb_dmae_slaves[] and
hpb_dmae_channels[], moved the comments after the element initializers of
hpb_dmae_channels[].]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a DMAC platform device and clock definitions for it on r8a73a4.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Fourth Round of Renesas ARM based SoC fixes for v3.12

* Remove unused #gpio-ranges-cells DT property

* Remove usage of deprecated #gpio-range-cells DT property
  from GPIO R-Car

  Property was deprecated in v3.11-rc2

* Correct ether pinctl naming for armadillo800eva board

  Regression introduced in v3.10-rc5

* Add Micrel KSZ8041 PHY fixup to lager board

  This resolves a problem that has been present since 3.11-rc2

* Update SDHI DT compatibility string to the <unit>-<soc> format

  This makes compatibility strings consistent across all renesas
  hardware which currently supports DT.

  The bindings which are being updated where intorodiced on
  a per-SoC basis starting in v3.8-rc7. They may have
  been internally consistent when originally added.

Renesas ARM based SoC SMP updates for v3.13

* Add CPU notifier based SCU boot vector code
  - Use on emev2, r8a7779 and sh73a0 SoCs
  - Remove now unused shmobile_smp_scu_boot_secondary()
* Add shared APMU SMP support code
  - Use to add SMP support for r8a7790 SoC
* Introduce shmobile_boot_size
* Expose shmobile_invalidate_start()
* Introduce shmobile_smp_cpu_disable()
  - Use on sh73a0 SoC
  - Remove now unused shmobile_smp_init_cpus()

Add information to the shared APMU code regarding
the APMU instance used to control the CA7 cores.

This can be used on r8a7790 and r8a73a4, but should
most likely be converted to DT in the future.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Extend the APMU code with a check to only allow boot
of CPU cores that sit in the same cluster as CPU0.

This makes it possible for people to use the r8a790
CA7 boot mode with CA7-cores only. The default CA15
boot mode will enable CA15 cores only. This is an
intentional software limitation to cope with lacking
scheduler support.

By removing this patch it is possible to run all 8 cores
in parallel, but this is not recommended without out of tree
scheduler modfications or custom user space code to control
the CPU affinitiy.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Remove shmobile_smp_scu_boot_secondary() since
it is no longer used. CPU boot vector setup is
instead handled by CPU notifiers.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Now when CPU notifiers are used for SCU boot vector
setup shmobile_smp_scu_boot_secondary() is no longer
needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Now when CPU notifiers are used for SCU boot vector
setup shmobile_smp_scu_boot_secondary() is no longer
needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Now when CPU notifiers are used for SCU boot vector
setup shmobile_smp_scu_boot_secondary() is no longer
needed.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add CPU notifiers for the shared mach-shmobile SCU code
to allow removal of the shared SCU boot_secondary code.

Regarding notifiers, at CPU_UP_PREPARE time the SMP boot
vector is initialized so secondary CPU cores can boot.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add r8a7790 SMP support using the shared APMU code. To enable
SMP the r8a7790 specific DTS needs to be updated to include
CPU cores, and this is happening in a separate patch.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Introduce shared APMU SMP code for mach-shmobile. Both SMP boot up
and CPU Hotplug is supported. This version does not use DT but
if needed this will be added as an incremental feature patch.

The code is designed around CONFIG_NR_CPUS and should in theory support
any number of APMUs, however due to the current DT-less static design
only a single APMU is supported.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

USB phy initialisation function is needed from not only
USB Host but also USB Function too.
This patch adds usb phy common control function.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This patch adds USBHS clock for renesas_usbhs driver
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add r8a7791 CMT support via channel 0 of CMT0. At this
point the CMT is used for clock event operation, but in
the future the arch timer will be the main timer and the
CMT will be used for deep sleep wake up only.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit a7663b88280d00359715817620798e99d54d401c)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add SCIF serial port support to the r8a7791 SoC by
adding platform devices for SCIFA0 -> SCIFA5 as well
as SCIFB0 -> SCIFB2 and SCIF0 -> SCIF5 together with
clock bindings. DT device description is excluded at
this point since such bindings are still under
development.
Signed-off-by: Yoshikazu Fujikawa <yoshikazu.fujikawa.ue@renesas.com>
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
[damm@opensource.se: Forward ported to upstream, dropped holes in enum]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add initial support for the r8a7791 SoC including:
 - Single Cortex-A15 CPU Core
 - GIC

No static virtual mappings are used, all the components
make use of ioremap(). DT_MACHINE_START is still wrapped
in CONFIG_USE_OF to match other mach-shmobile code.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
[damm@opensource.se: Forward ported to upstream, dropped not-yet-ready code]
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This property is no longer required by the GPIO binding. Remove it.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Commit a1bc260b ("gpio: clean up
gpio-ranges documentation") deprecated the #gpio-range-cells property.
Replace its usage with a hardcoded value in the gpio-rcar driver.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

e5c9b4cd ("sh_eth: get R8A7740 support
out of #ifdef") exchanged sh-eth driver name to r8a7740-gether, but,
eva_pinctrl_map[] didn't follow it. Fixes it.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Currently on the Lager board NFS timeouts/delays are seen when booting.  That
turned out to happen because the SoC's ETH_LINK signal turns on and off after
each packet.  It is connected to Micrel KSZ8041 PHY's LED0 signal. Ether LEDs
on the Lager board are named LINK and ACTIVE which corresponds to non-default
01 setting of the PHY control register 1 bits 14-15. The 'sh_eth' driver resets
the PHY when opening the network device, so we have to set the mentioned bits
back to 01 from the default 00 value which causes bouncing of ETH_LINK.  That
can be achieved using the PHY platform fixup mechanism if we also modify the
driver to use it..
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Currently DT compatibility strings of both types can be found in the kernel
sources: <unit>-<soc> and <soc>-<unit>, whereas a unique format should be
followed and the former one is preferred. This patch converts the SDHI
MMC driver and its users to the common standard. This is safe for now, since
ATM no real products are using this driver with DT.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Chris Ball <cjb@laptop.org>
[Removed r8a7740.dtsi portion as it is not applicable]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Introduce shmobile_boot_size that can be used by
future SMP code to determine the size of the boot
code that needs to be copied to internal SRAM.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Expose shmobile_invalidate_start() in common.h for
mach-shmobile. This function will be used for boot of
secondary processors on future non-SCU SMP platforms.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Remove shmobile_smp_init_cpus() since all SMP platforms in
mach-shmobile now rely on DT for CPU core description instead
of for instance determining number of cores from the SCU.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Use shmobile_smp_cpu_disable() on sh73a0 since it
allows CPU Hotplug of any CPU.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Introduce the shared CPU Hotplug function shmobile_smp_cpu_disable()
for mach-shmobile. It is useful for the case when all CPUs may be
hotplugged, including CPU 0.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a platform clock for the r8a7778 SRU/SSI sound.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

The DU device will be called rcar-du-r8a7779. Rename the clock lookup
entry accordingly.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Platform data and resources for core devices are kmemdup()ed when the
corresponding devices are registered and can thus be declared as const.
Do so.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Rename r8a7790_init_delay() into r8a7790_init_early()
to make the function name show that more than just
delay setup may happen in the future.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Rename r8a73a4_init_delay() into r8a73a4_init_early()
to make the function name show that more than just
delay setup may happen in the future.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Pull timer code update from Thomas Gleixner:
 - armada SoC clocksource overhaul with a trivial merge conflict
 - Minor improvements to various SoC clocksource drivers

* 'timers/core' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource: armada-370-xp: Add detailed clock requirements in devicetree binding
  clocksource: armada-370-xp: Get reference fixed-clock by name
  clocksource: armada-370-xp: Replace WARN_ON with BUG_ON
  clocksource: armada-370-xp: Fix device-tree binding
  clocksource: armada-370-xp: Introduce new compatibles
  clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE
  clocksource: armada-370-xp: Simplify TIMER_CTRL register access
  clocksource: armada-370-xp: Use BIT()
  ARM: timer-sp: Set dynamic irq affinity
  ARM: nomadik: add dynamic irq flag to the timer
  clocksource: sh_cmt: 32-bit control register support
  clocksource: em_sti: Convert to devm_* managed helpers

Pull CIFS fixes from Steve French:
 "Two minor cifs fixes and a minor documentation cleanup for cifs.txt"

* 'for-next' of git://git.samba.org/sfrench/cifs-2.6:
  cifs: update cifs.txt and remove some outdated infos
  cifs: Avoid calling unlock_page() twice in cifs_readpage() when using fscache
  cifs: Do not take a reference to the page in cifs_readpage_worker()

Pull UBI fixes from Artem Bityutskiy:
 "Just a single fastmap fix plus a regression fix"

* tag 'upstream-3.12-rc1' of git://git.infradead.org/linux-ubi:
  UBI: Fix invalidate_fastmap()
  UBI: Fix PEB leak in wear_leveling_worker()

Pull ubifs fix from Artem Bityutskiy:
 "Just one patch which fixes the power-cut recovery testing mode.

  I'll start using a single UBI/UBIFS tree instead of 2 trees from now
  on.  So in the future you'll get 1 small pull request instead of 2
  tiny ones"

* tag 'upstream-3.12-rc1' of git://git.infradead.org/linux-ubifs:
  UBIFS: remove invalid warn msg with tst_recovery enabled

Pull MIPS fixes from Ralf Baechle:
 "These are four patches for three construction sites:

   - Fix register decoding for the combination of multi-core processors
     and multi-threading.

   - Two more fixes that are part of the ongoing DECstation resurrection
     work.  One of these touches a DECstation-only network driver.

   - Finally Markos' trivial build fix for the AP/SP support.

  (With this applied now all MIPS defconfigs are building again)"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: kernel: vpe: Make vpe_attrs an array of pointers.
  MIPS: Fix SMP core calculations when using MT support.
  MIPS: DECstation I/O ASIC DMA interrupt handling fix
  MIPS: DECstation HRT initialization rearrangement