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- 19 Feb, 2018 1 commit
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Evan Quan authored
other parameter Signed-off-by:
Evan Quan <evan.quan@amd.com> Acked-by:
Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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- 20 Dec, 2017 1 commit
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Rex Zhu authored
Move the smu_version to struct hwmgr, so it can be shared by other asics. Reviewed-by:
Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
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- 19 Dec, 2017 1 commit
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Rex Zhu authored
for sclk/mclk, can be adjusted through sysfs. for uvd/vce clk, will be adjusted case by case when requested. Reviewed-by:
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- 19 Oct, 2017 1 commit
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Rex Zhu authored
used for notify SMU the allocated buffer address. Reviewed-by:
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- 26 Sep, 2017 8 commits
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Rex Zhu authored
the macro is not relevant to SMU, so rename SMU_WAIT_FIELD_UNEQUAL to PHM_WAIT_FIELD_UNEQUAL and move to hwmgr.h Reviewed-by:
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Rex Zhu authored
the macro is not relevant to SMU, so move to hwmgr.h and rename to PHM_WAIT_VFPF_INDIRECT_FIELD Reviewed-by:
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Rex Zhu authored
the macro is not relevant to SMU, so move to hwmgr.h and rename to PHM_WAIT_VFPF_INDIRECT_FIELD_UNEQUAL Reviewed-by:
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Rex Zhu authored
the macro is not relevent to SMU, so move to hwmgr.h and rename to PHM_WAIT_INDIRECT_FIELD_UNEQUAL Reviewed-by:
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Rex Zhu authored
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Rex Zhu authored
delete struct smumgr, put smu backend function table in struct hwmgr Reviewed-by:
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Rex Zhu authored
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Eric Huang authored
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Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by:
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- 19 Sep, 2017 3 commits
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Rex Zhu authored
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Rex Zhu authored
delete functiontable related codes Reviewed-by:
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Rex Zhu authored
add function point start_thermal_controller in hwmgr, delete thermal function table and related functions Reviewed-by:
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- 12 Sep, 2017 2 commits
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Rex Zhu authored
This feature is for UMD to run benchmark in a power state that is as steady as possible. kmd need to fix the power state as stable as possible. now, kmd support four level: profile_standard,peak,min_sclk,min_mclk move common related code to amd_powerplay.c Reviewed-by:
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Rex Zhu authored
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- 29 Aug, 2017 1 commit
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Rex Zhu authored
when User turn off display or screen idle timeout, smu need this message to start S0i2 entry. Signed-off-by:
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- 15 Aug, 2017 1 commit
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Junwei Zhang authored
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Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by:
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- 25 May, 2017 1 commit
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Hawking Zhang authored
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Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by:
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- 24 May, 2017 4 commits
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Rex Zhu authored
Add the new clock type to the gfx arbitor so we can determine the proper clock floors for it. Signed-off-by:
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Rex Zhu authored
hwmgr handles the GPU power state management. v2: squash in updates (Alex) Signed-off-by:
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Rex Zhu authored
defines clock dependencies for raven. Signed-off-by:
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Rex Zhu authored
Handle the latest powerplay table format; includes Boost State support. Signed-off-by:
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- 10 May, 2017 1 commit
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Rex Zhu authored
Use the new enums for setting and getting the fan control mode. Fixes problems due to previous inconsistencies between enums. Signed-off-by:
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- 05 May, 2017 1 commit
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Rex Zhu authored
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- 28 Apr, 2017 1 commit
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Rex Zhu authored
export disablesmcctf to eventmgr. need to disable temperature alert when s3/s4. otherwise, when resume back,enable temperature alert will fail. Signed-off-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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- 30 Mar, 2017 7 commits
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Eric Huang authored
Adds power management support for vega10. v2: squash in fan control and led config fixes from Rex v3: squash in dead code removal and socvid fixes from Rex v4: squash in dpm force level fix from Rex v5: squash in latest headless, gpu load fixes from Rex Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Eric Huang authored
New interfaces needed to handle the new clock trees and bandwidth requirements on vega10. Acked-by:
Tony Cheng <tony.cheng@amd.com> Acked-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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Eric Huang authored
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Ken Wang <Qingqing.Wang@amd.com> Reviewed-by:
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Eric Huang authored
Disable avfs to make voltage change take effect. Signed-off-by:
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Tom St Denis authored
This update allows sensors to return more than 1 value and indicates to the caller how many bytes are written. The debugfs interface has been updated to handle reading all of the values. Simply seek to the enum value (multiplied by 4) and then read as many bytes as the sensor provides. (v2): Don't set size to 4 before reading GPU_POWER (v3): agd: rebase Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
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Eric Huang authored
As well as fix print format for uint32_t type. Signed-off-by:
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Eric Huang authored
Add the sysfs entries pp_gfx_power_profile and pp_compute_power_profile which give user a way to set power profile through parameters minimum sclk, minimum mclk, activity threshold, up hysteresis and down hysteresis only when the entry power_dpm_force_performance_level is in default value "auto". It is read and write. Example: echo 500 800 20 0 5 > /sys/class/drm/card0/device/pp_*_power_profile cat /sys/class/drm/card0/device/pp_*_power_profile 500 800 20 0 5 Note: first parameter is sclk in MHz, second is mclk in MHz, third is activity threshold in percentage, fourth is up hysteresis in ms and fifth is down hysteresis in ms. echo set > /sys/class/drm/card0/device/pp_*_power_profile To set power profile state if it exists. echo reset > /sys/class/drm/card0/device/pp_*_power_profile To restore default state and clear previous setting. Signed-off-by:
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- 27 Jan, 2017 6 commits
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Rex Zhu authored
in profiling mode, powerplay will fix power state as stable as possible.and disable gfx cg and LBPW feature. profile_standard: as a prerequisite, ensure power and thermal sustainable, set clocks ratio as close to the highest clock ratio as possible. profile_min_sclk: fix mclk as profile_normal, set lowest sclk profile_min_mclk: fix sclk as profile_normal, set lowest mclk profile_peak: set highest sclk and mclk, power and thermal not sustainable profile_exit: exit profile mode. enable gfx cg/lbpw feature. Signed-off-by:
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Rex Zhu authored
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Rex Zhu authored
add pp_smu7_thermal_fini function to free related data when smu7_hwmgr_fini. Signed-off-by:
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Rex Zhu authored
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Rex Zhu authored
v2: add pp_check function to check pp_instance valid. 1. powerplay export two new interface to amdgpu, amd_powerplay_create/amd_powerplay_destroy. 2. create pp_instance/smumgr/hwmgr/eventmgr in early init, destroy them when lata_fini. 3. in sw_init, create and init asic private smumgr data, and free them when sw_fini. 4. in hw_init, create and init asic private hwmgr data, and free them when hw_fini. 5. export powerplay state: PP_DPM_DISABLED. when user disabled powerplay or hwmgr/eventmgr init failed, powerplay return this state to amdgpu. Signed-off-by:
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Huang Rui authored
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