- 15 Jul, 2014 2 commits
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Keerthy authored
Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck from dpll_pcie_ref_ck. Figure 26-22. DPLL_PCIE_REF Functional Block Diagram in vE of DRA7xx ES1.0 TRM shows the signal name for the output of post divider (M2) is CLKOUTLDO. Figure 26-21. PCIe PHY Clock Generator Overview shows CLKOUTLDO is used as input to apll mux. So the actual output of dpll is dpll_pcie_ref_m2ldo_ck which is also the input of apll. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Keerthy authored
Add divider table to optfclk_pciephy_div clock. The 8th bit of CM_CLKMODE_APLL_PCIE can be programmed to either 0x0 or 0x1 based on if the divider value is 0x2 or 0x1. Figure 26-21. PCIe PHY Clock Generator Overview in vE of DRA7xx ES1.0 shows the block diagram of Clock Generator Subsystem of PCIe PHY module. The divider value if '1' should be programmed in order to get the correct PCIE_PHY_DIV_GCLK frequency (2.5GHz). Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 09 Jul, 2014 10 commits
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Tony Lindgren authored
Merge branch 'for-v3.17/omap2-use-dt-clks' of http://github.com/t-kristo/linux-pm into omap-for-v3.17/dt
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Roger Quadros authored
The ldousb_reg regulator provides power to the USB1 and USB2 High Speed PHYs. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Keerthy authored
Enable TPS65218 config options. Signed-off-by: Keerthy <j-keerthy@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Keerthy authored
Add TPS65218 device tree nodes. i2c clock frequency setting also added as part of tps65218 nodes addition. As i2c clock enabling is required. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Keerthy authored
Fix i2c nodes indentation. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Keerthy authored
Add TPS65218 device tree nodes. i2c clock frequency setting also added as part of tps65218 nodes addition. As i2c clock enabling is required. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Ash Charles authored
This adds the Gumstix Pepper[1] single-board computer based on the TI AM335x processor. Schematics are available [2]. [1] https://store.gumstix.com/index.php/products/344/ [2] https://pubs.gumstix.com/boards/PEPPER/Signed-off-by: Ash Charles <ashcharles@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
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R Sricharan authored
There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The Peripheral irq requests are connected to only one crossbar input and the output of the crossbar is connected to only one controller's input line. The crossbar device is used to map a peripheral input to a free mpu's interrupt controller line. Here, adding a new crossbar device node and replacing all the peripheral interrupt numbers with its fixed crossbar input lines. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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R Sricharan authored
There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The gic provides the support for such IPs in the form of routable-irqs. So adding the property here to gic node. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 02 Jul, 2014 6 commits
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Tero Kristo authored
This is no longer needed as clock data is provided through DT. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
Otherwise legacy boot clock data is used. This patch also includes the clock data files to the base dtsi files. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
This patch adds support for initializing also omap2-prcm and omap2-scrm through DT. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Tero Kristo authored
Cleans up the code a bit and is useful for clock data DT conversion. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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Darren Etheridge authored
Add the necessary nodes to enable the LCD controller and the LCD panel that is attached to the Texas Instruments AM335x EVMSK platform. Also setup the necessary pin mux within the DT file to drive the LCD connector and add the correct pinmux settings for the lcd pins to be configured to when the SoC goes into sleep state for the minimum power consumption. For the sleep mode LCD pin settings, MUX_MODE7 is chosen as this corresponds to switching the pins into input GPIO's with an internal pulldown. Which has been determined to offer the lowest power solution vs leaving the pins configured in LCD mode. Signed-off-by: Darren Etheridge <detheridge@ti.com> Acked-by: Wolfram Sang <wsa@sang-engineering.com> Tested-by: Felipe Balbi <balbi@ti.com> Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tero Kristo authored
osc_ck can be simply defined as a multiplexer clock, and the sys_ck can be a simple divider. Signed-off-by: Tero Kristo <t-kristo@ti.com>
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- 01 Jul, 2014 2 commits
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Felipe Balbi authored
Add support for TI's AM437x StarterKit Evaluation Module. Cc: Josh Elliot <jelliott@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Tested-by: Franklin Cooper Jr. <fcooper@ti.com> Tested-by: Tom Rini <trini@ti.com> Tested-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Felipe Balbi authored
By providing labels for rtc, wdt, cpu and dispc nodes, boards can access them to add board-specific data. Signed-off-by: Felipe Balbi <balbi@ti.com> Tested-by: Franklin Cooper Jr. <fcooper@ti.com> Tested-by: Tom Rini <trini@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 30 Jun, 2014 16 commits
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Nishanth Menon authored
On certain platforms such as DRA7, SPIs 0, 1, 2, 3, 5, 6, 10, 131, 132, 133 are direct wired to hardware blocks bypassing crossbar. This quirky implementation is *NOT* supposed to be the expectation of crossbar hardware usage. However, these are already marked in our description of the hardware with SKIP and RESERVED where appropriate. Unfortunately, we need to be able to refer to these hardwired IRQs. So, to request these, crossbar driver can use the existing information from it's table that these SKIP/RESERVED maps are direct wired sources and generic allocation/programming of crossbar should be avoided. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-17-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
The current crossbar description does not include the description required for the consumer of the crossbar, a.k.a devices whoes events pass through the crossbar into the GIC interrupt controller. So, provide documentation for the same. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-16-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
This is a basic check to ensure that crossbar register needs to be written. This ensures that we have a common check which is used in both map and unmap logic. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-15-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
Currently we attempt to map any crossbar value to an IRQ, however, this is not correct from hardware perspective. There is a max crossbar event number upto which hardware supports. So describe the same in device tree using 'ti,max-crossbar-sources' property and use it to validate requests. [ jac - remove MAX_SOURCES from binding doc, use integer because we shouldn't put implementation details in the binding docs ] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-14-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sricharan R authored
Adding kerneldoc for unmap callback function. Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-13-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sricharan R authored
If crossbar_of_init returns with a error, then set the cb pointer to null. Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-12-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
Using err1,2,3,4 etc makes it hard to ensure a new exit path in the middle will not result in spurious changes, so rename the error paths as per the function it does. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-11-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
crossbar_of_init always returns -ENOMEM in case of errors. There can be other causes of failure like invalid data from DT. So return a appropriate error value for that case. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-10-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
Adding missing properties for kerneldoc (@write) and cleanup of harmless warnings while we are here. kerneldoc warnings: Warning(drivers/irqchip/irq-crossbar.c:27): missing initial short description on line: * struct crossbar_device: crossbar device description Info(drivers/irqchip/irq-crossbar.c:27): Scanning doc for struct Warning(drivers/irqchip/irq-crossbar.c:39): No description found for parameter 'write' 2 warnings Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-9-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
There is absolutely no need for crossbar driver to expose functions and variables into global namespace. So make them all static Also fix a couple of checkpatch warnings. Fixes sparse warnings: drivers/irqchip/irq-crossbar.c:129:29: warning: symbol 'routable_irq_domain_ops' was not declared. Should it be static? drivers/irqchip/irq-crossbar.c:261:12: warning: symbol 'irqcrossbar_init' was not declared. Should it be static? Checkpatch warnings: WARNING: Prefer kcalloc over kzalloc with multiply + cb->irq_map = kzalloc(max * sizeof(int), GFP_KERNEL); WARNING: Prefer kcalloc over kzalloc with multiply + cb->register_offsets = kzalloc(max * sizeof(int), GFP_KERNEL); Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-8-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
IS_ERR_VALUE makes sense only *if* there could be valid values in negative error range. But in the cases that we do use it, there is no such case. Just remove the same. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-7-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
Reverse the search algorithm to ensure that address mapping and IRQ allocation logics are proper. This makes the below bugs visible sooner. class 1. address space errors -> example: reg = <a size_b> ti,max-irqs = is a wrong parameter class 2: irq-reserved list - which decides which entries in the address space is not actually wired in class 3: wrong list of routable-irqs. In general allocating from max to min tends to have benefits in ensuring the different issues that may be present in dts is easily caught at definition time, rather than at a later point in time. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-6-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
Since crossbar is s/w configurable, the initial settings of the crossbar cannot be assumed to be sane. This implies that: a) On initialization all un-reserved crossbars must be initialized to a known 'safe' value. b) When unmapping the interrupt, the safe value must be written to ensure that the crossbar mapping matches with interrupt controller usage. So provide a safe value in the dt data to map if '0' is not safe for the platform and use it during init and unmap While at this, fix the below checkpatch warning. Fixes checkpatch warning: WARNING: Unnecessary space before function pointer arguments #37: FILE: drivers/irqchip/irq-crossbar.c:37: + void (*write) (int, int); Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-5-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
When, in the system due to varied reasons, interrupts might be unusable due to hardware behavior, but register maps do exist, then those interrupts should be skipped while mapping irq to crossbars. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-4-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
If irq_of_parse_and_map is executed twice, the same crossbar is mapped to two different GIC interrupts. This is completely undesirable. Instead, check if the requested crossbar event is pre-allocated and provide that GIC mapping back to caller if already allocated. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-3-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Nishanth Menon authored
Today '0' is actually reserved, but may not be the same in the future. So, use a flag to mark the GIC interrupts that are reserved. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Link: https://lkml.kernel.org/r/1403766634-18543-2-git-send-email-r.sricharan@ti.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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- 16 Jun, 2014 4 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds authored
Pull networking fixes from David Miller: 1) Fix checksumming regressions, from Tom Herbert. 2) Undo unintentional permissions changes for SCTP rto_alpha and rto_beta sysfs knobs, from Denial Borkmann. 3) VXLAN, like other IP tunnels, should advertize it's encapsulation size using dev->needed_headroom instead of dev->hard_header_len. From Cong Wang. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: net: sctp: fix permissions for rto_alpha and rto_beta knobs vxlan: Checksum fixes net: add skb_pop_rcv_encapsulation udp: call __skb_checksum_complete when doing full checksum net: Fix save software checksum complete net: Fix GSO constants to match NETIF flags udp: ipv4: do not waste time in __udp4_lib_mcast_demux_lookup vxlan: use dev->needed_headroom instead of dev->hard_header_len MAINTAINERS: update cxgb4 maintainer
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git://git.linaro.org/people/mike.turquette/linuxLinus Torvalds authored
Pull more clock framework updates from Mike Turquette: "This contains the second half the of the clk changes for 3.16. They are simply fixes and code refactoring for the OMAP clock drivers. The sunxi clock driver changes include splitting out the one mega-driver into several smaller pieces and adding support for the A31 SoC clocks" * tag 'clk-for-linus-3.16-part2' of git://git.linaro.org/people/mike.turquette/linux: (25 commits) clk: sunxi: document PRCM clock compatible strings clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support clk: sun6i: Protect SDRAM gating bit clk: sun6i: Protect CPU clock clk: sunxi: Rework clock protection code clk: sunxi: Move the GMAC clock to a file of its own clk: sunxi: Move the 24M oscillator to a file of its own clk: sunxi: Remove calls to clk_put clk: sunxi: document new A31 USB clock compatible clk: sunxi: Implement A31 USB clock ARM: dts: OMAP5/DRA7: use omap5-mpu-dpll-clock capable of dealing with higher frequencies CLK: TI: dpll: support OMAP5 MPU DPLL that need special handling for higher frequencies ARM: OMAP5+: dpll: support Duty Cycle Correction(DCC) CLK: TI: clk-54xx: Set the rate for dpll_abe_m2x2_ck CLK: TI: Driver for DRA7 ATL (Audio Tracking Logic) dt:/bindings: DRA7 ATL (Audio Tracking Logic) clock bindings ARM: dts: dra7xx-clocks: Correct name for atl clkin3 clock CLK: TI: gate: add composite interface clock to OMAP2 only build ARM: OMAP2: clock: add DT boot support for cpufreq_ck CLK: TI: OMAP2: add clock init support ...
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git://git.infradead.org/users/willy/linux-nvmeLinus Torvalds authored
Pull NVMe update from Matthew Wilcox: "Mostly bugfixes again for the NVMe driver. I'd like to call out the exported tracepoint in the block layer; I believe Keith has cleared this with Jens. We've had a few reports from people who're really pounding on NVMe devices at scale, hence the timeout changes (and new module parameters), hotplug cpu deadlock, tracepoints, and minor performance tweaks" [ Jens hadn't seen that tracepoint thing, but is ok with it - it will end up going away when mq conversion happens ] * git://git.infradead.org/users/willy/linux-nvme: (22 commits) NVMe: Fix START_STOP_UNIT Scsi->NVMe translation. NVMe: Use Log Page constants in SCSI emulation NVMe: Define Log Page constants NVMe: Fix hot cpu notification dead lock NVMe: Rename io_timeout to nvme_io_timeout NVMe: Use last bytes of f/w rev SCSI Inquiry NVMe: Adhere to request queue block accounting enable/disable NVMe: Fix nvme get/put queue semantics NVMe: Delete NVME_GET_FEAT_TEMP_THRESH NVMe: Make admin timeout a module parameter NVMe: Make iod bio timeout a parameter NVMe: Prevent possible NULL pointer dereference NVMe: Fix the buffer size passed in GetLogPage(CDW10.NUMD) NVMe: Update data structures for NVMe 1.2 NVMe: Enable BUILD_BUG_ON checks NVMe: Update namespace and controller identify structures to the 1.1a spec NVMe: Flush with data support NVMe: Configure support for block flush NVMe: Add tracepoints NVMe: Protect against badly formatted CQEs ...
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