- 24 Nov, 2014 40 commits
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Aaro Koskinen authored
We should not need to read fuses during normal operation, also the current code has issues with that (not safe for concurrent access). Since there are no in-kernel users for these, just delete them. Drivers should not need such OCTEON_HAS_FEATURE mechanism in any case, instead the information should be passed via device tree. Signed-off-by:
Aaro Koskinen <aaro.koskinen@nsn.com> Cc: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7665/Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Aaro Koskinen authored
Move cvmx_fuse_read_byte() into a .c file. Signed-off-by:
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Aaro Koskinen authored
Continue the backtrace if we cannot find SP adjustment and RA save. In that case, just assume the current RA. This allows us to get samples of frequent callers of e.g. GLIBC memset(). Signed-off-by:
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Aaro Koskinen authored
Allow unsupported CPU types to use backtrace with timer-based profiling. Some CPUs (notably OCTEON) lack architecture-specific oprofile driver. In such case oprofile can fallback to timer-based mode, and arch code can still provide the backtrace functionality. So just set up the backtrace hook always. Signed-off-by:
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Markos Chandras authored
They can be useful to determine how the MMU is configured on a MC exception. Signed-off-by:
Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8401/Signed-off-by:
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Markos Chandras authored
The HTW registers can be useful to debug a MC exception. Signed-off-by:
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Markos Chandras authored
printk should not be used without a KERN_ facility level Signed-off-by:
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Andrew Bresticker authored
Parse the GIC timer frequency and interrupt from the device-tree. Signed-off-by:
Andrew Bresticker <abrestic@chromium.org> Acked-by:
Arnd Bergmann <arnd@arndb.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8421/Signed-off-by:
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Andrew Bresticker authored
Add device-tree support for the MIPS GIC. Update the GIC irqdomain's xlate() callback to handle the three-cell specifier described in the MIPS GIC binding document. Signed-off-by:
Jason Cooper <jason@lakedaemon.net> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: John Crispin <blogic@openwrt.org> Cc: David Daney <ddaney.cavm@gmail.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8422/Signed-off-by:
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Andrew Bresticker authored
The Global Interrupt Controller (GIC) present on certain MIPS systems can be used to route external interrupts to individual VPEs and CPU interrupt vectors. It also supports a timer and software-generated interrupts. Signed-off-by:
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Alban Bedel authored
Allow loading an initrd passed by the firmware. Signed-off-by:
Alban Bedel <albeu@free.fr> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8354/Signed-off-by:
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Alban Bedel authored
No need to duplicate code that is available in the firmware library. It also give us access to the firmware environment which is needed to read the initrd address and size. Signed-off-by:
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Sergey Ryazanov authored
Atheros AR5312 and AR2315 both have a builtin wireless device, this patch add helper code and register platform device for all supported WiSoCs. Signed-off-by:
Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/8249/Signed-off-by:
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Sergey Ryazanov authored
- Use config symbol defined in the driver instead of arch specific one for conditional compilation. - Rename the ATHEROS_AR231X config symbol to ATH25. - Fix include (ar231x_platform.h -> ath25_platform.h). - Some of AR231x SoCs (e.g. AR2315) have PCI bus support, so remove !PCI dependency, which block AHB support build. Signed-off-by:
John W. Linville <linville@tuxdriver.com> Cc: Jiri Slaby <jirislaby@gmail.com> Cc: Nick Kossifidis <mickflemm@gmail.com> Cc: "Luis R. Rodriguez" <mcgrof@do-not-panic.com> Cc: linux-wireless@vger.kernel.org Cc: ath5k-devel@lists.ath5k.org Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/8248/Signed-off-by:
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Sergey Ryazanov authored
This reverts commit 093ec3c5. AHB bus code has been removed, since we did not have support Atheros AR231x SoC, required for building the AHB version of ath5k. Now that support WiSoC chips added we can restore functionality back. Signed-off-by:
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Sergey Ryazanov authored
Add PCI host controller driver and DMA address calculation hook. Signed-off-by:
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Sergey Ryazanov authored
AR5312 SoC flash controller maps the flash content to memory and translates the memory access operations to the flash access operations. Such controller is fully supported by the physmap-flash driver. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>R5312 SoC flash Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/8245/Signed-off-by:
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Sergey Ryazanov authored
Detect SoC type based on device ID and board configuration data. Signed-off-by:
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Sergey Ryazanov authored
All boards based on AR5312/AR2315 SoC have a special structure located at the end of flash. This structure contains board-specific data such as Ethernet and Wireless MAC addresses. The flash is mapped to the memmory at predefined location. Signed-off-by:
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Sergey Ryazanov authored
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Sergey Ryazanov authored
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Sergey Ryazanov authored
Add interrupts initialization and handling routines, also add AHB bus error interrupt handlers for both SoCs families. Signed-off-by:
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Sergey Ryazanov authored
Add basic support for Atheros AR2315+ SoCs: registers definition file and initial setup code. Signed-off-by:
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Sergey Ryazanov authored
Add basic support for Atheros AR5312/AR2312 SoCs: registers definition file and initial setup code. Signed-off-by:
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Sergey Ryazanov authored
Add common code for Atheros AR5312 and Atheros AR2315 SoCs families. Signed-off-by:
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Alban Bedel authored
Fix some value corruptions with values that can't be represented in a signed long. Signed-off-by:
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Alban Bedel authored
When reading u-boot's key=value pairs it should skip the '=' and not use the next argument. Signed-off-by:
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Maciej W. Rozycki authored
Rewrite TURBOchannel error handling to use a common failure path, making sure put_device is called for devices that failed initialization. While at it update printk calls to use pr_err rather than KERN_ERR. Signed-off-by:
Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6701/Signed-off-by:
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John Crispin authored
Signed-off-by:
John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/8034/Signed-off-by:
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John Crispin authored
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John Crispin authored
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John Crispin authored
This is the small version of MT7620a. Signed-off-by:
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John Crispin authored
Add support for the new MT7621/8 SoC and kill ifdefs. Cleanup some whitespace error while we are at it. Signed-off-by:
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John Crispin authored
Before we had a pinctrl driver we used a custom OF api. This patch converts the soc specific pinmux data to a new set of structs. We also add some new pinmux setings. Signed-off-by:
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John Crispin authored
This is a regression caused by: commit afb46f79 Author: Rob Herring <robh@kernel.org> Date: Wed Apr 2 19:07:24 2014 -0500 mips: ralink: convert to use unflatten_and_copy_device_tree Make the of init code reuse the cmdline defined inside the dts. Signed-off-by:
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John Crispin authored
This patch adds a trivial driver that allows userland to extract the bootrom of a SoC via debugfs. Signed-off-by:
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John Crispin authored
Register the wireless mac clock on rti3883. This is required by the wifi driver. Signed-off-by:
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John Crispin authored
Register the wireleass mac clock on rt2880. This is required by the wifi driver. Signed-off-by:
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John Crispin authored
This function was missing causing make allmod to fail. Signed-off-by:
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John Crispin authored
RT5350 relies on the bootloader setting up the memc correctly. On some boards the setup is incorrect leading to 32 MB being available but only 16 MB being recognized. Allow these boards to manually override the memory range. Signed-off-by:
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