1. 04 Aug, 2015 2 commits
    • Jon Hunter's avatar
      irqchip/gic: Ensure gic_cpu_if_up/down() programs correct GIC instance · 4c2880b3
      Jon Hunter authored
      Commit 32289506 ("irqchip: gic: Preserve gic V2 bypass bits in cpu
      ctrl register") added a new function, gic_cpu_if_up(), to program the
      GIC CPU_CTRL register. This function assumes that there is only one GIC
      instance present and hence always uses the chip data for the primary GIC
      controller. Although it is not common for there to be a secondary, some
      devices do support a secondary. Therefore, fix this by passing
      gic_cpu_if_up() a pointer to the appropriate chip data structure.
      
      Similarly, the function gic_cpu_if_down() only assumes that there is a
      single GIC instance present. Update this function so that an instance
      number is passed for the appropriate GIC and return an error code on
      failure. The vexpress TC2 (which has a single GIC) is currently the only
      user of this function and so update it accordingly. Note that because the
      TC2 only has a single GIC, the call to gic_cpu_if_down() should always
      be successful.
      Signed-off-by: default avatarJon Hunter <jonathanh@nvidia.com>
      Reviewed-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      Cc: <linux-arm-kernel@lists.infradead.org>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Link: http://lkml.kernel.org/r/1438332252-25248-2-git-send-email-jonathanh@nvidia.comSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      4c2880b3
    • Jon Hunter's avatar
      irqchip/gic: Only allow the primary GIC to set the CPU map · 567e5a01
      Jon Hunter authored
      The gic_init_bases() function initialises an array that stores the mapping
      between the GIC and CPUs. This array is a global array that is
      unconditionally initialised on every call to gic_init_bases(). Although,
      it is not common for there to be more than one GIC instance, there are
      some devices that do support nested GIC controllers and gic_init_bases()
      can be called more than once.
      
      A 2nd call to gic_init_bases() will clear the previous CPU mapping and
      will only setup the mapping again for the CPU calling gic_init_bases().
      Fix this by only allowing the CPU map to be configured for the primary GIC.
      
      For secondary GICs the CPU map is not relevant because these GICs do not
      directly route the interrupts to the main CPU(s) but to other GICs or
      devices.
      Signed-off-by: default avatarJon Hunter <jonathanh@nvidia.com>
      Reviewed-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
      Cc: <linux-arm-kernel@lists.infradead.org>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
      Cc: Jason Cooper <jason@lakedaemon.net>
      Link: http://lkml.kernel.org/r/1438332252-25248-1-git-send-email-jonathanh@nvidia.comSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      567e5a01
  2. 01 Aug, 2015 4 commits
  3. 31 Jul, 2015 12 commits
  4. 29 Jul, 2015 22 commits