- 30 Oct, 2007 1 commit
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Manuel Lauss authored
Starting with binutils somewhere around 2.17.50.14 the vmlinux file contains a ".note.gnu.build-id" section which doesn't get removed when the zImage is built; resulting in a 2GB intermediate file and a broken zImage. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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- 29 Oct, 2007 39 commits
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Alejandro Martinez Ruiz authored
I'm converting most array size calculations under arch/ to use the ARRAY_SIZE() macro. This is the (tiny) patch for sh. Signed-off-by: Alejandro Martinez Ruiz <alex@flawedcode.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Paul Mundt authored
As noted by David: pte_page() is a macro defined as follows; include/asm-sh/pgtable.h #define pte_page(x) phys_to_page(pte_val(x)&PTE_PHYS_MASK) include/asm-sh/page.h #define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT)) So as you can see the phys_to_page() macro doesn't wrap the 'phys' parameter in parentheses so we end up with; pte_val(x)&PTE_PHYS_MASK >> PAGE_SHIFT Which is not what we wanted as '>>' has a higher precedence than bitwise AND. I dug into the git repository and I believe this bug was added with this commit (104b8dea); 2006-03-27 KAMEZAWA Hiroyuki [PATCH] unify pfn_to_page: sh pfn_to_page -#define phys_to_page(phys) (mem_map + (((phys)-__MEMORY_START) >> PAGE_SHIFT)) -#define page_to_phys(page) (((page - mem_map) << PAGE_SHIFT) + __MEMORY_START) +#define phys_to_page(phys) (pfn_to_page(phys >> PAGE_SHIFT)) +#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) Reported-by: David ADDISON <david.addison@st.com> Reported-by: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Adrian McMenamin authored
Remove reference to out of date/rotting websites. Signed-off-by: Adrian McMenamin <adrian@mcmen.demon.co.uk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Magnus Damm authored
This patch adds support for the ax88796 driver on highlander boards. Implemented using the 93cx6 EEPROM support introduced by commit-id 89e536a1. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds authored
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (34 commits) [MIPS] tb0219: Update copyright message. [MIPS] MT: Fix bug in multithreaded kernels. [MIPS] Alchemy: Remove CONFIG_TS_AU1X00_ADS7846 from defconfigs. Author: Ralf Baechle <ralf@linux-mips.org> [MIPS] sb1250: Enable GenBus IDE in defconfig. [MIPS] vmlinux.ld.S: correctly indent .data section [MIPS] c-r3k: Implement flush_cache_range() [MIPS] Store sign-extend register values for PTRACE_GETREGS [MIPS] Alchemy: Register platform devices [MIPS] Add len and addr validation for MAP_FIXED mappings. [MIPS] IRIX: Fix off-by-one error in signal compat code. [MIPS] time: Replace plat_timer_setup with modern APIs. [MIPS] time: Fix cut'n'paste bug in Sibyte clockevent driver. [MIPS] time: Make c0_compare_int_usable faster [MIPS] time: Fix cevt-r4k.c for 64-bit kernel [MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq(). [MIPS] txx9tmr clockevent/clocksource driver [MIPS] Add mips_hpt_frequency check to mips_clockevent_init(). [MIPS] IP32: Fixes after interrupt renumbering. [MIPS] IP27: Fix slice logic to work for arbitrary number of slices. ...
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git://git.kernel.org/pub/scm/linux/kernel/git/mingo/linux-2.6-schedLinus Torvalds authored
* git://git.kernel.org/pub/scm/linux/kernel/git/mingo/linux-2.6-sched: sched: fix style in kernel/sched.c sched: fix style of swap() macro in kernel/sched_fair.c sched: report CPU usage in CFS cgroup directories sched: move rcu_head to task_group struct sched: fix incorrect assumption that cpu 0 exists sched: keep utime/stime monotonic sched: make kernel/sched.c:account_guest_time() static
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Linus Torvalds authored
This reverts commit 2e1c49db. First off, testing in Fedora has shown it to cause boot failures, bisected down by Martin Ebourne, and reported by Dave Jobes. So the commit will likely be reverted in the 2.6.23 stable kernels. Secondly, in the 2.6.24 model, x86-64 has now grown support for SPARSEMEM_VMEMMAP, which disables the relevant code anyway, so while the bug is not visible any more, it's become invisible due to the code just being irrelevant and no longer enabled on the only architecture that this ever affected. Reported-by: Dave Jones <davej@redhat.com> Tested-by: Martin Ebourne <fedora@ebourne.me.uk> Cc: Zou Nan hai <nanhai.zou@intel.com> Cc: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Acked-by: Andy Whitcroft <apw@shadowen.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Ingo Molnar authored
fallout of recent commits: small coding style fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Ingo Molnar authored
fix style of swap() macro in kernel/sched_fair.c. ( this macro should eventually move to a general header, as ext3 uses a similar construct too. ) Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Paul Menage authored
Adds a cpu.usage file to the CFS cgroup that reports CPU usage in milliseconds for that cgroup's tasks [ mingo@elte.hu: style cleanups. ] Signed-off-by: Paul Menage <menage@google.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Srivatsa Vaddagiri authored
Peter Zijlstra noticed that the rcu_head object need not be present in every cfs_rq of a group. Move it to the task_group structure instead. Signed-off-by: Srivatsa Vaddagiri <vatsa@linux.vnet.ibm.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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James Bottomley authored
This patch: commit 9b5b7751 Author: Srivatsa Vaddagiri <vatsa@linux.vnet.ibm.com> Date: Mon Oct 15 17:00:09 2007 +0200 sched: clean up code under CONFIG_FAIR_GROUP_SCHED Introduced an assumption of the existence of CPU0 via this line cfs_rq = tg->cfs_rq[0]; If you have no CPU0, that will be NULL. The fix seems to be just to take whatever cfs_rq queue comes out of the for_each_possible_cpu() loop, since they're all equally good for the destruction operation. Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Peter Zijlstra authored
keep utime/stime monotonic. cpustats use utime/stime as a ratio against sum_exec_runtime, as a consequence it can happen - when the ratio changes faster than time accumulates - that either can be appear to go backwards. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Adrian Bunk authored
account_guest_time() can become static. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
When GDB writes a breakpoint into address area of inferior process the kernel needs to invalidate the modified memory in the inferior which is done by calling flush_cache_page which in turns calls r4k_flush_cache_page and local_r4k_flush_cache_page for VSMP or SMTC kernel via r4k_on_each_cpu(). As the VSMP and SMTC SMP kernels for 34K are running on a single shared caches it is possible to get away without interprocessor function calls. This optimization is implemented in r4k_on_each_cpu, so local_r4k_flush_cache_page is only ever called on the local CPU. This is where the following code in local_r4k_flush_cache_page() strikes: /* * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ if (cpu_context(smp_processor_id(), mm) == 0) return; On VSMP and SMTC had a function of cpu_context() for each CPU(TC). So in case another CPU than the CPU executing local_r4k_cache_flush_page has not accessed the mm but one of the other CPUs has there may be data to be flushed in the cache yet local_r4k_cache_flush_page will falsely return leaving the I-cache inconsistent for the breakpoint. While the issue was discovered with GDB it also exists in local_r4k_flush_cache_range() and local_r4k_flush_cache(). Fixed by introducing a new function has_valid_asid which on MT kernels returns true if a mm is active on any processor in the system. This is relativly expensive since for memory acccesses in that loop cache misses have to be assumed but it seems the most viable solution for 2.6.23 and older -stable kernels. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
[MIPS] MSP71xx: Fix bitrot. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
Enable the onboard GenBus IDE interface in the default configuration. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Franck Bui-Huu authored
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Maciej W. Rozycki authored
Contrary to the belief of some, the R3000 and related processors did have caches, both a data and an instruction cache. Here is an implementation of r3k_flush_cache_page(), which is the processor-specific back-end for flush_cache_range(), done according to the spec in Documentation/cachetlb.txt. While at it, remove an unused local function: get_phys_page(), do some trivial formatting fixes and modernise debugging facilities. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
A comment on ptrace_getregs() states "Registers are sign extended to fill the available space." but it is not true. Fix code to match the comment. Also fix casts on each caller to get rid of some warnings. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Florian Fainelli authored
This patch separates the platform devices registration for the MTX-1 specific devices: GPIO leds and watchdog. [Minor fixup and formatting change -- Ralf] Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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David Daney authored
Mmap with MAP_FIXED was not validating the addr and len parameters. This leads to the failure of GCC's gcc.c-torture/execute/loop-2[fg].c testcases when using the o32 ABI on a 64 bit kernel. These testcases try to mmap 65536 bytes at 0x7fff8000 and then access all the memory. In 2.6.18 and 2.6.23.1 (and likely other versions as well) the kernel maps the requested memory, but since half of it is above 0x80000000 a SIGBUS is generated when it is accessed. This patch moves the len validation above the MAP_FIXED processing so that it is always validated. It also adds validation to the addr parameter for MAP_FIXED mappings. Signed-off-by: David Daney <ddaney@avtrex.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Based on original patch by Roel Kluin <12o3l@tiscali.nl>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
plat_timer_setup is no longer getting called. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
Try increasingly longer time periods starting of at 0x10 cycles. This should be fast on hardware and work nicely with emulators. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
The expression "(long)(read_c0_count() - cnt)" can never be a negative value on 64-bit kernel. Cast to "int" before comparison. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
They break the timer interrupt initialization and only seem to be a kludge for initialization happening in the wrong order. Further testing done by Thiemo confirms the suspicion that the other invocations also seem to have useless. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Atsushi Nemoto authored
Convert jmr3927_clock_event_device to more generic txx9tmr_clock_event_device which supports one-shot mode. The txx9tmr_clock_event_device can be used for TX49 too if the cp0 timer interrupt was not available. Convert jmr3927_hpt_read to txx9_clocksource driver which does not depends jiffies anymore. The txx9_clocksource itself can be used for TX49, but normally TX49 uses higher precision clocksource_mips. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Yoichi Yuasa authored
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
And general untangling. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Fixme: At the time of this writing cevt-r4k.c doesn't yet know about how to handle the alternate timer interrupt of the RM9000. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Since the cp0 compare interrupt handler isn't initialized by the time plat_time_init is called don't set IE_IRQ5 anymore, cevt-r4k.c will do that a little later itself. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
The only thing it used to do is now done by cevt-r4k.c. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Ralf Baechle authored
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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