- 30 Jan, 2008 40 commits
-
-
Sheng Yang authored
When executing a test program called "crashme", we found the KVM guest cannot survive more than ten seconds, then encounterd kernel panic. The basic concept of "crashme" is generating random assembly code and trying to execute it. After some fixes on emulator insn validity judgment, we found it's hard to get the current emulator handle the invalid instructions correctly, for the #UD trap for hypercall patching caused troubles. The problem is, if the opcode itself was OK, but combination of opcode and modrm_reg was invalid, and one operand of the opcode was memory (SrcMem or DstMem), the emulator will fetch the memory operand first rather than checking the validity, and may encounter an error there. For example, ".byte 0xfe, 0x34, 0xcd" has this problem. In the patch, we simply check that if the invalid opcode wasn't vmcall/vmmcall, then return from emulate_instruction() and inject a #UD to guest. With the patch, the guest had been running for more than 12 hours. Signed-off-by:
Feng (Eric) Liu <eric.e.liu@intel.com> Signed-off-by:
Sheng Yang <sheng.yang@intel.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
-
Dong, Eddie authored
Remove the redundant level check when fetching shadow pte for present & non-present spte. Signed-off-by:
Yaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by:
-
Avi Kivity authored
If some other cpu steals mmu pages between our check and an attempt to allocate, we can run out of mmu pages. Fix by moving the check into the same critical section as the allocation. Signed-off-by: -
Marcelo Tosatti authored
Convert the synchronization of the shadow handling to a separate mmu_lock spinlock. Also guard fetch() by mmap_sem in read-mode to protect against alias and memslot changes. Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by:
-
Avi Kivity authored
Since gfn_to_page() is a sleeping function, and we want to make the core mmu spinlocked, we need to pass the page from the walker context (which can sleep) to the shadow context (which cannot). [marcelo: avoid recursive locking of mmap_sem] Signed-off-by: -
Marcelo Tosatti authored
In preparation for a mmu spinlock, add kvm_read_guest_atomic() and use it in fetch() and prefetch_page(). Signed-off-by:
-
Marcelo Tosatti authored
Do not hold kvm->lock mutex across the entire pagefault code, only acquire it in places where it is necessary, such as mmu hash list, active list, rmap and parent pte handling. Allow concurrent guest walkers by switching walk_addr() to use mmap_sem in read-mode. And get rid of the lockless __gfn_to_page. [avi: move kvm_mmu_pte_write() locking inside the function] [avi: add locking for real mode] [avi: fix cmpxchg locking] Signed-off-by:
-
Avi Kivity authored
FlexPriority accelerates the tpr without any patching. Signed-off-by: -
Avi Kivity authored
This adds a mechanism for exposing the virtual apic tpr to the guest, and a protocol for letting the guest update the tpr without causing a vmexit if conditions allow (e.g. there is no interrupt pending with a higher priority than the new tpr). Signed-off-by: -
Avi Kivity authored
Add a facility to report on accesses to the local apic tpr even if the local apic is emulated in the kernel. This is basically a hack that allows userspace to patch Windows which tends to bang on the tpr a lot. Signed-off-by: -
Avi Kivity authored
This can help diagnosing what the guest is trying to do. In many cases we can get away with partial emulation of msrs. Signed-off-by: -
Avi Kivity authored
Signed-off-by: -
Eddie Dong authored
Host side TLB flush can be merged together if multiple spte need to be write-protected. Signed-off-by:
-
Zhang Xiantao authored
IA64 also needs to see ioapic structure in irqchip. Signed-off-by:
xiantao.zhang@intel.com <xiantao.zhang@intel.com> Signed-off-by:
-
Zhang Xiantao authored
Moving kvm_vcpu_kick() to x86.c. Since it should be common for all archs, put its declarations in <linux/kvm_host.h> Signed-off-by:
-
Zhang Xiantao authored
Move ioapic code to common, since IA64 also needs it. Signed-off-by:
-
Zhang Xiantao authored
This allows reuse of ioapic in ia64. Signed-off-by:
-
Avi Kivity authored
Signed-off-by: -
Avi Kivity authored
This paves the way for multiple architecture support. Note that while ioapic.c could potentially be shared with ia64, it is also moved. Signed-off-by: -
Ryan Harper authored
Add printk_ratelimit check in front of printk. This prevents spamming of the message during 32-bit ubuntu 6.06server install. Previously, it would hang during the partition formatting stage. Signed-off-by:
Ryan Harper <ryanh@us.ibm.com> Signed-off-by:
-
Zhang Xiantao authored
This patch moves kvm_vm_stat to x86.h, and every arch can define its own kvm_vm_stat in $arch.h Signed-off-by:
Carsten Otte <cotte@de.ibm.com> Signed-off-by:
-
Zhang Xiantao authored
This patches moves two fields round_robin_prev_vcpu and tss to kvm_arch. Signed-off-by:
-
Zhang Xiantao authored
This patches moves two fields vpid and vioapic to kvm_arch Signed-off-by:
-
Zhang Xiantao authored
This patches moves mmu-related fields to kvm_arch. Signed-off-by:
-
Zhang Xiantao authored
This patches create kvm_arch to hold arch-specific kvm fileds and moves fields naliases and aliases to kvm_arch. Signed-off-by:
-
Zhang Xiantao authored
This patches moves kvm_vcpu_stat to x86.h, so every arch can define its own kvm_vcpu_stat structure. Signed-off-by:
-
Zhang Xiantao authored
This patches removes KVM_COMM macro, original it is hold kvm_vcpu common fields. Signed-off-by:
-
Zhang Xiantao authored
This patches moves kvm_vcpu definition to kvm.h, and finally kvm.h includes x86.h. Signed-off-by:
-
Zhang Xiantao authored
Since these functions need to know the details of kvm or kvm_vcpu structure, it can't be put in x86.h. Create mmu.h to hold them. Signed-off-by:
-
Zhang Xiantao authored
Move all the architecture-specific fields in kvm_vcpu into a new struct kvm_vcpu_arch. Signed-off-by:
-
Zhang Xiantao authored
Signed-off-by:
-
Marcelo Tosatti authored
Emulate cmpxchg8b atomically on i386. This is required to avoid a guest pte walker from seeing a splitted write. [avi: make it compile] Signed-off-by:
-
Joerg Roedel authored
This lets SVM ignore writes of the value 0 to the performance counter control registers. Thus enabling them will still fail in the guest, but a write of 0 which keeps them disabled is accepted. This is required to boot Windows Vista 64bit. [avi: avoid fall-thru in switch statement] Signed-off-by:
Joerg Roedel <joerg.roedel@amd.com> Signed-off-by:
Markus Rechberger <markus.rechberger@amd.com> Signed-off-by:
-
Joerg Roedel authored
This patch fixes a compile error of the LAPIC code with APIC debugging enabled. Signed-off-by:
-
Marcelo Tosatti authored
There is a race where VCPU0 is shadowing a pagetable entry while VCPU1 is updating it, which results in a stale shadow copy. Fix that by comparing the contents of the cached guest pte with the current guest pte after write-protecting the guest pagetable. Signed-off-by:
-
Joerg Roedel authored
With this patch KVM on SVM will exit to userspace if the guest writes to CR8 and the in-kernel APIC is disabled. Signed-off-by:
-
Avi Kivity authored
In addition to removing some duplicated code, this also handles the unlikely case of real-mode code updating a guest page table. This can happen when one vcpu (in real mode) touches a second vcpu's (in protected mode) page tables, or if a vcpu switches to real mode, touches page tables, and switches back. Signed-off-by: -
Avi Kivity authored
Signed-off-by: -
Avi Kivity authored
As set_pte() no longer references either a gpte or the guest walker, we can move it out of paging mode dependent code (which compiles twice and is generally nasty). Signed-off-by: -
Avi Kivity authored
Unused. Signed-off-by:
-
