1. 15 Oct, 2003 3 commits
    • Nathan Scott's avatar
      [PATCH] ia64: correct ino_t to be 64 bits wide · 5772f930
      Nathan Scott authored
      This brings the kernel in sync with glibc (and all other 64-bit platforms
      other than Alpha and S390x).  This fixes ustat() and breaks nfsctl_export,
      but the latter is a deprecated interface anyhow (newer versions of
      nfsutils use "exportfs" instead).
      5772f930
    • David Mosberger's avatar
      ia64: Fix __delay() to do The Right Thing. In practice, this may · 5a86523b
      David Mosberger authored
      	cause BogoMIPS to drop to half the clock-speed with current
      	versions of GCC, but this just shows that GCC doesn't generate
      	very good code for single-cycle loops.  Perhaps it will motivate
      	someone to improve GCC in this area (though it's hardly of
      	practical value, other than for producing large BogoMIPS values).
      5a86523b
    • Jesse Barnes's avatar
      [PATCH] ia64: force on appropriate generic options · ba79587f
      Jesse Barnes authored
      Make sure that generic kernels actually build by forcing on the
      necessary options.  With this patch I was able to build a generic kernel
      out of the to-linus-2.5 tree.
      ba79587f
  2. 14 Oct, 2003 3 commits
    • Ian Wienand's avatar
      [PATCH] ia64: drop bogus "now < last_tick" message · e29f2b50
      Ian Wienand authored
      itc_get_offset() has a consistency check which is no longer valid now that
      xtime_lock is a seq_lock.  Drop the bogus check.
      e29f2b50
    • Jesse Barnes's avatar
      [PATCH] ia64: SN2 module fix · 27f02e28
      Jesse Barnes authored
      Because we're the only platform with seperate in, out, and read
      routines, we have to include the file that defines them in our machvec
      header so that users of the functions will get the right defines and not
      use the non-inline function variants (which are only necessary for
      generic kernels).
      27f02e28
    • Tony Luck's avatar
      [PATCH] ia64: Another MCA fix · 10c59cf0
      Tony Luck authored
      The definition of the pal_process_state_info_s structure
      misses out some useful pieces (e.g. the "mi" bit which indicates
      whether we should call PAL_MC_ERROR_INFO to get more details).
      
      Worse yet, some of the bits are in the wrong places (cc/tc/bc).
      
      See Volume 2 of "Intel Itanium Architecture Software Developer's
      Manual".  (In the Rev 2.1 October 2002 edition, p. 2:268 and 2:276).
      10c59cf0
  3. 13 Oct, 2003 2 commits
    • Tony Luck's avatar
      [PATCH] ia64: cannot convert region 5 address to physical by clearing bits 63:61 · d9f2ec86
      Tony Luck authored
      Another no-brainer bug fix snipped out of the quagmire of
      the MCA/TLB patch.  This one is for 2.6 only, we must use
      the new LOAD_PHYSICAL() macro to get the physical address of
      the code label that we want to jump to, the INST_VA_TO_PA()
      macro just clears the region bits, which only works for region
      7 addresses.
      d9f2ec86
    • Tony Luck's avatar
      [PATCH] ia64: infinite loop in ia64_mca_wakeup_ipi_wait · bcf50865
      Tony Luck authored
      This bugfix has been hiding inside the MCA TLB patches.
      
      There is an infinite loop in ia64_mca_wakeup_ipi_wait() because
      the compiler optimizes away the test at the bottom of the while
      loop.  It does this because IA64_MCA_WAKEUP_VECTOR is 0xf0, so
      irr_bit is known to be the constant 0x30, a.k.a. 48 in decimal.
      So when the compiler looks at the expression:
      
      
      It observes that 1' as unsigned
      long.
      bcf50865
  4. 10 Oct, 2003 8 commits
  5. 09 Oct, 2003 9 commits
  6. 08 Oct, 2003 15 commits