- 12 Jul, 2016 1 commit
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Stefan Agner authored
All device trees currently in mainline specify the time clock parent using the assigned-clocks/assigned-clock-parents method, there is no need to statically assign the parent in the core clock driver. Also all current boards provide an Ethernet reference clock for the PHY externally, hence configuring the internal PHY reference clock. Furthermore, and the actual driver of this patch, specify ethernet related parents at that early point in boot leads to a warning: bad: scheduling from the idle thread! The reason for the warning is that setting the parent enables the ENET PLL since we are using CLK_OPS_PARENT_ENABLE. Enabling the ENET PLL can cause clk_pllv3_wait_lock to sleep. See also: commit fc8726a2 ("clk: core: support clocks which requires parents enable (part 2)"). Note that setting the ENET AXI root clock parent also requires ENET PLL to be enabled. However, U-Boot typically leaves the ENET PLL on, hence when the framework sets the parent of the first clock, it does not need to wait for the PLL to come up. But because there is currently no user of that clock, the PLL gets disabled after setting the parent. Therefore, subsequent reparenting calls of any clock which somehow rely on the ENET PLL, need to reenable the ENET PLL which leads to a sleep. Removing those subsequent reparenting calls works around this issue. Also remove comments. The code is really verbose enough. Signed-off-by:
Stefan Agner <stefan@agner.ch> Tested-by:
Fabio Estevam <festevam@gmail.com> Signed-off-by:
Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160703174813.13970-1-stefan@agner.ch
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- 11 Jul, 2016 4 commits
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Michael Turquette authored
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Maxime Ripard authored
Now that we have a different clock representation, switch to it. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
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Maxime Ripard authored
The Kconfig symbol for the sun8i SoC family was mistyped. Fix that. Signed-off-by:
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Maxime Ripard authored
The code had a typo and got the wrong offset for the hardcoded divider, fix that. Signed-off-by:
Jean-Francois Moine <moinejf@free.fr> Reported-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
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- 09 Jul, 2016 14 commits
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Michael Turquette authored
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Maxime Ripard authored
Add the list of clocks and resets found in the H3 CCU. Signed-off-by:
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Maxime Ripard authored
Introduce support for clocks that use a combination of two linear multipliers (N and K factors), one linear divider (M) and one power of two divider (P). Signed-off-by:
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Maxime Ripard authored
Introduce support for clocks that multiply and divide using two linear multipliers and one linear divider. Signed-off-by:
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Maxime Ripard authored
Introduce support for clocks that multiply and divide using linear factors. Signed-off-by:
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Maxime Ripard authored
Introduce support for clocks that use a combination of two linear multipliers. Signed-off-by:
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Maxime Ripard authored
Introduce support for the clocks that combine a linear divider and a power-of-two based one. Signed-off-by:
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Maxime Ripard authored
Add support for the various dividers (linear, table or pow-of-two based) found in the CCU. Signed-off-by:
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Maxime Ripard authored
Add support for the clocks in the CCU that introduce a phase shift from their parent clock. Signed-off-by:
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Maxime Ripard authored
Some clocks in the Allwinner SoCs clocks unit are just muxes. However, those muxes might also be found in some other complicated clocks that would benefit from the code in there to deal with "advanced" features, like pre-dividers. Introduce a set of helpers to reduce the code duplication in such cases. Signed-off-by:
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Maxime Ripard authored
Some clocks in the Allwinner SoCs clocks unit are just simple gates. Add support for those clocks. Since it's a feature that can also be found in more complex clocks, provide a bunch of helpers that can be reused later on. Signed-off-by:
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Maxime Ripard authored
Some clocks can be switched to a mode called fractional that have two fixed output rate you can choose from. Add a small library to deal with those clocks. Signed-off-by:
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Maxime Ripard authored
Start our new clock infrastructure by adding the registration code, common structure and common code. Signed-off-by:
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Maxime Ripard authored
Introduce a new binding with its documentation for the brand new clock sub-framework. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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- 08 Jul, 2016 4 commits
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Stefan Agner authored
In order to allow wake support in STOP sleep mode, clocks are needed. Use imx_clk_gate2_cgr to disable automatic clock gating in low power mode STOP. This allows to enable wake by UART using: echo enabled > /sys/class/tty/ttyLP0/power/wakeup However, if wake is not enabled, the driver should disable the clocks explicitly to save power. Signed-off-by:
Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by:
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Tomeu Vizoso authored
When failing to lookup the assigned clock for setting its parents, we were previously printing a misleading error message that lead to think that it was the parent clock what couldn't be found. Change error message to make clear that it's the assigned clock what couldn't be found in this case. Signed-off-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by:
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Michael Turquette authored
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Kevin Hilman authored
The MMC_PCLK is needed for the SD/eMMC driver, expose to DT (and comment out in clk driver) Signed-off-by:
Kevin Hilman <khilman@baylibre.com> Signed-off-by:
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- 07 Jul, 2016 3 commits
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Christophe JAILLET authored
This is likely that checking 'clks[idx]' instead of 'clks[n]' is expected here. Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by:
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Michael Turquette authored
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Sylvain Lemieux authored
This patch add the support to select the peripheral clock (PERIPH) as a parent clock source using the "assigned-clock-parents" parameter in the device tree. Signed-off-by:
Sylvain Lemieux <slemieux@tycoint.com> Acked-by:
Vladimir Zapolskiy <vz@mleia.com> Signed-off-by:
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- 06 Jul, 2016 6 commits
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Paul Gortmaker authored
We have the following file --> Kconfig mapping: sunxi/clk-factors.c obj-y sunxi/clk-sun6i-apb0-gates.c CONFIG_MFD_SUN6I_PRCM (bool) sunxi/clk-sun6i-apb0.c CONFIG_MFD_SUN6I_PRCM sunxi/clk-sun6i-ar100.c CONFIG_MFD_SUN6I_PRCM sunxi/clk-sun8i-apb0.c CONFIG_MFD_SUN6I_PRCM sunxi/clk-sun9i-mmc.c obj-y Hence none of these are being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the drivers there is no doubt they are builtin-only. All drivers get mostly the same changes, so they are handled in batch. Changes are (1) convert to builtin_platform_register, (2) use the init.h header, (3) delete the MODULE_LICENCE/MODULE_AUTHOR and associated tags, and (4) delete any ".remove" functions. There was a stray module.h in a file not using any init.h or module.h stuff, so we simply removed that one. In two cases, we explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. We delete the MODULE_LICENSE etc. tags since all that information is already contained at the top of each file in the comments. Acked-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Chen-Yu Tsai <wens@csie.org> Cc: "Emilio López" <emilio@elopez.com.ar> Cc: Stephen Boyd <sboyd@codeaurora.org> Acked-by:
Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by:
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Paul Gortmaker authored
The Kconfig currently controlling compilation of this code is: drivers/clk/Kconfig:config COMMON_CLK_OXNAS drivers/clk/Kconfig: bool "Clock driver for the OXNAS SoC Family" ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. We explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. Cc: Stephen Boyd <sboyd@codeaurora.org> Acked-by:
Neil Armstrong <narmstrong@baylibre.com> Cc: linux-clk@vger.kernel.org Signed-off-by:
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Wadim Egorov authored
The RK808 and RK818 PMICs are using a similar register map. We can reuse the clk driver for the RK818 PMIC. So let's add the RK818 in the Kconfig description. Signed-off-by:
Wadim Egorov <w.egorov@phytec.de> Acked-by:
Stephen Boyd <sboyd@codeaurora.org> Signed-off-by:
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Xinliang Liu authored
In the bootloader of HiKey/96boards, syspll and media_syspll clk was initialized to 1.19GHz. So, here changes it in kernel accordingly. 1.19GHz was chosen over 1.2GHz because at 1.19GHz we get more precise HDMI pixel clock (1.19G/16 = 74.4MHz) for 1280x720p@60Hz HDMI (74.25MHz required by standards). Closer pixel clock means better compatibility to HDMI monitors. Signed-off-by:
Guodong Xu <guodong.xu@linaro.org> Signed-off-by:
Xinliang Liu <xinliang.liu@linaro.org> Signed-off-by:
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Paul Gortmaker authored
The Kconfig currently controlling compilation of this code is: drivers/clk/meson/Kconfig:config COMMON_CLK_GXBB drivers/clk/meson/Kconfig: bool ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_init translates to device_initcall in the non-modular case, the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE and ALIAS are no-op for non-modules. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: linux-clk@vger.kernel.org Cc: linux-amlogic@lists.infradead.org Signed-off-by:
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Paul Gortmaker authored
The Kconfig currently controlling compilation of this code is: drivers/clk/meson/Kconfig:config COMMON_CLK_MESON8B drivers/clk/meson/Kconfig: bool ...meaning that it currently is not being built as a module by anyone. However a recent commit added a bunch of modular boilerplate to this driver. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. Since module_init translates to device_initcall in the non-modular case, the init ordering remains unchanged with this commit. Also note that MODULE DEVICE_TABLE/ALIAS are no-op when non-modular. We also delete the MODULE_LICENSE tag etc. since all that information was (or is now) contained at the top of the file in the comments. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: linux-clk@vger.kernel.org Cc: linux-amlogic@lists.infradead.org Signed-off-by:
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- 02 Jul, 2016 8 commits
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Linus Walleij authored
This adds the EBI2 2X and EBI2 clocks to the MSM8660/APQ8060 GCC. This is necessary to enable clocking of the external bus interface so that peripherals on it can be mounted. These two clocks are simple gated branch clocks. In the vendor tree clock-8x60, these clocks have some kind of dependency, the EBI2 clock has .depends = &ebi2_2x_clk.c, what this means is undocumented, it doesn't seem like there is a parent/child relationship, so the solution I chose was to just have the EBI2 driver get and enable both clocks. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Dong Aisheng authored
Formerly clk core does not support imx7d clock type well that all its clock operations requires the parent clock on. Therefore we enabled all clocks by default in clock driver initialization for other module clocks operate well. After patch 'clk: imx7d: using api with flag CLK_OPS_PARENT_ENABLE', clk core can handle such clock type well, so we don't have to enable them all by default anymore. Instead, we only enable a minimum required set of clocks. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by:
Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by:
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Dong Aisheng authored
i.MX7D requires all clocks operations including enable/disable, rate change and re-parent with its parent clock on. Changing to the correct APIs to tell clk core such requirement. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by:
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Dong Aisheng authored
IMX SoCs like i.MX7D requires using CLK_OPS_PARENT_ENABLE flags, adding the corresponding clock APIs variants for easily to use. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by:
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Dong Aisheng authored
Re-order and concentrate the same type of clk api for better code maintenance. Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by:
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Dong Aisheng authored
On Freescale i.MX7D platform, all clocks operations, including enable/disable, rate change and re-parent, requires its parent clock on. Current clock core can not support it well. This patch adding flag CLK_OPS_PARENT_ENABLE to handle this special case in clock core that enable its parent clock firstly for each operation and disable it later after operation complete. The patch part 2 fixes set clock rate and set parent while its parent is off. The most special case is for set_parent() operation which requires all parents including both old and new one to be enabled at the same time during the operation. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by:
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Dong Aisheng authored
On Freescale i.MX7D platform, all clocks operations, including enable/disable, rate change and re-parent, requires its parent clock enable. Current clock core can not support it well. This patch introduce a new flag CLK_OPS_PARENT_ENABLE to handle this special case in clock core that enable its parent clock firstly for each operation and disable it later after operation complete. The patch part 1 fixes the possible disabling clocks while its parent is off during kernel booting phase in clk_disable_unused_subtree(). Before the completion of kernel booting, clock tree is still not built completely, there may be a case that the child clock is on but its parent is off which could be caused by either HW initial reset state or bootloader initialization. Taking bootloader as an example, we may enable all clocks in HW by default. And during kernel booting time, the parent clock could be disabled in its driver probe due to calling clk_prepare_enable and clk_disable_unprepare. Because it's child clock is only enabled in HW while its SW usecount in clock tree is still 0, so clk_disable of parent clock will gate the parent clock in both HW and SW usecount ultimately. Then there will be a child clock is still on in HW but its parent is already off. Later in clk_disable_unused(), this clock disable accessing while its parent off will cause system hang due to the limitation of HW which must require its parent on. This patch simply enables the parent clock first before disabling if flag CLK_OPS_PARENT_ENABLE is set in clk_disable_unused_subtree(). This is a simple solution and only affects booting time. After kernel booting up the clock tree is already created, there will be no case that child is off but its parent is off. So no need do this checking for normal clk_disable() later. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by:
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Dong Aisheng authored
No function level change, just moving code place. clk_disable_unused function will need to call clk_core_prepare_enable/ clk_core_disable_unprepare when adding CLK_OPS_PARENT_ENABLE features. So move it after clk_core_disable_unprepare to avoid adding forward declared functions later. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by:
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