- 20 May, 2014 1 commit
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git://git.infradead.org/linux-mvebuOlof Johansson authored
Merge "ARM: mvebu: DT changes for v3.16" from Jason Cooper: mvebu DT changes for v3.16 - kirkwood - rework nsa3x0 board to add nsa320 - large cleanup to facilitate use in barebox - guruplug phy updates - audio updates for t5325 - mvebu - use clocks vice clock-frequency for uart nodes - armada 375/380/385 - add watchdog node - add coherency fabric - add smp support - add sdhci - add ahci - add thermal sensor - armada 370/XP - and pmsu * tag 'mvebu-dt-3.16' of git://git.infradead.org/linux-mvebu: (35 commits) ARM: Kirkwood: t5325: Use simple card to instantiate audio ARM: Kirkwood: DT: Add missing #sound-dai-cells property ARM: Kirkwood: Add node for audio codec ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id ARM: dts: kirkwood: set Guruplug ethernet PHY compatible ARM: dts: kirkwood: set default pinctrl for I2C1 on 6282 ARM: dts: kirkwood: set default pinctrl for I2C0 ARM: dts: kirkwood: set default pinctrl for NAND ARM: dts: kirkwood: set default pinctrl for SPI0 ARM: dts: kirkwood: set default pinctrl for UART0/1 ARM: dts: kirkwood: set default pinctrl for GBE1 ARM: dts: kirkwood: consolidate common pinctrl settings ARM: dts: kirkwood: add pinctrl node to common SoC include ARM: dts: kirkwood: rename pin-controller nodes ARM: dts: kirkwood: remove clock-frequency properties from UART nodes ARM: dts: kirkwood: add stdout-path property to all boards ARM: dts: kirkwood: add node labels ARM: mvebu: Enable the thermal sensor in Armada 380/385 SoC ARM: mvebu: Enable the thermal sensor in Armada 375 SoC ARM: mvebu: don't use clocks property in UART node for Netgear RN2120 ... Signed-off-by: Olof Johansson <olof@lixom.net>
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- 16 May, 2014 1 commit
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Olof Johansson authored
Merge tag 'socfpga-dt-updates-for-3.16_v3' of git://git.rocketboards.org/linux-socfpga-next into next/dt Merge "dts: socfpga: general updates for the socfpga platform" from Dinh Nguyen: Mostly DTS additions to the SOCFPGA platform from Steffan Trumtrar, and a couple of device tree documentation updates/typo fix. This one does not the GPIO binding patch, as that is pending further discussion. Also, v3 fixes a rebase artifact and compile tested. * tag 'socfpga-dt-updates-for-3.16_v3' of git://git.rocketboards.org/linux-socfpga-next: ARM: socfpga: dts: Add div-reg to the main_pll clocks ARM: socfpga: dts: add reset-controller Documentation: dt: reset: move socfpga-reset Documentation: dt: socfpga: add reset-cells property ARM: socfpga: dts: Add DTS entries for USB ARM: socfpga: dts: Remove hard coded clock-frequency property ARM: socfpga: dts: add eeprom and rtc on i2c0 ARM: socfpga: dts: convert to preprocessor includes ARM: socfpga: dts: add rtc on i2c0 to socrates ARM: socfpga: dts: add support for EBV SOCrates ARM: socfpga: dts: add can0+1 ARM: socfpga: dts: add i2c busses ARM: socfpga: dts: add remaining interrupts for pdma ARM: socfpga: dts: fix pdma interrupt Signed-off-by: Olof Johansson <olof@lixom.net>
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- 06 May, 2014 15 commits
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Dinh Nguyen authored
The mpu_clk, main_clk, and dbg_base_clk outputs from the main PLL go through a pre-divider. Update socfpga.dtsi to represent those dividers for these clocks. Re-use the "div-reg" property that was used for the socfpga-gate-clock as this is the same thing. Also update the documentation. Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Steffen Trumtrar authored
Add the necessary #reset-cells property to the rst-mgr node and provide a header-file with all possible resets specified. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Steffen Trumtrar authored
Instead of having the documentation for the socfpga-reset controller in a vendor specific directory, move it to the reset folder to all the other reset drivers. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Steffen Trumtrar authored
To be able to use the reset-controller framework, the property #reset-cells is mandatory. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Dinh Nguyen authored
Update all the SOCFPGA DTS files with USB entries. Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Dinh Nguyen authored
The timers and uart can get their clock frequencies using the common clock driver. Reviewed-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Dinh Nguyen authored
The Altera Cyclone5 and Arria5 devkit has an EEPROM and a RTC on the board. This patch adds support for them. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> --- v2: Remove LCD as the driver has not been upstreamed.
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Steffen Trumtrar authored
Convert all socfpga DT files to the dtc preprocessor include syntax. This allows to include header files in the devicetrees like other SoC-types already do. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Steffen Trumtrar authored
The SOCrates has an M41T82M RTC on i2c0. Add it. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Steffen Trumtrar authored
The SOCrates is a SOCFpga-Cyclone5 based board from EBV. Add support for it. Reviewed-by: Pavel Machek <pavel@denx.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Steffen Trumtrar authored
Add both can controllers to the dtsi. Reviewed-by: Pavel Machek <pavel@denx.de> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Steffen Trumtrar authored
Add all 4 i2c busses. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Steffen Trumtrar authored
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Steffen Trumtrar authored
The first interrupt is not at 180 but 104. Fix it. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Olof Johansson authored
Merge tag 'renesas-dt2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Second Round of Renesas ARM Based SoC DT Updates for v3.16" from Simon Horman: * Add r8a7791 (R-Car M2) based Henninger board * tag 'renesas-dt2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: henninger: enable SATA0 ARM: shmobile: henninger: add Ether DT support ARM: shmobile: henninger: initial device tree Signed-off-by: Olof Johansson <olof@lixom.net>
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- 05 May, 2014 20 commits
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Olof Johansson authored
Merge tag 'renesas-dt-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt Merge "Renesas ARM Based SoC DT Updates for v3.16" from Simon Horman: r8a7791 (R-Car M2) and r8a7790 (R-Car H2) SoCs * Add MSIOF nodes and aliases * Correct I2C clock parents r8a7791 (R-Car M2) SoC * Add EHCI MSTP clock r8a7791 (R-Car M2) based Koelsch and r8a7790 (R-Car H2) based Lager boards * Add MSIOF nodes * Add gpio-keys support for SW2 * Enable I2C * Enable Quad SPI transfers for the SPI FLASH * Rename and lable spi to qspi, add spi0 alias * Set ethernet PHY LED mode r8a7779 (R-Car H1) and r8a7778 (R-Car M2) SoCs * Improve and correct HSPI nodes r8a7778 (R-Car M2) based Bock-W board * Add SPI FLASH r8a7740 (R-Mobile A1) SoC * Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings r8a7740 (R-Mobile A1) based Armadillo800 EVA board * Enable RTC * Use KEY_* macros for gpio-keys EMEV2 (Emma Mobile EV2) based kzm9g board * Use KEY_* macros for gpio-keys * tag 'renesas-dt-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits) ARM: shmobile: armadillo-reference dts: Seiko Instruments, Inc is "sii" ARM: shmobile: lager dts: Enable Quad SPI transfers for the SPI FLASH ARM: shmobile: koelsch dts: Enable Quad SPI transfers for the SPI FLASH ARM: shmobile: r8a7790: add IIC(B) cores to dtsi ARM: shmobile: r8a7790: add IIC(B) clocks to dtsi ARM: shmobile: r8a7790: add IIC0-2 clock macros ARM: shmobile: r8a7791: Fix the I2C clocks parents in DT ARM: shmobile: r8a7790: Fix the I2C clocks parents in DT ARM: shmobile: lager: Correct setting of ethernet PHY LED mode ARM: shmobile: armadillo-reference dts: enable RTC ARM: shmobile: r8a7791: Add EHCI MSTP clock ARM: shmobile: Use r8a7740 suffix for i2c, mmcif, fsi2 compat strings ARM: shmobile: koelsch: activate i2c6 bus ARM: shmobile: koelsch: make i2c2-pfc node unique ARM: shmobile: r8a7791: add IIC(B) cores to dtsi ARM: shmobile: r8a7791: add IIC(B) clocks to dtsi ARM: shmobile: r8a7791: add IIC0/1 clock macros ARM: shmobile: kzm9g-reference dts: Use KEY_* macros for gpio-keys ARM: shmobile: armadillo-reference dts: Use KEY_* macros for gpio-keys ARM: shmobile: koelsch: Set ethernet PHY LED mode ... Signed-off-by: Olof Johansson <olof@lixom.net>
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git://github.com/at91linux/linux-at91Olof Johansson authored
Merge "at91: DT for 3.16 #1" from Nicolas Ferre: 3.16: first DT series: - more support for at91sam9rl and its associated EK board - some improvements to at91sam9g45 (ADC, TS, PWM leds) - addition of some missing pieces for describing audio of SAMA5D3-EK in DT * tag 'at91-dt' of git://github.com/at91linux/linux-at91: ARM: at91: sama5d3: clock for ssc from rk pin ARM: at91: sama5d3: add the missing property ARM: at91: sama5d3: correct the sound compatible string ARM: at91: sama5d3: disable sound by default ARM: at91: sama5d3: add DMA property for SSC devices ARM: at91/dt: at91sam9m10g45ek PWM leds polarity is inversed ARM: at91/dt: at91sam9m10g45ek: add ADC and touchscreen support ARM: at91/dt: sam9g45: improve ADC/touchscreen support ARM: at91/dt: add peripherals to the at91sam9rlek board ARM: at91/dt: sam9rl: add lcd, adc, usb gadget and pwm support Signed-off-by: Olof Johansson <olof@lixom.net>
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Andrew Lunn authored
Add device tree nodes to instantiate the audio drivers on the HP T5325 device. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1399141819-23924-8-git-send-email-andrew@lunn.chSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
The sound node is missing a #sound-dai-cells property. Add it, so that the sounds node can be used in combination with the simple-audio-card binding. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1399141819-23924-5-git-send-email-andrew@lunn.chSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
Instantiate the audio codec via a DT node. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1399141819-23924-4-git-send-email-andrew@lunn.chSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Linus Torvalds authored
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Sebastian Hesselbarth authored
Ethernet PHYs found on Globalscale Guruplug are connected by RGMII-ID. Set the corresponding phy-connection-type property accordingly. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-16-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
Ethernet PHY compatible shall be "ethernet-phy-ieee802.3-c22" and "ethernet-phy-idAAAA.BBBB" if PHY OUI id is known. We know it for the PHY found on Guruplug, so set it accordingly. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-15-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
Currently, the only 6282-based Kirkwood boards that use I2C1 are Openblocks A6/A7. Both use the same default I2C1 pinctrl setting from kirkwood-6282.dtsi. Move the pinctrl setting to the I2C1 node directly and put a note in front of the corresponding pinctrl node to overwrite the setting on board level. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-14-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
There is only one valid pinctrl setting for I2C0 on Kirkwood. Now that we have the setting in the common SoC pinctrl, move it to the I2C0 controller node directly and remove it from the individual boards. While at it, also fix up status = "okay" to "ok" on one board's I2C0 node. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-13-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
There is only one valid pinctrl setting for NAND on Kirkwood. Now that we have the setting in the common SoC pinctrl, move it to the NAND controller node directly and remove it from the individual boards. While at it, also fix up status = "okay" to "ok" on one board's NAND node. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-12-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
Most Kirkwood boards use the default SPI0 pinctrl setting anyway. Add a default pinctrl setting to the toplevel SoC SPI0 node and put a note in front of the corresponding pinctrl node to overwrite the setting on board level. Currently, only T5325 is using a different setting and already overwrites the corresponding pinctrl node. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-11-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
Most boards use the default UART0/1 pinctrl setting without RTS/CTS. Add the pinctrl setting to the toplevel SoC UART nodes and put a note in front of the corresponding pinctrl node to overwrite the setting on board level. Currently, both boards using a different UART pinctrl setting (Openblocks A6, A7) already overwrite the pinctrl node. While at it, also fix up some status = "ok" to "okay" and again whitespace issues on mplcec4 uart nodes. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-10-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
On Kirkwood, there is only one valid pinctrl setting for GBE1. With a common SoC pinctrl node, we can now set it in the node instead of in each board file. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-9-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
All SoCs have the same pinctrl setting for NAND, UART0/1, SPI, TWSI0, and GBE1. Move it to the common pinctrl node that we now have. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-8-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
All Kirkwood SoCs have their pinctrl registers at the same address. Instead of replaying the same reg property on each SoC, have the reg property set in the common SoC file already. This also allows us to move common pinctrl settings to this node later on. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-7-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
To prepare pin-controller consolidation, first rename all pinctrl nodes to a more appropriate name regarding ePAPR recommended names. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-6-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
UART devices found on Kirkwood SoCs derive their baudrate from TCLK. With proper clocks property in the SoCs serial node, boards do not need to overwrite it anymore. Remove the remaining clock-frequency property from all Kirkwood boards. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-5-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
ePAPR allows to reference the device used for console output by stdout-path property. With node labels for Kirkwood UART0, now reference it on all Kirkwood boards that already have ttyS0 in their bootargs property. While at it, fix some whitespace issues on mplcec4's chosen node (there are more, but we only fix the chosen node now) Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-4-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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Sebastian Hesselbarth authored
This adds missing node labels to Kirkwood common and SoC specific nodes to allow to reference them more easily. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1398862602-29595-3-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: Jason Cooper <jason@lakedaemon.net>
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- 04 May, 2014 3 commits
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git://git.samba.org/jlayton/linuxLinus Torvalds authored
Pull file locking change from Jeff Layton: "Only an email address change to the MAINTAINERS file" * tag 'locks-v3.15-3' of git://git.samba.org/jlayton/linux: MAINTAINERS: email address change for Jeff Layton
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git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linuxLinus Torvalds authored
Pull arm64 fixes from Catalin Marinas: "These are mostly arm64 fixes with an additional arm(64) platform fix for the initialisation of vexpress clocks (the latter only affecting arm64; the arch/arm64 code is SoC agnostic and does not rely on early SoC-specific calls) - vexpress platform clocks initialisation moved earlier following the arm64 move of of_clk_init() call in a previous commit - Default DMA ops changed to non-coherent to preserve compatibility with 32-bit ARM DT files. The "dma-coherent" property can be used to explicitly mark a device coherent. The Applied Micro DT file has been updated to avoid DMA cache maintenance for the X-Gene SATA controller (the only arm64 related driver with such assumption in -rc mainline) - Fixmap correction for earlyprintk - kern_addr_valid() fix for huge pages" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: vexpress: Initialise the sysregs before setting up the clocks arm64: Mark the Applied Micro X-Gene SATA controller as DMA coherent arm64: Use bus notifiers to set per-device coherent DMA ops arm64: Make default dma_ops to be noncoherent arm64: fixmap: fix missing sub-page offset for earlyprintk arm64: Fix for the arm64 kern_addr_valid() function
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git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds authored
Pull SCSI fixes from James Bottomley: "This is two patches both fixing bugs in drivers (virtio-scsi and mpt2sas) causing an oops in certain circumstances" * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: [SCSI] virtio-scsi: Skip setting affinity on uninitialized vq [SCSI] mpt2sas: Don't disable device twice at suspend.
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