1. 01 Aug, 2019 6 commits
    • Daniele Ceraolo Spurio's avatar
      drm/i915/gt: Move gt_cleanup_early out of gem_cleanup_early · 6cf72db6
      Daniele Ceraolo Spurio authored
      We don't call the init_early function from within the gem code, so we
      shouldn't do it for the cleanup either.
      
      v2: while at it, s/gt_cleanup_early/gt_late_release (Chris)
      v3: s/late_release/driver_late_release/ (Chris)
      Signed-off-by: default avatarDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
      Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> #v1
      Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190801005709.34092-1-daniele.ceraolospurio@intel.com
      6cf72db6
    • Chris Wilson's avatar
      drm/i915: Remove lrc default desc from GEM context · a1c9ca22
      Chris Wilson authored
      We only compute the lrc_descriptor() on pinning the context, i.e.
      infrequently, so we do not benefit from storing the template as the
      addressing mode is also fixed for the lifetime of the intel_context.
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: default avatarPrathap Kumar Valsan <prathap.kumar.valsan@intel.com>
      Acked-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190730133035.1977-9-chris@chris-wilson.co.uk
      a1c9ca22
    • Matt Roper's avatar
      drm/i915/ehl: Don't forget to handle port C's hotplug interrupts · 8ef7e340
      Matt Roper authored
      We're mostly re-using ICL's interrupt handling on EHL, but we still need
      to remember to account for the extra combo port that EHL has.  Use TGP's
      mask (which includes combo port C) rather than ICP's mask when
      appropriate.  Let's also skip reading TC-specific registers on this
      platform since EHL doesn't have any TC ports.
      
      v2: Base setup of SHOTPLUG_CTL_TC on whether the tc pin mask is non-zero
          rather than performing another PCH type check.  (Jose)
      
      Cc: José Roberto de Souza <jose.souza@intel.com>
      Cc: Vivek Kasireddy <vivek.kasireddy@intel.com>
      Cc: Lucas De Marchi <lucas.demarchi@intel.com>
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190730220553.15300-1-matthew.d.roper@intel.com
      8ef7e340
    • Jani Nikula's avatar
      drm/i915/oa: add content to Makefile · 8ad4ca6e
      Jani Nikula authored
      Apparently the empty Makefile has caused some confusion. Add the
      subdir-cc-flags-y as in 7fcc7ca5 ("drm/i915: add header search path
      to subdir Makefiles") which should be useful.
      
      The generated headers still aren't self-contained, so can't add that.
      
      References: http://marc.info/?i=80bf2204-558a-6d3f-c493-bf17b891fc8a@infradead.org
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Reviewed-by: default avatarMichal Wajdeczko <michal.wajdeczko@intel.com>
      Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190730113432.22146-1-jani.nikula@intel.com
      8ad4ca6e
    • Wei Yongjun's avatar
      drm/i915: fix possible memory leak in intel_hdcp_auth_downstream() · de70fdd7
      Wei Yongjun authored
      'ksv_fifo' is malloced in intel_hdcp_auth_downstream() and should be
      freed before leaving from the error handling cases, otherwise it will
      cause memory leak.
      
      Fixes: f26ae6a6 ("drm/i915: SRM revocation check for HDCP1.4 and 2.2")
      Signed-off-by: default avatarWei Yongjun <weiyongjun1@huawei.com>
      Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190704104534.12508-1-weiyongjun1@huawei.com
      de70fdd7
    • Chris Wilson's avatar
      drm/i915/execlists: Always clear pending&inflight requests on reset · 10e36489
      Chris Wilson authored
      If we skip the reset as we found the engine inactive at the time of the
      reset, we still need to clear the residual inflight & pending request
      bookkeeping to reflect the current state of HW.
      
      Otherwise, we may end up stuck in a loop like:
      
      <7> [416.490346] hangcheck rcs0
      <7> [416.490371] hangcheck 	Awake? 1
      <7> [416.490376] hangcheck 	Hangcheck: 8003 ms ago
      <7> [416.490380] hangcheck 	Reset count: 0 (global 0)
      <7> [416.490383] hangcheck 	Requests:
      <7> [416.491210] hangcheck 	RING_START: 0x0017b000
      <7> [416.491983] hangcheck 	RING_HEAD:  0x00000048
      <7> [416.491992] hangcheck 	RING_TAIL:  0x00000048
      <7> [416.492006] hangcheck 	RING_CTL:   0x00000000
      <7> [416.492037] hangcheck 	RING_MODE:  0x00000200 [idle]
      <7> [416.492044] hangcheck 	RING_IMR: 00000000
      <7> [416.492809] hangcheck 	ACTHD:  0x00000000_9ca00048
      <7> [416.492824] hangcheck 	BBADDR: 0x00000000_00001004
      <7> [416.492838] hangcheck 	DMA_FADDR: 0x00000000_00000000
      <7> [416.492845] hangcheck 	IPEIR: 0x00000000
      <7> [416.492852] hangcheck 	IPEHR: 0x00000000
      <7> [416.492863] hangcheck 	Execlist status: 0x00018001 00000000, entries 12
      <7> [416.492869] hangcheck 	Execlist CSB read 1, write 1, tasklet queued? no (enabled)
      <7> [416.492938] hangcheck 		Pending[0] ring:{start:0017b000, hwsp:fedf9000, seqno:00016fd6}, rq:  20ffa:16fd6!+  prio=-4094 @ 8307ms: signaled
      <7> [416.492972] hangcheck 		Queue priority hint: -4093
      <7> [416.492979] hangcheck 		Q  20ffa:16fd8-  prio=-4093 @ 8307ms: [i915]
      <7> [416.492985] hangcheck 		Q  20ffa:16fda  prio=-4094 @ 8307ms: [i915]
      <7> [416.492990] hangcheck 		Q  20ffa:16fdc  prio=-4094 @ 8307ms: [i915]
      <7> [416.492996] hangcheck 		Q  20ffa:16fde  prio=-4094 @ 8307ms: [i915]
      <7> [416.493001] hangcheck 		Q  20ffa:16fe0  prio=-4094 @ 8307ms: [i915]
      <7> [416.493007] hangcheck 		Q  20ffa:16fe2  prio=-4094 @ 8307ms: [i915]
      <7> [416.493013] hangcheck 		Q  20ffa:16fe4  prio=-4094 @ 8307ms: [i915]
      <7> [416.493021] hangcheck 		...skipping 21 queued requests...
      <7> [416.493027] hangcheck 		Q  20ffa:17010  prio=-4094 @ 8307ms: [i915]
      <7> [416.493081] hangcheck HWSP:
      <7> [416.493089] hangcheck [0000] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      <7> [416.493094] hangcheck *
      <7> [416.493100] hangcheck [0040] 10008002 00000000 10000018 00000000 10000018 00000000 10000001 00000000
      <7> [416.493106] hangcheck [0060] 10000018 00000000 10000001 00000000 10000018 00000000 10000001 00000000
      <7> [416.493111] hangcheck *
      <7> [416.493117] hangcheck [00a0] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000001
      <7> [416.493123] hangcheck [00c0] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      <7> [416.493127] hangcheck *
      <7> [416.493132] hangcheck Idle? no
      <6> [416.512124] i915 0000:00:02.0: GPU HANG: ecode 11:0:0x00000000, hang on rcs0
      <6> [416.512205] [drm] GPU hangs can indicate a bug anywhere in the entire gfx stack, including userspace.
      <6> [416.512207] [drm] Please file a _new_ bug report on bugs.freedesktop.org against DRI -> DRM/Intel
      <6> [416.512208] [drm] drm/i915 developers can then reassign to the right component if it's not a kernel issue.
      <6> [416.512210] [drm] The gpu crash dump is required to analyze gpu hangs, so please always attach it.
      <6> [416.512212] [drm] GPU crash dump saved to /sys/class/drm/card0/error
      <5> [416.513602] i915 0000:00:02.0: Resetting rcs0 for hang on rcs0
      <7> [424.489258] hangcheck rcs0
      <7> [424.489263] hangcheck 	Awake? 1
      <7> [424.489267] hangcheck 	Hangcheck: 5954 ms ago
      <7> [424.489271] hangcheck 	Reset count: 1 (global 0)
      <7> [424.489274] hangcheck 	Requests:
      <7> [424.490128] hangcheck 	RING_START: 0x00000000
      <7> [424.490870] hangcheck 	RING_HEAD:  0x00000000
      <7> [424.490877] hangcheck 	RING_TAIL:  0x00000000
      <7> [424.490887] hangcheck 	RING_CTL:   0x00000000
      <7> [424.490897] hangcheck 	RING_MODE:  0x00000200 [idle]
      <7> [424.490904] hangcheck 	RING_IMR: 00000000
      <7> [424.490917] hangcheck 	ACTHD:  0x00000000_00000000
      <7> [424.490930] hangcheck 	BBADDR: 0x00000000_00000000
      <7> [424.490943] hangcheck 	DMA_FADDR: 0x00000000_00000000
      <7> [424.490950] hangcheck 	IPEIR: 0x00000000
      <7> [424.490956] hangcheck 	IPEHR: 0x00000000
      <7> [424.490968] hangcheck 	Execlist status: 0x00000001 00000000, entries 12
      <7> [424.490972] hangcheck 	Execlist CSB read 11, write 11, tasklet queued? no (enabled)
      <7> [424.490983] hangcheck 		Pending[0] ring:{start:0017b000, hwsp:fedf9000, seqno:00016fd6}, rq:  20ffa:16fd6!+  prio=-4094 @ 16305ms: signaled
      <7> [424.490989] hangcheck 		Queue priority hint: -4093
      <7> [424.490996] hangcheck 		Q  20ffa:16fd8-  prio=-4093 @ 16305ms: [i915]
      <7> [424.491001] hangcheck 		Q  20ffa:16fda  prio=-4094 @ 16305ms: [i915]
      <7> [424.491006] hangcheck 		Q  20ffa:16fdc  prio=-4094 @ 16305ms: [i915]
      <7> [424.491011] hangcheck 		Q  20ffa:16fde  prio=-4094 @ 16305ms: [i915]
      <7> [424.491016] hangcheck 		Q  20ffa:16fe0  prio=-4094 @ 16305ms: [i915]
      <7> [424.491022] hangcheck 		Q  20ffa:16fe2  prio=-4094 @ 16305ms: [i915]
      <7> [424.491048] hangcheck 		Q  20ffa:16fe4  prio=-4094 @ 16305ms: [i915]
      <7> [424.491057] hangcheck 		...skipping 21 queued requests...
      <7> [424.491063] hangcheck 		Q  20ffa:17010  prio=-4094 @ 16305ms: [i915]
      <7> [424.491095] hangcheck HWSP:
      <7> [424.491102] hangcheck [0000] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      <7> [424.491106] hangcheck *
      <7> [424.491113] hangcheck [0040] 10008002 00000000 10000018 00000000 10000018 00000000 10000001 00000000
      <7> [424.491118] hangcheck [0060] 10000018 00000000 10000001 00000000 10000018 00000000 10000001 00000000
      <7> [424.491122] hangcheck *
      <7> [424.491127] hangcheck [00a0] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0000000b
      <7> [424.491133] hangcheck [00c0] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
      <7> [424.491136] hangcheck *
      <7> [424.491141] hangcheck Idle? no
      <5> [424.491834] i915 0000:00:02.0: Resetting rcs0 for hang on rcs0
      
      Where not having cleared the pending array on reset, it persists
      indefinitely.
      
      Fixes: fff8102a ("drm/i915/execlists: Process interrupted context on reset")
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reviewed-by: default avatarAndi Shyti <andi.shyti@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20190730133035.1977-2-chris@chris-wilson.co.uk
      10e36489
  2. 31 Jul, 2019 11 commits
  3. 30 Jul, 2019 9 commits
  4. 29 Jul, 2019 4 commits
  5. 27 Jul, 2019 1 commit
  6. 26 Jul, 2019 9 commits