1. 11 Dec, 2014 36 commits
  2. 10 Dec, 2014 4 commits
    • Linus Torvalds's avatar
      Merge branch 'timers-2038-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · d8201269
      Linus Torvalds authored
      Pull more 2038 timer work from Thomas Gleixner:
       "Two more patches for the ongoing 2038 work:
      
         - New accessors to clock MONOTONIC and REALTIME seconds
      
        This is a seperate branch as Arnd has follow up work depending on
        this"
      
      * 'timers-2038-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        timekeeping: Provide y2038 safe accessor to the seconds portion of CLOCK_REALTIME
        timekeeping: Provide fast accessor to the seconds part of CLOCK_MONOTONIC
      d8201269
    • Linus Torvalds's avatar
      Merge branch 'x86-mpx-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 3eb5b893
      Linus Torvalds authored
      Pull x86 MPX support from Thomas Gleixner:
       "This enables support for x86 MPX.
      
        MPX is a new debug feature for bound checking in user space.  It
        requires kernel support to handle the bound tables and decode the
        bound violating instruction in the trap handler"
      
      * 'x86-mpx-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
        asm-generic: Remove asm-generic arch_bprm_mm_init()
        mm: Make arch_unmap()/bprm_mm_init() available to all architectures
        x86: Cleanly separate use of asm-generic/mm_hooks.h
        x86 mpx: Change return type of get_reg_offset()
        fs: Do not include mpx.h in exec.c
        x86, mpx: Add documentation on Intel MPX
        x86, mpx: Cleanup unused bound tables
        x86, mpx: On-demand kernel allocation of bounds tables
        x86, mpx: Decode MPX instruction to get bound violation information
        x86, mpx: Add MPX-specific mmap interface
        x86, mpx: Introduce VM_MPX to indicate that a VMA is MPX specific
        x86, mpx: Add MPX to disabled features
        ia64: Sync struct siginfo with general version
        mips: Sync struct siginfo with general version
        mpx: Extend siginfo structure to include bound violation information
        x86, mpx: Rename cfg_reg_u and status_reg
        x86: mpx: Give bndX registers actual names
        x86: Remove arbitrary instruction size limit in instruction decoder
      3eb5b893
    • Linus Torvalds's avatar
      Merge branch 'irq-irqdomain-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · 9e66645d
      Linus Torvalds authored
      Pull irq domain updates from Thomas Gleixner:
       "The real interesting irq updates:
      
         - Support for hierarchical irq domains:
      
           For complex interrupt routing scenarios where more than one
           interrupt related chip is involved we had no proper representation
           in the generic interrupt infrastructure so far.  That made people
           implement rather ugly constructs in their nested irq chip
           implementations.  The main offenders are x86 and arm/gic.
      
           To distangle that mess we have now hierarchical irqdomains which
           seperate the various interrupt chips and connect them via the
           hierarchical domains.  That keeps the domain specific details
           internal to the particular hierarchy level and removes the
           criss/cross referencing of chip internals.  The resulting hierarchy
           for a complex x86 system will look like this:
      
              vector          mapped: 74
                msi-0         mapped: 2
                dmar-ir-1     mapped: 69
                  ioapic-1    mapped: 4
                  ioapic-0    mapped: 20
                  pci-msi-2   mapped: 45
                dmar-ir-0     mapped: 3
                  ioapic-2    mapped: 1
                  pci-msi-1   mapped: 2
                htirq         mapped: 0
      
           Neither ioapic nor pci-msi know about the dmar interrupt remapping
           between themself and the vector domain.  If interrupt remapping is
           disabled ioapic and pci-msi become direct childs of the vector
           domain.
      
           In hindsight we should have done that years ago, but in hindsight
           we always know better :)
      
         - Support for generic MSI interrupt domain handling
      
           We have more and more non PCI related MSI interrupts, so providing
           a generic infrastructure for this is better than having all
           affected architectures implementing their own private hacks.
      
         - Support for PCI-MSI interrupt domain handling, based on the generic
           MSI support.
      
           This part carries the pci/msi branch from Bjorn Helgaas pci tree to
           avoid a massive conflict.  The PCI/MSI parts are acked by Bjorn.
      
        I have two more branches on top of this.  The full conversion of x86
        to hierarchical domains and a partial conversion of arm/gic"
      
      * 'irq-irqdomain-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (41 commits)
        genirq: Move irq_chip_write_msi_msg() helper to core
        PCI/MSI: Allow an msi_controller to be associated to an irq domain
        PCI/MSI: Provide mechanism to alloc/free MSI/MSIX interrupt from irqdomain
        PCI/MSI: Enhance core to support hierarchy irqdomain
        PCI/MSI: Move cached entry functions to irq core
        genirq: Provide default callbacks for msi_domain_ops
        genirq: Introduce msi_domain_alloc/free_irqs()
        asm-generic: Add msi.h
        genirq: Add generic msi irq domain support
        genirq: Introduce callback irq_chip.irq_write_msi_msg
        genirq: Work around __irq_set_handler vs stacked domains ordering issues
        irqdomain: Introduce helper function irq_domain_add_hierarchy()
        irqdomain: Implement a method to automatically call parent domains alloc/free
        genirq: Introduce helper irq_domain_set_info() to reduce duplicated code
        genirq: Split out flow handler typedefs into seperate header file
        genirq: Add IRQ_SET_MASK_OK_DONE to support stacked irqchip
        genirq: Introduce irq_chip.irq_compose_msi_msg() to support stacked irqchip
        genirq: Add more helper functions to support stacked irq_chip
        genirq: Introduce helper functions to support stacked irq_chip
        irqdomain: Do irq_find_mapping and set_type for hierarchy irqdomain in case OF
        ...
      9e66645d
    • Linus Torvalds's avatar
      Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · ecb50f0a
      Linus Torvalds authored
      Pull irq core updates from Thomas Gleixner:
       "This is the first (boring) part of irq updates:
      
         - support for big endian I/O accessors in the generic irq chip
      
         - cleanup of brcmstb/bcm7120 drivers so they can be reused for non
           ARM SoCs
      
         - the usual pile of fixes and updates for the various ARM irq chips"
      
      * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (25 commits)
        irqchip: dw-apb-ictl: Add PM support
        irqchip: dw-apb-ictl: Enable IRQ_GC_MASK_CACHE_PER_TYPE
        irqchip: dw-apb-ictl: Always use use {readl|writel}_relaxed
        ARM: orion: convert the irq_reg_{readl,writel} calls to the new API
        irqchip: atmel-aic: Add missing entry for rm9200 irq fixups
        irqchip: atmel-aic: Rename at91sam9_aic_irq_fixup for naming consistency
        irqchip: atmel-aic: Add specific irq fixup function for sam9g45 and sam9rl
        irqchip: atmel-aic: Add irq fixups for at91sam926x SoCs
        irqchip: atmel-aic: Add irq fixup for RTT block
        irqchip: brcmstb-l2: Convert driver to use irq_reg_{readl,writel}
        irqchip: bcm7120-l2: Convert driver to use irq_reg_{readl,writel}
        irqchip: bcm7120-l2: Decouple driver from brcmstb-l2
        irqchip: bcm7120-l2: Extend driver to support 64+ bit controllers
        irqchip: bcm7120-l2: Use gc->mask_cache to simplify suspend/resume functions
        irqchip: bcm7120-l2: Fix missing nibble in gc->unused mask
        irqchip: bcm7120-l2: Make sure all register accesses use base+offset
        irqchip: bcm7120-l2, brcmstb-l2: Remove ARM Kconfig dependency
        irqchip: bcm7120-l2: Eliminate bad IRQ check
        irqchip: brcmstb-l2: Eliminate dependency on ARM code
        genirq: Generic chip: Add big endian I/O accessors
        ...
      ecb50f0a