- 09 Jul, 2018 8 commits
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Rafael David Tinoco authored
Following logic from commit: 22f6592b, GPIOHANDLE_REQUEST_OUTPUT should handle errors same way as GPIOHANDLE_REQUEST_INPUT does, or else the following error occurs: gpio-mockup-chardev: gpio<gpiochip1> line<0> test flag<0x2> value<0>: No such file or directory despite the real result of gpio_pin_test(), gpio_debugfs_get() and gpiotools_request_linehandle() functions. Signed-off-by: Rafael David Tinoco <rafael.tinoco@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Janusz Krzysztofik authored
Avoid replication of error code conversion in non-DT GPIO consumers' code by returning -EPROBE_DEFER from gpiod_find() in case a chip identified by its label in a registered lookup table is not ready. See https://lkml.org/lkml/2018/5/30/176 for example case. Suggested-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
In case we try to lock GPIO pin as IRQ when something going wrong we print a misleading message. Correct this by checking an error code from ->get_direction() in gpiochip_lock_as_irq() and printing a corresponding message. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Anson Huang authored
Some i.MX SoCs have GPIO clock gate in CCM, accessing GPIO registers needs to enable GPIO clock gate first, i.MX GPIO driver will enable clock gate if there is clock property in GPIO node of dtb, add optional property to i.MX GPIO binding doc. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This fixes some syntactic nits that makes the GPIO maintainer happier. It is way easier to show by example and do it myself than to try to explain it with comments. It's just my personal taste of minimalism. Cc: Sergio Paracuellos <sergio.paracuellos@gmail.com> Cc: NeilBrown <neil@brown.name> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sergio Paracuellos authored
Add driver support for gpio of MT7621 SoC. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: NeilBrown <neil@brown.name> [Switched wording WIDTH to STRIDE] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sergio Paracuellos authored
Add a devicetree binding documentation for the mt7621 gpio. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: NeilBrown <neil@brown.name> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
For easy grepping on debug purposes join string literals back in the messages. While here, fix couple of small indentation issues. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 02 Jul, 2018 27 commits
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Linus Walleij authored
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Benjamin Herrenschmidt authored
On the Aspeed chip, the GPIOs can be under control of the ARM chip or of the ColdFire coprocessor. (There's a third command source, the LPC bus, which we don't use or support yet). The control of which master is allowed to modify a given GPIO is per-bank (8 GPIOs). Unfortunately, systems already exist for which we want to use GPIOs of both sources in the same bank. This provides an API exported by the gpio-aspeed driver that an aspeed coprocessor driver can use to "grab" some GPIOs for use by the coprocessor, and allow the coprocessor driver to provide callbacks for arbitrating access. Once at least one GPIO of a given bank has been "grabbed" by the coprocessor, the entire bank is marked as being under coprocessor control. It's command source is switched to the coprocessor. If the ARM then tries to write to a GPIO in such a marked bank, the provided callbacks are used to request access from the coprocessor driver, which is responsible to doing whatever is necessary to "pause" the coprocessor or prevent it from trying to use the GPIOs while the ARM is doing its accesses. During that time, the command source for the bank is temporarily switched back to the ARM. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Benjamin Herrenschmidt authored
This adds the definitions for the command source registers and a helper to set them. Those registers allow to control which bus master on the SoC is allowed to modify a given bank of GPIOs and will be used by subsequent patches. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Benjamin Herrenschmidt authored
The Aspeed GPIO hardware has a quirk: the value register, for an output GPIO, doesn't contain the last value written (the write latch content) but the sampled input value. This means that when reading back shortly after writing, you can get an incorrect value as the input value is delayed by a few synchronizers. The HW supports a separate read-only register "Data Read Register" which allows you to read the write latch instead. This adds the definition for it, and uses it for the initial population of the GPIO value cache. It will be used more in subsequent patches. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Benjamin Herrenschmidt authored
Use a single accessor function for all register types instead of several spread around. This will make it easier/cleaner to introduce new registers and keep the mechanism in one place. The big switch/case is optimized at compile time since the switch value is a constant. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Baruch Siach authored
Don't warn about missing interrupts support when the parent interrupt is not defined. Enabling interrupts support would not make it work anyway. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
I don't like the __namespace and this is simple enough to just inline at all sites. Cc: Bartosz Golaszewski <brgl@bgdev.pl> Acked-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This removes the custom implementation of the BIT() macro and inlines all calls to the helper. Cc: Bartosz Golaszewski <brgl@bgdev.pl> Acked-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Cc: Bartosz Golaszewski <brgl@bgdev.pl> Acked-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This purely syntactic change switches unsigned char to u8 in the driver. Cc: Bruno Randolf <br1@einfach.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The chip has a bit for controlling open drain, and it is easy to implement the callback to support open drain when needed, so let's implement it. Cc: Bruno Randolf <br1@einfach.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
Bit 0 in the config register obviously controls the direction of the GPIO so instead of hammering 0x0/0x1 into that register, use read-modify-write so that we can also alter the other bits in the register. Cc: Bruno Randolf <br1@einfach.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
It's pretty simple to implement the .get_direction() for this chip, so let's just do it. Cc: Bruno Randolf <br1@einfach.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Cc: Bruno Randolf <br1@einfach.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
It's pretty simple to implement the .get_direction() for this chip, so let's just do it. Cc: Denis Turischev <denis.turischev@compulab.co.il> Cc: Daniel Krueger <daniel.krueger@systec-electronic.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Cc: Denis Turischev <denis.turischev@compulab.co.il> Cc: Daniel Krueger <daniel.krueger@systec-electronic.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mathias Kresin authored
Add an implementation to get the current GPIO state. The callback is used by the leds-gpio driver for example, in case the current LED/GPIO state should be kept during driver load. Signed-off-by: Mathias Kresin <dev@kresin.me> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mikko Perttunen authored
Add support for the Tegra194 GPIO bank configuration. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mikko Perttunen authored
The Tegra194 GPIO controller is similar to the one in Tegra186. Add relevant information to the device tree binding documentation. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 26 Jun, 2018 1 commit
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Geert Uytterhoeven authored
The GPIO subsystem provides dummy GPIO consumer functions if GPIOLIB is not enabled. Hence drivers that depend on GPIOLIB, but use GPIO consumer functionality only, can still be compiled if GPIOLIB is not enabled. Relax the dependency on GPIOLIB if COMPILE_TEST is enabled, where appropriate. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Evgeniy Polyakov <zbr@ioremap.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 18 Jun, 2018 4 commits
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Linus Walleij authored
The GPIO (descriptor) API registers a "label" naming what is currently using the GPIO line. Typically this is taken from things like the device tree node, so "reset-gpios" will result in he line being labeled "reset". The technical effect is pretty much zero: the use is for debug and introspection, such as "lsgpio" and debugfs files. However sometimes the user want this cuddly feeling of listing all GPIO lines and seeing exactly what they are for and it gives a very fulfilling sense of control. Especially in the cases when the device tree node doesn't provide a good name, or anonymous GPIO lines assigned just to "gpios" in the device tree because the usage is implicit. For these cases it may be nice to be able to label the line directly and explicitly. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Zhouyang Jia authored
When i2c_new_dummy fails, the lack of error-handling code may cause unexpected results. This patch adds error-handling code after calling i2c_new_dummy. Signed-off-by: Zhouyang Jia <jiazhouyang09@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Keerthy authored
Currently the driver assumes that the interrupts are continuous and does platform_get_irq only once and assumes the rest are continuous, instead call platform_get_irq for all the interrupts and store them in an array for later use. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Keerthy authored
This is needed in case of PROBE_DEFER if IRQ resource is not yet ready. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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