- 27 Feb, 2010 40 commits
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Florian Fainelli authored
This patch makes the ar7 clock code implement the Linux clk API. Drivers using the various clocks available in the SoC are updated accordingly. Signed-off-by:
Florian Fainelli <florian@openwrt.org> Acked-by:
Wim Van Sebroeck <wim@iguana.be> To: linux-mips@linux-mips.org Cc: Wim Van Sebroeck <wim@iguana.be> Cc: netdev@vger.kernel.org Cc: David Miller <davem@davemloft.net> Patchwork: http://patchwork.linux-mips.org/patch/881/Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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Florian Fainelli authored
This patch implements gpiolib for the AR7 SoC. Signed-off-by:
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Yoichi Yuasa authored
Signed-off-by:
Yoichi Yuasa <yuasa@linux-mips.org> Cc: linux-mips <linux-mips@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/868/Signed-off-by:
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Wu Zhangjin authored
This patch removes a useless "\" (line break) and tunes the format of a long line. Signed-off-by:
Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/869/Signed-off-by:
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Yoichi Yuasa authored
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Yoichi Yuasa authored
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Ralf Baechle authored
Recent git versions now warn about those and they've always been a bit of an annoyance. Signed-off-by: -
Roel Kluin authored
Signed-off-by:
Roel Kluin <roel.kluin@gmail.com> To: linux-mips@linux-mips.org To: Andrew Morton <akpm@linux-foundation.org> To: LKML <linux-kernel@vger.kernel.org> Patchwork: http://patchwork.linux-mips.org/patch/860/Signed-off-by:
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David Daney authored
For processors that have more than 64 TLBs, we need to decode both config1 and config4 to determine the total number TLBs. Signed-off-by:
David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/866/Signed-off-by:
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David Daney authored
The function probe_tlb() only does anything for processors that are not PRID_COMP_LEGACY. This is precisely the set of processors for which decode_configs() is called to do identical tlbsize probing calculations. Therefore probe_tlb() is completely redundant and may be removed. Signed-off-by:
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Florian Fainelli authored
MIPS currently lacks the readl_be and writel_be accessors which are required by BCM63xx for OHCI and EHCI support. Let's define them globally for MIPS. This also fixes the compilation of the bcm63xx defconfig against USB. Signed-off-by:
Florian Fainelli <ffainelli@freebox.fr> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: linux-mips@linux-mips.org Cc: Maxime Bizon <mbizon@freebox.fr> Patchwork: http://patchwork.linux-mips.org/patch/793/Signed-off-by:
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Wu Zhangjin authored
Changes: o Serial port related configuration Disable EARLY_PRINTK, CONFIG_SYS_SUPPORTS_ZBOOT_UART16550 Enable the serial port support as module. o PM related support Enable CPUFreq as module, use the external timer(MFGPT) instead of r4k timer. Enable Suspend support Enable Run Time PM support o Enable SM7XX Video Driver Disable the buggy 2d acceleration o Enable CONFIG_OPROFILE as module o Use GZIP instead of LZMA, which need less decompression time o Enable more USB devices support o Enable initrd support(needed by gNewsense) o Enable more crypto support Signed-off-by: -
Wu Zhangjin authored
Currently wuzj@lemote.com is not usable; change it to wuzhangjin@gmail.com. Signed-off-by:
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Wu Zhangjin authored
Replace whitespace by tabs. Signed-off-by:
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Wu Zhangjin authored
This patch add missing whitespace after every "+=" in the loongson related part of arch/mips/Makefile. Signed-off-by:
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Wu Zhangjin authored
Changes: o Move bus_clock into prom_init_env() o Initialize the cpu_clock_freq to the default values for the correspoding processor revisions if no such environment variable passed by BIOS/Bootloader. Signed-off-by:
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Wu Zhangjin authored
prom_argc and prom_argv are only used by prom_init_cmdline(), move them into the function. Signed-off-by:
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Wu Zhangjin authored
The compressed kernel support on loongson family machines is stable now, so, remove the debug information via using SYS_SUPPORTS_ZBOOT instead of SYS_SUPPORTS_ZBOOT_UART16550. This may reduce the image size and speedup the booting. Signed-off-by:
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Wu Zhangjin authored
Use the new unreachable() macro instead of while(1); Signed-off-by:
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Wu Zhangjin authored
Without this patch, when copying large amounts of data between the USB storage devices and the hard disk, the USB device will disconnect regularly. Signed-off-by:
Hu Hongbing <huhb@lemote.com> Signed-off-by:
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Wu Zhangjin authored
Lemote have used the PMON_VER strings to indicate the loongson-2f machine series: PMON_VER=LM8089 Lemote 8.9'' netbook LM8101 Lemote 10.1'' netbook (The above two netbooks have the same kernel support) LM6XXX Lemote FuLoong(2F) box series LM9XXX Lemote LynLoong PC series Before the machtype is supported by the PMON, we can get the machine type from the PMON_VER for these machines, this will help the users a lot. Signed-off-by:
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David Daney authored
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David Daney authored
Octeon ethernet hardware can handle NETIF_F_SG, so we enable it. A gather list of up to six fragments will fit in the SKB's CB structure, so no extra memory is required. If a SKB has more than six fragments, we must linearize it. Signed-off-by:
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David Daney authored
Convert the driver to be a reasonably well behaved NAPI citizen. There is one NAPI instance per CPU shared between all input ports. As receive backlog increases, NAPI is scheduled on additional CPUs. Receive buffer refill code factored out so it can also be called from the periodic timer. This is needed to recover from temporary buffer starvation conditions. Signed-off-by:
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David Daney authored
Stop the queue if too many packets are queued. Restart it from a high resolution timer. Rearrange and simplify locking and SKB freeing code Signed-off-by:
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David Daney authored
After aligning the blocks returned by kmalloc, we need to save the original pointer so they can be correctly freed. There are no guarantees about the alignment of SKB data, so we need to handle worst case alignment. Since right shifts over subtraction have no distributive property, we need to fix the back pointer calculation. Signed-off-by:
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David Daney authored
Remove unused code, reindent, and join some spilt strings. Signed-off-by:
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David Daney authored
If an interrupt handler disables interrupts, the EOI function will just reenable them. This will put us in an endless loop when the upcoming Ethernet driver patches are applied. Only reenable the interrupt on EOI if it is not IRQ_DISABLED. This requires that the EOI function be separate from the ENABLE function. We also rename the ACK functions to correspond with their function. Signed-off-by:
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David Daney authored
In order to achieve correct synchronization semantics, the Octeon port had defined CONFIG_WEAK_REORDERING_BEYOND_LLSC. This resulted in code that looks like: sync ll ... . . . sc ... . . sync The second SYNC was redundant, but harmless. Octeon has a SYNCW instruction that acts as a write-memory-barrier (due to an erratum in some parts two SYNCW are used). It is much faster than SYNC because it imposes ordering on the writes, but doesn't otherwise stall the execution pipeline. On Octeon, SYNC stalls execution until all preceeding writes are committed to the coherent memory system. Using: syncw;syncw ll . . . sc . . Has identical semantics to the first sequence, but is much faster. The SYNCW orders the writes, and the SC will not complete successfully until the write is committed to the coherent memory system. So at the end all preceeding writes have been committed. Since Octeon does not do speculative reads, this functions as a full barrier. The patch removes CONFIG_WEAK_REORDERING_BEYOND_LLSC, and substitutes SYNCW for SYNC in write-memory-barriers. Signed-off-by: -
David Daney authored
Replace some instances of smp_llsc_mb() with a new macro smp_mb__before_llsc(). It is used before ll/sc sequences that are documented as needing write barrier semantics. The default implementation of smp_mb__before_llsc() is just smp_llsc_mb(), so there are no changes in semantics. Also simplify definition of smp_mb(), smp_rmb(), and smp_wmb() to be just barrier() in the non-SMP case. Signed-off-by:
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David Daney authored
The smp_llsc_rmb() and smp_llsc_wmb() macros are not used in the tree, remove them. Signed-off-by:
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David Daney authored
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Rade Bozic authored
Signed-off-by:
Rade Bozic <rade.bozic.ext@nsn.com> Signed-off-by:
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David Daney authored
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Robert P. J. Day authored
Signed-off-by:
Robert P. J. Day <rpjday@crashcourse.ca> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/810/Signed-off-by:
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Manuel Lauss authored
Implement reset / poweroff in the board code instead. The peripheral reset code is gone too since YAMON which all in-tree boards use does the same work when it boots. Signed-off-by:
Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by:
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David Daney authored
For 64-bit kernels with 64KB pages and two level page tables, there are 42 bits worth of virtual address space This is larger than the 40 bits of virtual address space obtained with the default 4KB Page size and three levels, so there are no draw backs for using two level tables with this configuration. Signed-off-by:
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Manuel Lauss authored
Use runtime CPU detection instead of relying on preprocessor symbols. Signed-off-by:
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Manuel Lauss authored
Use the GPIO config symbol to only build Au1000 interrupt code on chips with compatible hw. Signed-off-by:
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Manuel Lauss authored
Remove the cpu subtype cpp macros in favor of runtime detection, to improve compile coverage of the alchemy common code. (Increases kernel size by 700 bytes). Signed-off-by:
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