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  1. 26 Aug, 2017 2 commits
  3. 05 Jun, 2017 1 commit
  5. 13 Mar, 2017 1 commit
  7. 07 Mar, 2017 1 commit
  9. 30 Jan, 2017 1 commit
  11. 08 Jan, 2017 1 commit
  13. 05 Jan, 2017 1 commit
  15. 27 Dec, 2016 1 commit
  17. 05 Dec, 2016 1 commit
  19. 18 Oct, 2016 1 commit
  21. 15 Oct, 2016 1 commit
    • Ard Biesheuvel's avatar
      r8169: set coherent DMA mask as well as streaming DMA mask · f0076436
      Ard Biesheuvel authored 
      PCI devices that are 64-bit DMA capable should set the coherent
DMA mask as well as the streaming DMA mask. On some architectures,
these are managed separately, and so the coherent DMA mask will be
left at its default value of 32 if it is not set explicitly. This
results in errors such as

     r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
     hwdev DMA mask = 0x00000000ffffffff, dev_addr = 0x00000080fbfff000
     swiotlb: coherent allocation failed for device 0000:02:00.0 size=4096
     CPU: 0 PID: 1062 Comm: systemd-udevd Not tainted 4.8.0+ #35
     Hardware name: AMD Seattle/Seattle, BIOS 10:53:24 Oct 13 2016

on systems without memory that is 32-bit addressable by PCI devices.
Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: default avatarFrancois Romieu <romieu@fr.zoreil.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      f0076436
  23. 01 Aug, 2016 3 commits
  25. 17 May, 2016 1 commit
    • Ard Biesheuvel's avatar
      r8169: default to 64-bit DMA on recent PCIe chips · 27896c83
      Ard Biesheuvel authored 
      The current logic around the 'use_dac' module parameter prevents the
r81969 driver from being loadable on 64-bit systems without any RAM
below 4 GB when the parameter is left at its default value.

So introduce a new default value -1 which indicates that 64-bit DMA
should be enabled on sufficiently recent PCIe chips, i.e., versions
RTL_GIGA_MAC_VER_18 or later. Explicit param values of 0 or 1 retain
the existing behavior of unconditionally enabling/disabling 64-bit DMA
on 64-bit architectures (i.e., regardless of the type and version of the
chip)

Since PCIe chips do not need to CPlusCmd Dual Address Cycle to be set,
make that conditional on the device type as well.

Cc: Realtek linux nic maintainers <nic_swsd@realtek.com>
Signed-off-by: default avatarArd Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      27896c83
  27. 14 Mar, 2016 1 commit
  29. 02 Mar, 2016 1 commit
  31. 25 Feb, 2016 1 commit
  33. 13 Feb, 2016 1 commit
  35. 04 Jan, 2016 3 commits
  37. 28 Dec, 2015 2 commits
  39. 12 Nov, 2015 1 commit
  41. 27 Sep, 2015 1 commit
  43. 10 Sep, 2015 1 commit
  45. 28 Aug, 2015 1 commit
    • Corinna Vinschen's avatar
      r8169: Add software counter for multicast packages · d7d2d89d
      Corinna Vinschen authored 
      The multicast hardware counter on 8168/8111 chips is only 32 bit while the
statistics in struct rtnl_link_stats64 are 64 bit.  Given that statistics
are requested on an irregular basis, an overflow of the hardware counter
can go unnoticed.  To count even very large numbers of multicast packets
reliably, add a software counter and remove previously applied code to
fill the multicast field requested by @rtl8169_get_stats64 with the values
read from the rx_multicast hardware counter.
Signed-off-by: default avatarCorinna Vinschen <vinschen@redhat.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d7d2d89d
  47. 25 Aug, 2015 1 commit
    • Corinna Vinschen's avatar
      r8169: Add values missing in @get_stats64 from HW counters · 6e85d5ad
      Corinna Vinschen authored 
      The r8169 driver collects statistical information returned by
@get_stats64 by counting them in the driver itself, even though many
(but not all) of the values are already collected by tally counters
(TCs) in the NIC.  Some of these TC values are not returned by
@get_stats64.  Especially the received multicast packages are missing
from /proc/net/dev.

Rectify this by fetching the TCs and returning them from
rtl8169_get_stats64.

The counters collected in the driver obviously disappear as soon as the
driver is unloaded so after a driver is loaded the counters always start
at 0. The TCs on the other hand are only reset by a power cycle.  Without
further considerations the values collected by the driver would not match
up against the TC values.

This patch introduces a new function rtl8169_reset_counters which
resets the TCs.  Also, since rtl8169_reset_counters shares most of
its code with rtl8169_update_counters, refactor the shared code into
two new functions  rtl8169_map_counters and rtl8169_unmap_counters.

Unfortunately chip versions prior to RTL_GIGA_MAC_VER_19 don't allow
to reset the TCs programatically.  Therefore introduce an addition to
the rtl8169_private struct and a function rtl8169_init_counter_offsets
to store the TCs at first rtl_open.  Use these values as offsets in
rtl8169_get_stats64.  Propagate a failure to reset *and* update the
counters up to rtl_open and emit a warning message, if so.
Signed-off-by: default avatarCorinna Vinschen <vinschen@redhat.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6e85d5ad
  49. 07 Aug, 2015 1 commit
  51. 04 May, 2015 1 commit
  53. 24 Feb, 2015 1 commit
  55. 22 Feb, 2015 1 commit
    • David S. Miller's avatar
      r8169: Revert BQL and xmit_more support. · 87cda7cb
      David S. Miller authored 
      There are certain regressions which are pointing to
these two commits which we are having a hard time
resolving.  So revert them for now.

Specifically this reverts:

	commit 0bec3b70
	Author: Florian Westphal <fw@strlen.de>
	Date:   Wed Jan 7 10:49:49 2015 +0100

	    r8169: add support for xmit_more

and

	commit 1e918876
	Author: Florian Westphal <fw@strlen.de>
	Date:   Wed Oct 1 13:38:03 2014 +0200

	    r8169: add support for Byte Queue Limits

There were some attempts by Eric Dumazet to address some obvious
problems in the TX flow, to see if they would fix the problems,
but none of them seem to help for the regression reporters.
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      87cda7cb
  57. 27 Jan, 2015 1 commit
  59. 13 Jan, 2015 1 commit
  61. 09 Jan, 2015 1 commit
  63. 12 Dec, 2014 2 commits
    • Chun-Hao Lin's avatar
      r8169:update rtl8168g pcie ephy parameter · 5fbea337
      Chun-Hao Lin authored 
      Add ephy parameter to rtl8168g.
Also change the common function of rtl8168g from "rtl_hw_start_8168g_1" to
 "rtl_hw_start_8168g". And function "rtl_hw_start_8168g_1" is used for
setting rtl8168g hardware parameters.

Following is the explanation of what hardware parameter change for.
rtl8168g may erroneous judge the PCIe signal quality and show the error bit
on PCI configuration space when in PCIe low power mode.
The following ephy parameters are for above issue.
{ 0x00, 0x0000,	0x0008 }
{ 0x0c, 0x37d0,	0x0820 }
{ 0x1e, 0x0000,	0x0001 }

rtl8168g may return to PCIe L0 from PCIe L0s low power mode too slow.
The following ephy parameter is for above issue.
{ 0x19, 0x8000,	0x0000 }
Signed-off-by: default avatarChunhao Lin <hau@realtek.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      5fbea337
    • Alexander Duyck's avatar
      r8169: Use dma_rmb() and dma_wmb() for DescOwn checks · a0750138
      Alexander Duyck authored 
      The r8169 use a pair of wmb() calls when setting up the descriptor rings.
The first is to synchronize the descriptor data with the descriptor status,
and the second is to synchronize the descriptor status with the use of the
MMIO doorbell to notify the device that descriptors are ready.  This can
come at a heavy price on some systems, and is not really necessary on
systems such as x86 as a simple barrier() would suffice to order store/store
accesses.  As such we can replace the first memory barrier with
dma_wmb() to reduce the cost for these accesses.

In addition the r8169 uses a rmb() to prevent compiler optimization in the
cleanup paths, however by moving the barrier down a few lines and replacing
it with a dma_rmb() we should be able to use it to guarantee
descriptor accesses do not occur until the device has updated the DescOwn
bit from its end.

One last change I made is to move the update of cur_tx in the xmit path to
after the wmb.  This way we can guarantee the device and all CPUs should
see the DescOwn update before they see the cur_tx value update.

Cc: Realtek linux nic maintainers <nic_swsd@realtek.com>
Cc: Francois Romieu <romieu@fr.zoreil.com>
Signed-off-by: default avatarAlexander Duyck <alexander.h.duyck@redhat.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a0750138
  65. 10 Dec, 2014 1 commit
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