1. 10 Sep, 2020 3 commits
    • Ahmed S. Darwish's avatar
      seqlock: Introduce seqcount_latch_t · 80793c34
      Ahmed S. Darwish authored
      Latch sequence counters are a multiversion concurrency control mechanism
      where the seqcount_t counter even/odd value is used to switch between
      two copies of protected data. This allows the seqcount_t read path to
      safely interrupt its write side critical section (e.g. from NMIs).
      
      Initially, latch sequence counters were implemented as a single write
      function above plain seqcount_t: raw_write_seqcount_latch(). The read
      side was expected to use plain seqcount_t raw_read_seqcount().
      
      A specialized latch read function, raw_read_seqcount_latch(), was later
      added. It became the standardized way for latch read paths.  Due to the
      dependent load, it has one read memory barrier less than the plain
      seqcount_t raw_read_seqcount() API.
      
      Only raw_write_seqcount_latch() and raw_read_seqcount_latch() should be
      used with latch sequence counters. Having *unique* read and write path
      APIs means that latch sequence counters are actually a data type of
      their own -- just inappropriately overloading plain seqcount_t.
      
      Introduce seqcount_latch_t. This adds type-safety and ensures that only
      the correct latch-safe APIs are to be used.
      
      Not to break bisection, let the latch APIs also accept plain seqcount_t
      or seqcount_raw_spinlock_t. After converting all call sites to
      seqcount_latch_t, only that new data type will be allowed.
      
      References: 9b0fd802 ("seqcount: Add raw_write_seqcount_latch()")
      References: 7fc26327 ("seqlock: Introduce raw_read_seqcount_latch()")
      References: aadd6e5c ("time/sched_clock: Use raw_read_seqcount_latch()")
      Signed-off-by: default avatarAhmed S. Darwish <a.darwish@linutronix.de>
      Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Link: https://lkml.kernel.org/r/20200827114044.11173-4-a.darwish@linutronix.de
      80793c34
    • Ahmed S. Darwish's avatar
      mm/swap: Do not abuse the seqcount_t latching API · 6446a513
      Ahmed S. Darwish authored
      Commit eef1a429 ("mm/swap.c: piggyback lru_add_drain_all() calls")
      implemented an optimization mechanism to exit the to-be-started LRU
      drain operation (name it A) if another drain operation *started and
      finished* while (A) was blocked on the LRU draining mutex.
      
      This was done through a seqcount_t latch, which is an abuse of its
      semantics:
      
        1. seqcount_t latching should be used for the purpose of switching
           between two storage places with sequence protection to allow
           interruptible, preemptible, writer sections. The referenced
           optimization mechanism has absolutely nothing to do with that.
      
        2. The used raw_write_seqcount_latch() has two SMP write memory
           barriers to insure one consistent storage place out of the two
           storage places available. A full memory barrier is required
           instead: to guarantee that the pagevec counter stores visible by
           local CPU are visible to other CPUs -- before loading the current
           drain generation.
      
      Beside the seqcount_t API abuse, the semantics of a latch sequence
      counter was force-fitted into the referenced optimization. What was
      meant is to track "generations" of LRU draining operations, where
      "global lru draining generation = x" implies that all generations
      0 < n <= x are already *scheduled* for draining -- thus nothing needs
      to be done if the current generation number n <= x.
      
      Remove the conceptually-inappropriate seqcount_t latch usage. Manually
      implement the referenced optimization using a counter and SMP memory
      barriers.
      
      Note, while at it, use the non-atomic variant of cpumask_set_cpu(),
      __cpumask_set_cpu(), due to the already existing mutex protection.
      Signed-off-by: default avatarAhmed S. Darwish <a.darwish@linutronix.de>
      Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Link: https://lkml.kernel.org/r/87y2pg9erj.fsf@vostro.fn.ogness.net
      6446a513
    • Ahmed S. Darwish's avatar
      time/sched_clock: Use raw_read_seqcount_latch() during suspend · 58faf20a
      Ahmed S. Darwish authored
      sched_clock uses seqcount_t latching to switch between two storage
      places protected by the sequence counter. This allows it to have
      interruptible, NMI-safe, seqcount_t write side critical sections.
      
      Since 7fc26327 ("seqlock: Introduce raw_read_seqcount_latch()"),
      raw_read_seqcount_latch() became the standardized way for seqcount_t
      latch read paths. Due to the dependent load, it has one read memory
      barrier less than the currently used raw_read_seqcount() API.
      
      Use raw_read_seqcount_latch() for the suspend path.
      
      Commit aadd6e5c ("time/sched_clock: Use raw_read_seqcount_latch()")
      missed changing that instance of raw_read_seqcount().
      
      References: 1809bfa4 ("timers, sched/clock: Avoid deadlock during read from NMI")
      Signed-off-by: default avatarAhmed S. Darwish <a.darwish@linutronix.de>
      Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
      Link: https://lkml.kernel.org/r/20200715092345.GA231464@debian-buster-darwi.lab.linutronix.de
      58faf20a
  2. 26 Aug, 2020 35 commits
  3. 23 Aug, 2020 2 commits
    • Linus Torvalds's avatar
      Linux 5.9-rc2 · d012a719
      Linus Torvalds authored
      d012a719
    • Linus Torvalds's avatar
      Merge tag 'powerpc-5.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux · cb957121
      Linus Torvalds authored
      Pull powerpc fixes from Michael Ellerman:
      
       - Add perf support for emitting extended registers for power10.
      
       - A fix for CPU hotplug on pseries, where on large/loaded systems we
         may not wait long enough for the CPU to be offlined, leading to
         crashes.
      
       - Addition of a raw cputable entry for Power10, which is not required
         to boot, but is required to make our PMU setup work correctly in
         guests.
      
       - Three fixes for the recent changes on 32-bit Book3S to move modules
         into their own segment for strict RWX.
      
       - A fix for a recent change in our powernv PCI code that could lead to
         crashes.
      
       - A change to our perf interrupt accounting to avoid soft lockups when
         using some events, found by syzkaller.
      
       - A change in the way we handle power loss events from the hypervisor
         on pseries. We no longer immediately shut down if we're told we're
         running on a UPS.
      
       - A few other minor fixes.
      
      Thanks to Alexey Kardashevskiy, Andreas Schwab, Aneesh Kumar K.V, Anju T
      Sudhakar, Athira Rajeev, Christophe Leroy, Frederic Barrat, Greg Kurz,
      Kajol Jain, Madhavan Srinivasan, Michael Neuling, Michael Roth,
      Nageswara R Sastry, Oliver O'Halloran, Thiago Jung Bauermann,
      Vaidyanathan Srinivasan, Vasant Hegde.
      
      * tag 'powerpc-5.9-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
        powerpc/perf/hv-24x7: Move cpumask file to top folder of hv-24x7 driver
        powerpc/32s: Fix module loading failure when VMALLOC_END is over 0xf0000000
        powerpc/pseries: Do not initiate shutdown when system is running on UPS
        powerpc/perf: Fix soft lockups due to missed interrupt accounting
        powerpc/powernv/pci: Fix possible crash when releasing DMA resources
        powerpc/pseries/hotplug-cpu: wait indefinitely for vCPU death
        powerpc/32s: Fix is_module_segment() when MODULES_VADDR is defined
        powerpc/kasan: Fix KASAN_SHADOW_START on BOOK3S_32
        powerpc/fixmap: Fix the size of the early debug area
        powerpc/pkeys: Fix build error with PPC_MEM_KEYS disabled
        powerpc/kernel: Cleanup machine check function declarations
        powerpc: Add POWER10 raw mode cputable entry
        powerpc/perf: Add extended regs support for power10 platform
        powerpc/perf: Add support for outputting extended regs in perf intr_regs
        powerpc: Fix P10 PVR revision in /proc/cpuinfo for SMT4 cores
      cb957121