- 14 Apr, 2015 13 commits
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Ben Skeggs authored
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
User-space use mappable BOs notably for fences, and expects that a value update by the GPU will be immediatly visible through the user-space mapping. ARM has a property that may prevent this from happening though: memory can be mapped multiple times only if the different mappings share the same caching properties. However all the lowmem memory is already identity-mapped into the kernel with cache enabled, so when user-space requests an uncached mapping, we actually get an "undefined caching policy" one and this has strange side-effects described on Freedesktop bug 86690. To prevent this from happening, allow user-space to explicitly specify which objects should be coherent, and create such objects with the TTM_PL_FLAG_UNCACHED flag. This will make TTM allocate memory using the DMA API, which will fix the identify mapping and allow us to safely map the objects to user-space uncached. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Let GK20A's instmem take advantage of the IOMMU if it is present. Having an IOMMU means that instmem is no longer allocated using the DMA API, but instead obtained through page_alloc and made contiguous to the GPU by IOMMU mappings. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Tegra SoCs have an IOMMU that can be used to present non-contiguous physical memory as contiguous to the GPU and maximize the use of large pages in the GPU MMU, leading to performance gains. This patch adds support for probing such a IOMMU if present and make its properties available in the nouveau_platform_gpu structure so subsystems can take advantage of it. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
instmem for GK20A is allocated using dma_alloc_coherent(), which provides us with a coherent CPU mapping that we never use because instmem objects are accessed through PRAMIN. Switch to dma_alloc_attrs() which gives us the option to dismiss that CPU mapping and free up some CPU virtual space. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Now that Nouveau can operate even when there is no RAM device, remove the dummy one used by GK20A. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
GK20A does not have dedicated RAM, thus having a RAM device for it does not make sense. Move the contiguous physical memory allocation to instmem. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Alexandre Courbot authored
Having a RAM device does not make sense for chips like GK20A which have no dedicated video memory. The dummy RAM device that we used so far works as a temporary band-aid, but in the longer term it is desirable for the driver to be able to work without any kind of VRAM. This patch adds a few conditionals in places where a RAM device was assumed to be present and allows some more objects to be allocated from the TT domain, allowing Nouveau to handle GPUs for which pfb->ram == NULL. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Lauri Peltonen authored
Notify interrupt is only used for cyclestats. We can just clear it and avoid an "unknown stat" error that gets printed to dmesg otherwise. Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Lauri Peltonen authored
Other methods in this file suggest this is the correct way to retrieve the engine pointer. Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
We use -1 to mean "not read from hw yet" Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Dan Carpenter authored
This if statement is correct but it wasn't indented, so it looked like some code was missing. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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Martin Peres authored
Spotted by coccinelle: drivers/gpu/drm/nouveau/core/subdev/fuse/gm107.c:50:5-8: WARNING: end returns can be simpified Signed-off-by: Martin Peres <martin.peres@free.fr> Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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- 13 Apr, 2015 21 commits
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git://git.pengutronix.de/git/pza/linuxDave Airlie authored
imx-drm changes to use media bus formats and LDB drm_panel support - Add media bus formats needed by imx-drm - Switch to use media bus formats to describe the pixel format on the internal parallel bus between display interface and encoders - Some preparations for TV Output via TVEv2 on i.MX5 - Add drm_panel support to the i.MX LVDS driver, allow to determine the bus pixel format from the panel descriptor. * tag 'imx-drm-next-2015-03-31' of git://git.pengutronix.de/git/pza/linux: drm/imx: imx-ldb: allow to determine bus format from the connected panel drm/imx: imx-ldb: reset display clock input when disabling LVDS drm/imx: imx-ldb: add drm_panel support drm/imx: consolidate bus format variable names drm/imx: switch to use media bus formats Add RGB666_1X24_CPADHI media bus format Add YUV8_1X24 media bus format Add BGR888_1X24 and GBR888_1X24 media bus formats Add LVDS RGB media bus formats Add RGB444_1X12 and RGB565_1X16 media bus formats drm/imx: ipuv3-crtc: Allow to divide DI clock from TVEv2 drm/imx: Add support for interlaced scanout
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git://git.pengutronix.de/git/pza/linuxDave Airlie authored
drm: Use of-graph helpers to loop over endpoints Convert all drm callers that use of_graph_get_next_endpoint to loop over of-graph endpoints to the newly introduced for_each_endpoint_of_node helper macro. * tag 'of-graph-drm-2015-04-08' of git://git.pengutronix.de/git/pza/linux: drm/rockchip: use for_each_endpoint_of_node macro, drop endpoint reference on break drm/rcar-du: use for_each_endpoint_of_node macro drm/imx: use for_each_endpoint_of_node macro in imx_drm_encoder_get_mux_id drm: use for_each_endpoint_of_node macro in drm_of_find_possible_crtcs of: Explicitly include linux/types.h in of_graph.h dt-bindings: brcm: rationalize Broadcom documentation naming of/unittest: replace 'selftest' with 'unittest' Documentation: rename of_selftest.txt to of_unittest.txt Documentation: update the of_selftest.txt dt: OF_UNITTEST make dependency broken MAINTAINERS: Pantelis Antoniou device tree overlay maintainer of: Add of_graph_get_port_by_id function of: Add for_each_endpoint_of_node helper macro of: Decrement refcount of previous endpoint in of_graph_get_next_endpoint
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Dave Airlie authored
Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next This pull request contains just cleanup for atomic pageflip/modeset support, and some fixeups. We wanted to merge atomic pageflip/modeset feature support, new drivers - MIC and DECON for exynos5433 SoC - and relevant patches this time. However, I'd found that these features are not only safe enough but also aren't tested yet. So for them, I'd like to have enough times for the reviews. * 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/exynos: Fix FIMD buffer size calculation drm/exynos: Enable DP clock to fix display on Exynos5250 and other drm/exynos: fimd: check whether exynos_drm_crtc_create succeed or not drm/exynos: dsi: remove the empty mode_valid callback drm/exynos: add ratio calculation drm/exynos: use src_x and src_y instead of fb_x and fb_y drm/exynos: mixer: add 2x scaling to mixer_graph_buffer drm/exynos: remove superfluous error messages drm/exynos: fix typos in hdmi and mixer drm/exynos/ipp: Validate buffer enqueue requests drm/exynos: track vblank events on a per crtc basis drm/exynos: remove leftover functions declarations drm/exynos: remove exynos_plane_destroy() drm/exynos: make zpos property immutable drm/exynos: preset zpos value for overlay planes drm/exynos: remove struct *_win_data abstraction on planes drm/exynos: remove unused exynos_crtc->win_enable() callback drm/exynos: fimd: fix alpha setting for XR24 pixel format
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Daniel Stone authored
Commit adacb228 ("drm: Exynos: Respect framebuffer pitch for FIMD/Mixer") fixed the buffer size calculation by using the FB pitch value but later commit 26b9c2813ede1 ("drm/exynos: remove struct *_win_data abstraction on planes") added a regression so fix the buffer size calculation again. Tested on Chromebook Snow / Peach Pit. Fixes: 26b9c2813ede1 ("drm/exynos: remove struct *_win_data abstraction on planes") Signed-off-by: Daniel Stone <daniels@collabora.com> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Krzysztof Kozlowski authored
After adding display power domain for Exynos5250 in commit 2d2c9a8d ("ARM: dts: add display power domain for exynos5250") the display on Chromebook Snow and others stopped working after boot. The reason for this suggested Andrzej Hajda: the DP clock was disabled. This clock is required by Display Port and is enabled by bootloader. However when FIMD driver probing was deferred, the display power domain was turned off. This effectively reset the value of DP clock enable register. When exynos-dp is later probed, the clock is not enabled and display is not properly configured: exynos-dp 145b0000.dp-controller: Timeout of video streamclk ok exynos-dp 145b0000.dp-controller: unable to config video Fixes: 2d2c9a8d ("ARM: dts: add display power domain for exynos5250") Cc: <stable@vger.kernel.org> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reported-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Hyungwon Hwang authored
>From the commit "drm/exynos: fix the execution order in FIMD initialization" (598285bfdce46d7c47632a2ba4b980f60be4a677), the error checking code is removed improperly. This patch fix the regression. Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Hyungwon Hwang authored
Because the helper function which calls this callback checks whether it is registered or not. It is not necessary if it does nothing. So it would be better to remove the function for clarity. Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Joonyoung Shim authored
Calculation ratio from exynos_drm plane codes, then each hw drivers can use it without extra operation. Also this fixes width and height of source used for actual crtc shown via screen. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Joonyoung Shim authored
It's more reasonable to use src_x and src_y to represent source as counterpart of destination(crtc). Already we are using src_width and src_height for width and height of source. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Tobias Jakobi authored
While the VP (video processor) supports arbitrary scaling of its input, the mixer just supports a simple 2x (line doubling) scaling. Expose this functionality and exit early when an unsupported scaling configuration is encountered. This was tested with modetest's DRM plane test (from the libdrm test suite) on an Odroid-X2 (Exynos4412). v2: Put if- and return-statement on different lines. Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Acked-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Tobias Jakobi authored
The messages are redundant since 'check_fb_gem_memory_type' already prints out exactly the same string when it fails. Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Acked-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Tobias Jakobi authored
Use the correct spelling for 'progressive'. Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de> Acked-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Beata Michalska authored
As for now there is no validation of incoming buffer enqueue request as far as the gem buffers are being concerned. This might lead to some undesired cases when the driver tries to operate on invalid buffers (wiht no valid gem object handle i.e.). Add some basic checks to rule out those potential issues. Signed-off-by: Beata Michalska <b.michalska@samsung.com> [mszyprow: rebased onto v4.0-rc1 and adapted to recent ipp changes] Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Mandeep Singh Baines authored
The goal of the change is to make sure we send the vblank event on the current vblank. My hope is to fix any races that might be causing flicker. After this change I only see a flicker in the transition plymouth and X11. Simplified the code by tracking vblank events on a per-crtc basis. This allowed me to remove all error paths from the callback. It also allowed me to remove the vblank wait from the callback. Signed-off-by: Mandeep Singh Baines <msb@chromium.org> Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Gustavo Padovan authored
These functions were already removed by previous cleanup work, but these ones were left behind. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Acked-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Gustavo Padovan authored
The .destroy() callback for exynos can be replaced by drm_plane_cleanup(). The only extra operation on exynos_plane_destroy() was a call to exynos_plane_disable() but the plane is already disabled by a earlier call to drm_framebuffer_remove(). Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Gustavo Padovan authored
We already set each plane zpos at init, after that changes to zpos are not expected. This patch turns zpos into a read-only property so now it is impossible to set zpos. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Gustavo Padovan authored
Usually userspace don't want to have two overlay planes on the same zpos so this change assign a different zpos for each plane. Before this change a zpos of value zero was created for all planes so the userspace had to set up the zpos of every plane it wanted to use. Also all places that were storing zpos positions are now unsigned int. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Gustavo Padovan authored
struct {fimd,mixer,vidi}_win_data was just keeping the same data as struct exynos_drm_plane thus get ride of it and use exynos_drm_plane directly. It changes how planes are created and remove .win_mode_set() callback that was only filling all *_win_data structs. v2: check for return of exynos_plane_init() Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Gustavo Padovan authored
None of the exynos crtc drivers implements win_enable() so remove it for better clarity of the code. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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Gustavo Padovan authored
XR24 planes were not shown properly, so now set the right registers to correctly enable displaying these planes. It also moves the alpha register settings to fimd_win_set_pixfmt() to keep all pixel format stuff together. v2: remove leftover var alpha Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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- 08 Apr, 2015 6 commits
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Dave Airlie authored
Linux 4.0-rc7 Requested by Alex for fixes -next needs. Conflicts: drivers/gpu/drm/i915/intel_sprite.c
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Philipp Zabel authored
Using the for_each_... macro should make the code a bit shorter and easier to read. Also, when breaking out of the loop, the endpoint node reference count needs to be decremented. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
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Philipp Zabel authored
Using the for_each_... macro should make the code a bit shorter and easier to read. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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Philipp Zabel authored
Using the for_each_... macro should make the code bit shorter and easier to read. This patch also properly decrements the endpoint node reference count before returning out of the loop. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Philipp Zabel authored
Using the for_each_... macro should make the code a bit shorter and easier to read. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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git://git.pengutronix.de/git/pza/linuxDave Airlie authored
imx-drm limit fixes Fix IPU IC downscaler to its hardware limitation of 4:1 and the IPU DI pixel clock divider integer part to 8-bit. * tag 'imx-drm-fixes-2015-03-31' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-v3: turns out the IPU can only downsize 4:1 gpu: ipu-v3: limit pixel clock divider to 8-bits drm/radeon: programm the VCE fw BAR as well drm/radeon: always dump the ring content if it's available radeon: Do not directly dereference pointers to BIOS area. drm/radeon/dpm: fix 120hz handling harder
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