- 08 Apr, 2013 4 commits
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Arnd Bergmann authored
Merge tag 'omap-for-v3.10/usb-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers From Tony Lindgren <tony@atomide.com>: EHCI platform data related changes for v3.10 merge window. These are needed for the USB PHY support, and are based on commit 1f0972f5 from Felipe Balbi's tree as agreed on the mailing lists. * tag 'omap-for-v3.10/usb-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits) ARM: dts: omap3-beagle: Add USB Host support ARM: dts: OMAP3: Add HS USB Host IP nodes ARM: dts: OMAP4: Add HS USB Host IP nodes ARM: OMAP: zoom: Adapt to ehci-omap changes ARM: OMAP3: overo: Adapt to ehci-omap changes ARM: OMAP3: omap3touchbook: Adapt to ehci-omap changes ARM: OMAP3: omap3stalker: Adapt to ehci-omap changes ARM: OMAP3: omap3pandora: Adapt to ehci-omap changes ARM: OMAP3: omap3evm: Adapt to ehci-omap changes ARM: OMAP3: igep0020: Adapt to ehci-omap changes ARM: OMAP: devkit8000: Adapt to ehci-omap changes ARM: OMAP3: cm-t3517: Adapt to ehci-omap changes ARM: OMAP3: cm-t35: Adapt to ehci-omap changes ARM: OMAP: AM3517evm: Adapt to ehci-omap changes ARM: OMAP: AM3517crane: Adapt to ehci-omap changes ARM: OMAP3: 3630SDP: Adapt to ehci-omap changes ARM: OMAP3: 3430SDP: Adapt to ehci-omap changes ARM: OMAP3: Beagle: Adapt to ehci-omap changes ARM: OMAP2+: omap4panda: Adapt to ehci-omap changes ARM: OMAP2+: omap-usb-host: Add usbhs_init_phys() ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.xilinx.com/linux-xlnxArnd Bergmann authored
From Michal Simek <michal.simek@xilinx.com>: * 'zynq/clksrc/cleanup' of git://git.xilinx.com/linux-xlnx: arm: zynq: Move timer to generic location arm: zynq: Do not use xilinx specific function names arm: zynq: Move timer to clocksource interface arm: zynq: Use standard timer binding Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://server.prisktech.co.nz/git/linuxwmtArnd Bergmann authored
From Tony Prisk <linux@prisktech.co.nz>: arm: vt8500: Add pinctrl driver for arch-vt8500 This series adds support for the pinctrl/gpio module on all arch-vt8500 supported SoCs. As part of the review process, some tidy up is also done to drivers/of/base.c to remove some code that is being constantly duplicated. Also, a patch for the bcm2835 pinctrl driver is included to take advantage of the new of/base.c code. * tag 'vt8500/pinctrl' of git://server.prisktech.co.nz/git/linuxwmt: (606 commits) pinctrl: bcm2835: make use of of_property_read_u32_index() gpio: vt8500: Remove arch-vt8500 gpio driver arm: vt8500: Remove gpio devicetree nodes arm: dts: vt8500: Update Wondermedia SoC dtsi files for pinctrl driver pinctrl: gpio: vt8500: Add pincontrol driver for arch-vt8500 arm: vt8500: Increase available GPIOs on arch-vt8500 of: Remove duplicated code for validating property and value of: Add support for reading a u32 from a multi-value property. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'renesas-intc-external-irq2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers From Simon Horman <horms+renesas@verge.net.au>: Update for Renesas INTC External IRQ pin driver for v3.10 This adds support for shared interrupt lines to the Renesas INTC External IRQ pin driver which has already been queued up for v3.10 (tag renesas-intc-external-irq-for-v3.10). * tag 'renesas-intc-external-irq2-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: irqchip: intc-irqpin: Add support for shared interrupt lines Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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- 04 Apr, 2013 12 commits
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Michal Simek authored
Move zynq timer out of mach folder to generic location and enable it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Remove all xilinx specific names from the driver because this is generic driver for cadence ttc. xttc->ttc ttcps->ttc ... No functional changes in this driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Use clocksource timer initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Michal Simek authored
Use cdns,ttc because this driver is Cadence Rev06 Triple Timer Counter and everybody can use it without xilinx specific function name or probing. Also use standard dt description for timer and also prepare for moving to clocksource initialization. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Stephen Warren authored
Use the new standard API of_property_read_u32_index() instead of open- coding it. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
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Tony Prisk authored
With the move to a combined pinctrl/gpio driver, the arch-vt8500 gpio driver is no longer required. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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Tony Prisk authored
Remove the gpio related devicetree nodes as these are no longer required with the move to a combined pinctrl/gpio driver. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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Tony Prisk authored
This patch adds pinctrl nodes to the VIA VT8500 and Wondermedia SoC dtsi files to support the pinctrl driver. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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Tony Prisk authored
This patch adds support for the GPIO/pinmux controller found on the VIA VT8500 and Wondermedia WM8xxx-series SoCs. Each pin within the controller is capable of operating as a GPIO or as an alternate function. The pins are numbered according to their control bank/bit so that if new pins are added, the existing numbering is maintained. All currently supported SoCs are included: VT8500, WM8505, WM8650, WM8750 and WM8850. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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Tony Prisk authored
With the inclusion of the pin control driver, more GPIO pins have been identified on the arch-vt8500 SoCs requiring an increase in the available GPIOs. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Acked-by: Linus Walleij <linus.walleij@linaro.org>
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Tony Prisk authored
Several functions in of/base.c have the same code duplicated for finding and validating a property and value. struct property *prop = of_find_property(np, propname, NULL); if (!prop) return -EINVAL; if (!prop->value) return -ENODATA; if (<some length> > prop->length) return -EOVERFLOW; This patch adds of_find_property_value_of_size() which performs the equivalent of the above code and removes the instances where it was duplicated in several functions. Reported-by: Rob Herring <robherring2@gmail.com> Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Rob Herring <rob.herring@calxeda.com>
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Tony Prisk authored
This patch adds an of_property_read_u32_index() function to allow reading a single indexed u32 value from a property containing multiple u32 values. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Rob Herring <robherring2@gmail.com>
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- 02 Apr, 2013 20 commits
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Roger Quadros authored
Provide RESET and Power regulators for the USB PHY, the USB Host port mode and the PHY device. Also provide pin multiplexer information for USB host pins. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulator and NOP PHY device. VAUX2 supplies the PHY's VCC. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. VAUX2 supplies the PHY's VCC. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Remove deprecated USBHS platform data. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's VCC and RESET regulators and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's VCC and RESET regulators and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's VCC and RESET regulators and the NOP PHY device. Get rid of managing the PHY clock as it will be done by the PHY driver. For that to work we create a clock alias that links the PHY clock name to the PHY device name. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
This helper allows board support code to add the PHY's VCC and RESET regulators which are GPIO controlled as well as the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 28 Mar, 2013 2 commits
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Arnd Bergmann authored
This ensures that a function pointer passed into CLOCKSOURCE_OF_DECLARE takes the same arguments that we use for calling that function later. Also fix the extraneous semicolon at end of the CLOCKSOURCE_OF_DECLARE definition. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Rob Herring <rob.herring@calxeda.com>
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Bastian Hecht authored
On some hardware we don't have a 1-1 mapping from the external interrupts coming from INTC to the GIC SPI pins. We can however share lines to demux incoming IRQs on these SoCs. This patch enables the intc_irqpin driver to detect requests for shared interrupt lines and demuxes them properly by querying the INTC INTREQx0A registers. If you need multiple shared intc_irqpin device instances, be sure to mask out all interrupts on the INTC that share the one line before you start to register them. Else you run into IRQ floods that would be caused by interrupts for which no handler has been set up yet when the first intc_irqpin device is registered. Signed-off-by: Bastian Hecht <hechtb+renesas@gmail.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 23 Mar, 2013 2 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pendingLinus Torvalds authored
Pull SCSI target fixes from Nicholas Bellinger: "These are mostly minor fixes this time around. The iscsi-target CHAP big-endian bugfix and bump FD_MAX_SECTORS=2048 default patch to allow 1MB sized I/Os for FILEIO backends on >= v3.5 code are both CC'ed to stable. Also, there is a persistent reservations regression that has recently been reported for >= v3.8.x code, that is currently being tracked down for v3.9." * git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending: target/pscsi: Reject cross page boundary case in pscsi_map_sg target/file: Bump FD_MAX_SECTORS to 2048 to handle 1M sized I/Os tcm_vhost: Flush vhost_work in vhost_scsi_flush() tcm_vhost: Add missed lock in vhost_scsi_clear_endpoint() target: fix possible memory leak in core_tpg_register() target/iscsi: Fix mutual CHAP auth on big-endian arches target_core_sbc: use noop for SYNCHRONIZE_CACHE
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