- 26 Jun, 2019 9 commits
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Stefan Popa authored
Document support for ADF4372 SPI Wideband Synthesizer. Signed-off-by:
Stefan Popa <stefan.popa@analog.com> Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Stefan Popa authored
The ADF4372 is part of the same family with ADF4371, the main difference is that it has only 3 channels instead of 4, as the frequency quadrupler is missing. As a result, the ADF4372 allows frequencies from 62.5 MHz to 16 GHz to be generated. Datasheet: Link: https://www.analog.com/media/en/technical-documentation/data-sheets/adf4372.pdfSigned-off-by:
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Mircea Caprioru authored
This patch adds the buffered mode device tree property for positive and negative inputs. Each option can be enabled independently. In buffered mode, the input channel feeds into a high impedance input stage of the buffer amplifier. Therefore, the input can tolerate significant source impedances and is tailored for direct connection to external resistive type sensors such as strain gages or RTDs. Signed-off-by:
Mircea Caprioru <mircea.caprioru@analog.com> Reviewed-by:
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Mircea Caprioru authored
Signed-off-by:
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Mircea Caprioru authored
This patch changes the channel configuration member of the device structure from a fixed size array to a dynamic allocated one with a size equal to the number of channels specified in the device tree. This will ensure a more flexibility for compatible devices. Ex. ad7124-4 - can have 4 differential or 8 pseudo-differential channels ad7124-8 - can have 8 differential or 16 pseudo-differential channels Also the device can suspport any other combination of differential and pseudo-differential channels base on the physical number of inputs available. Signed-off-by:
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Mircea Caprioru authored
This patch adds the option to enable the buffered mode for positive and negative inputs. Each option can be enabled independently. In buffered mode, the input channel feeds into a high impedance input stage of the buffer amplifier. Therefore, the input can tolerate significant source impedances and is tailored for direct connection to external resistive type sensors such as strain gages or RTDs. Signed-off-by:
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Mircea Caprioru authored
The driver limits the user to use only 4/8 differential inputs, but this device has the option to use pseudo-differential channels. This will increase the number of channels to be equal with the number of inputs so 8 channels for ad7124-4 and 16 for ad7124-8. This patch removes the check between channel nodes and num_inputs value. Signed-off-by:
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Alexandru Ardelean authored
This change adds the ADIS driver library to the MAINTAINERS list, and adds myself as the current maintainer of this library. Signed-off-by:
Alexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by:
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Alexandru Ardelean authored
All current ADIS162XX drivers have incorrect values defined via comments. Also, when an error is reported the printed value is incorrect. The functionality itself isn't affected, so it's not a critical issue. And since the change is trivial, it was included in a single patch that fixes these in one go. All values were correlated with the ones specified in the data-sheets. Signed-off-by:
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- 22 Jun, 2019 14 commits
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Patrick Havelange authored
The last '>' chars were missing in the MODULE_AUTHOR entries. Reported-by:
Randy Dunlap <rdunlap@infradead.org> Fixes: a3b9a999 ("counter: add FlexTimer Module Quadrature decoder counter driver") Signed-off-by:
Patrick Havelange <patrick.havelange@essensium.com> Signed-off-by:
William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by:
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Greg Kroah-Hartman authored
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: Jonathan Cameron <jic23@kernel.org> Cc: Hartmut Knaack <knaack.h@gmx.de> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net> Cc: linux-iio@vger.kernel.org Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by:
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Mauro Carvalho Chehab authored
Rename the iio documentation files to ReST, add an index for them and adjust in order to produce a nice html output via the Sphinx build system. At its new index.rst, let's add a :orphan: while this is not linked to the main index.rst file, in order to avoid build warnings. Signed-off-by:
Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Signed-off-by:
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Fabrice Gasnier authored
Add missing vdda-supply, analog power supply, to STM32 ADC. When vdda is an independent supply, it needs to be properly turned on or off to supply the ADC. Signed-off-by:
Fabrice Gasnier <fabrice.gasnier@st.com> Fixes: 1add6988 ("iio: adc: Add support for STM32 ADC core"). Cc: <Stable@vger.kernel.org> Signed-off-by:
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Fabrice Gasnier authored
Add missing vdda-supply, analog power supply, to STM32 ADC. It's required to properly supply the ADC. Fixes: 841fcea4 ("Documentation: dt-bindings: Document STM32 ADC DT bindings") Signed-off-by:
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Olivier Moysan authored
Add a comment on DMA configuration for 16 bits record. Signed-off-by:
Olivier Moysan <olivier.moysan@st.com> Acked-by:
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Olivier Moysan authored
The use of fast mode allows to get a larger set of solution for filter parameters. This can be useful to reach a better output sample resolution, when fast mode can be used. Fast mode is selected at startup if it is relevant. The startup is performed in postenable callback context, where there are too tight time constraints for filter parameters computation. For this reason both fast and non fast filter parameters are pre-computed previously. Signed-off-by:
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Olivier Moysan authored
Add output sample resolution management in scan mode. Add stm32_dfsdm_process_data() function to share sample processing between continuous and trigger modes. Signed-off-by:
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Olivier Moysan authored
Fix the data type as DFSDM raw output is complements 2, 24bits left aligned in a 32-bit register. This change does not affect AUDIO path - Set data as signed for IIO (as for AUDIO) - Set 8 bit right shift for IIO. The 8 LSBs bits of data contains channel info and are masked. Signed-off-by:
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Olivier Moysan authored
In buffered mode, output samples are shifted left unconditionally. This works for filter order 3, but this shift is not adapted for other filter orders. Compute required shift, left or right, and shift output data accordingly. Add also saturation management to avoid wrap-around when maximum positive sample is reached. Signed-off-by:
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Tomasz Duszynski authored
Add myself as a sensirion sps30 driver maintainer. Signed-off-by:
Tomasz Duszynski <tduszyns@gmail.com> Signed-off-by:
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Tomasz Duszynski authored
Convert existing device tree bindings to yaml. Signed-off-by:
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Dan Carpenter authored
The problem is that "ret" is an int but we're casting it as "(unsigned long *)&ret" when we do the for_each_set_bit() loop. This will not work on big endian 64 bit systems. Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Alexandru Ardelean authored
The iio_triggered_buffer_{predisable,postenable} functions attach/detach the poll functions. For the predisable hook, the disable code should occur before detaching the poll func, and for the postenable hook, the poll func should be attached before the enable code. Signed-off-by:Denis Ciocca <denis.ciocca@st.com> Signed-off-by:
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- 17 Jun, 2019 17 commits
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Robert Hancock authored
Since the XADC logic can be used with standalone Xilinx FPGAs, this driver can potentially be used with many different platforms, not just the Zynq and MicroBlaze platforms this driver was allowed to be built for. There should be no platform-specific code in this driver, so just delete the platform dependency. Signed-off-by:
Robert Hancock <hancock@sedsystems.ca> Signed-off-by:
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Shobhit Kukreti authored
The dht11 driver uses a single gpio to make measurements. It was using the older global gpio numberspace. The patch replaces the old gpio api with the new gpio descriptor based api. Removed header files "linux/gpio.h" and "linux/of_gpio.h" Signed-off-by:
Shobhit Kukreti <shobhitkukreti@gmail.com> Acked-by:
Harald Geyer <harald@ccbib.org> Signed-off-by:
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Patrick Havelange authored
Adding myself as maintainer for this driver Signed-off-by:
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Melissa Wen authored
General cleaning of comments to remove useless information or improve description. Signed-off-by:
Melissa Wen <melissa.srw@gmail.com> Signed-off-by:
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Melissa Wen authored
Since i2c_smbus_write_byte_data returns no-positive value, this commit making the treatment of its return value less verbose. Signed-off-by:
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Melissa Wen authored
Use the bitfield macro FIELD_GET, and GENMASK to do the shift and mask in one go. This makes the code more readable than explicit masking followed by a shift. Signed-off-by:
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Melissa Wen authored
Remove idiom and use ternary operator for consistently trigger 0/1 value on variable declaration. Signed-off-by:
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Alexandru Ardelean authored
There is nothing being done after the `err_predisable` label, so just remove it. Signed-off-by:
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Alexandru Ardelean authored
The ADL5240 is a high performance, digitally controlled variable gain amplifier (VGA) operating from 100 MHz to 4000 MHz. The VGA integrates a high performance, 20 dB gain, internally matched amplifier (AMP) with a 6-bit digital step attenuator (DSA) that has a gain control range of 31.5 dB in 0.5 dB steps with ±0.25 dB step accuracy. Datasheet link: https://www.analog.com/media/en/technical-documentation/data-sheets/adl5240.pdfSigned-off-by:
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Paul Cercueil authored
This change adds support for the ADA4961 BiCMOS RF Digital Gain Amplifier, (DGA), which is optimized for driving heavy loads out 2.0 GHz and beyond. The device typically achieves -90 dBc IMD3 performance at 500 MHz and -85 dBc at 1.5 GHz. Datasheet link: http://www.analog.com/media/en/technical-documentation/data-sheets/ADA4961.pdf This change re-uses the existing ad8366 driver, as most logic is similar. Also, this chip has a reset pin which is initialized during probe. Signed-off-by:
Paul Cercueil <paul.cercueil@analog.com> Signed-off-by:
Michael Hennerich <michael.hennerich@analog.com> Signed-off-by:
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Alexandru Ardelean authored
The SPI gain amplifiers are simple devices, with 1 or 2 channels, to which are read-from/written-to. The gain computation in ad8366_write_raw() has been updated to compute gain in dB for negative values. This driver will be extended to support other chips as well. To do that, this rework handles the AD8366 device as a special-case (via switch-statements). This will make things easier when adding new chips. Signed-off-by:
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Alexandru Ardelean authored
This driver is still using iio_dev's mlock to guard against inconsistent state. This has been discouraged for some time. This change switches to using it's own mutex, defined on the state struct. Signed-off-by:
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Alexandru Ardelean authored
Use the new `SPDX-License-Identifier` tag to specify the license. For ad8366, also update copyright years in the header part. Signed-off-by:
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Lucas Oshiro authored
Convert the old device tree documentation to yaml format. Signed-off-by:
Lucas Oshiro <lucasseikioshiro@gmail.com> Signed-off-by:
Rodrigo Ribeiro <rodrigorsdc@gmail.com> Co-developed-by:
Matheus Tavares <matheus.bernardino@usp.br> Reviewed-by:
Marcelo Schmitt <marcelo.schmitt1@gmail.com> Reviewed-by:
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Alexandru Ardelean authored
The iio_triggered_buffer_{predisable,postenable} functions attach/detach the poll functions. For the predisable hook, the disable code should occur before detaching the poll func, and for the postenable hook, the poll func should be attached before the enable code. Signed-off-by: -
Stefan Popa authored
Document support for Analog Devices ADF4371 SPI Wideband Synthesizer. Signed-off-by:
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Stefan Popa authored
The ADF4371 is a frequency synthesizer with an integrated voltage controlled oscillator (VCO) for phase-locked loops (PLLs). The ADF4371 has an integrated VCO with a fundamental output frequency ranging from 4000 MHz to 8000 MHz. In addition, the VCO frequency is connected to divide by 1, 2, 4, 8, 16, 32, or 64 circuits that allows the user to generate radio frequency (RF) output frequencies as low as 62.5 MHz at RF8x. A frequency multiplier at RF16x generates from 8 GHz to 16 GHz. A frequency quadrupler generates frequencies from 16 GHz to 32 GHz at RF32x. RFAUX8x duplicates the frequency range of RF8x or permits direct access to the VCO output. The driver takes the reference input frequency from the device tree and uses it to calculate and maximize the PFD frequency (frequency of the phase frequency detector). The PFD frequency is further used to calculate the timeouts: synthesizer lock, VCO band selection, automatic level calibration (ALC) and PLL settling time. This initial driver exposes the attributes for setting the frequency and enabling/disabling the different adf4371 channels. Datasheet: Link: https://www.analog.com/media/en/technical-documentation/data-sheets/adf4371.pdfSigned-off-by:
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