- 08 Jan, 2018 37 commits
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Lorenzo Bianconi authored
Allocate device read buffer at bootstrap and do not put it on the stack since it is pretty big (~200B) and its size will increase adding support to device hw timestamp. Moreover this patch fixes following sparse warnings: drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c:250:17: warning: Variable length array is used. drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c:283:55: error: cannot size expression Fixes: 290a6ce1 ("iio: imu: add support to lsm6dsx driver") Signed-off-by:
Lorenzo Bianconi <lorenzo.bianconi@redhat.com> Signed-off-by:
Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Tobin C. Harding authored
Kernel-doc for @use_count does not currently have a field identifier. All the rest of the fields do. @use_count is used internally and should not be accessed directly by the driver so it should be marked as so. Add [INTERN] identifier to @use_count field. Signed-off-by:
Tobin C. Harding <me@tobin.cc> Signed-off-by:
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Tobin C. Harding authored
When building kernel documentation sphinx emits the following warning warning: No description found for parameter 'owner' Add description for struct member 'owner'. Signed-off-by:
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Sumit Pundir authored
This patch fixes the following checkpatch.pl issue at multiple lines: CHECK: Prefer using the BIT macro Signed-off-by:
Sumit Pundir <pundirsumit11@gmail.com> Signed-off-by:
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Fabrice Gasnier authored
By default, watermark is set to '1'. Watermark is used to fine tune cyclic dma buffer period. In case watermark is left untouched (e.g. 1) and several channels are being scanned, buffer period is wrongly set (e.g. to 1 sample). As a consequence, data is never pushed to upper layer. Fix buffer period size, by taking scan channels number into account. Fixes: 2763ea05 ("iio: adc: stm32: add optional dma support") Signed-off-by:
Fabrice Gasnier <fabrice.gasnier@st.com> Cc: <Stable@vger.kernel.org> Signed-off-by:
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Venkat Prashanth B U authored
This is the patch to the file ti_am335x_adc.c which fixes the following coccinelle warning: WARNING: Comparison to bool Signed-off-by:
Venkat Prashanth B U <venkat.prashanth2498@gmail.com> Signed-off-by:
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Aishwarya Pant authored
This is a clean-up patch which replaces DEVICE_ATTR() macro with the file permission specific DEVICE_ATTR_RW() macro for compaction and readability. Done using coccinelle. Signed-off-by:
Aishwarya Pant <aishpant@gmail.com> Signed-off-by:
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Julia Lawall authored
This driver creates a number of const structures that it stores in the data field of an of_device_id array. Add const to the declaration of the location that receives a value from the data field to ensure that the compiler will continue to check that the value is not modified and remove the const-dropping cast on the access to the data field. Done using Coccinelle. Signed-off-by:
Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by:
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Lorenzo Bianconi authored
Introduce regmap API support to access to i2c/spi bus instead of using a custom support. Set max bulk read to (32 / SAMPLE_SIZE) * SAMPLE_SIZE since spi_write_then_read() used in regmap_spi indicates that is the max buffer length to use in order to avoid a kmalloc for each bus access. Remove lock mutex since concurrency is already managed by regmap API Signed-off-by:
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Lorenzo Bianconi authored
Add conf_lock mutex to prevent concurrent FIFO configuration update Fixes: 290a6ce1 (iio: imu: add support to lsm6dsx driver) Signed-off-by:
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Lorenzo Bianconi authored
Apply le16_to_cpu() to data read from the sensor in order to take into account architecture endianness Fixes: 290a6ce1 (iio: imu: add support to lsm6dsx driver) Signed-off-by:
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Lorenzo Bianconi authored
Move duplicated i2c/spi probe code in hts221_probe() Signed-off-by:
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Stefan Tatschner authored
This patch affects BME280 and BMP280. The readout of the calibration data is moved to the probe function. Each sensor data access triggered reading the full calibration data before this patch. According to the datasheet, Section 4.4.2., the calibration data is stored in non-volatile memory. Since the calibration data does not change, and cannot be changed by the user, we can reduce bus traffic by reading the calibration data once. Additionally, proper organization of the data types enables removing some odd casts in the compensation formulas. Signed-off-by:
Stefan Tatschner <stefan.tatschner@gmail.com> Tested-by:
Andreas Klinger <ak@it-klinger.de> Signed-off-by:
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Stefan Brüns authored
Currently, the registers are read out once per conversion interval. If the reading is delayed as the conversion has not yet finished, this extra time is treated as being part of the readout, although it should delay the start of the poll interval. This results in the interval starting slightly earlier in each iteration, until all time between reads is spent polling the status registers instead of sleeping. To fix this, the delay has to account for the state of the conversion ready flag. Whenever the conversion is already finished, schedule the next read on the regular interval, otherwise schedule it one interval after the flag bit has been set. Split the work function in two functions, one for the status poll and one for reading the values, to be able to note down the time when the flag bit is raised. Signed-off-by:
Stefan Brüns <stefan.bruens@rwth-aachen.de> Signed-off-by:
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Stefan Brüns authored
As the timestamp is no longer (ab-)used to measure the function run time, it can be taken at the correct time, i.e. when the conversion has finished. Signed-off-by:
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Stefan Brüns authored
The iio timestamp clock is user selectable and may be non-monotonic. Also, only part of the acquisition time is measured, thus the delay was longer than intended. Use a monotonic timestamp to track the time for the next poll iteration. The timestamp is advanced by the sampling interval each iteration. In case the conversion overrruns the register readout (i.e. fast sampling combined with a slow bus), one or multiple samples will be dropped. Signed-off-by:
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Tobin C. Harding authored
When building kernel documentation sphinx emits the following warnings No description found for parameter 'iio_dev' Excess function parameter 'indio_dev' description in 'iio_device_register' These warnings are caused by a macro with a different argument identifier to the one listed in the kernel-docs. Change macro argument to be the same as the docs. Signed-off-by:
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Maciej Purski authored
Calibration register is used for calculating current register in hardware according to datasheet: current = shunt_volt * calib_register / 2048 (ina 226) current = shunt_volt * calib_register / 4096 (ina 219) Fix calib_register value to 2048 for ina226 and 4096 for ina 219 in order to avoid truncation error and provide best precision allowed by shunt_voltage measurement. Make current scale value follow changes of shunt_resistor from sysfs as calib_register value is now fixed. Power_lsb value should also follow shunt_resistor changes as stated in datasheet: power_lsb = 25 * current_lsb (ina 226) power_lsb = 20 * current_lsb (ina 219) This is a part of the patchset: https://lkml.org/lkml/2017/11/22/394Signed-off-by:
Maciej Purski <m.purski@samsung.com> Reviewed-by:
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Ji-Hun Kim authored
Clean up checkpatch warning: CHECK: Unnecessary parentheses around 'st->devid != ID_AD7195' Signed-off-by:
Ji-Hun Kim <jihuun.k@gmail.com> Signed-off-by:
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Venkat Prashanth B U authored
This is a patch to the at91_adc.c file that fixes up a brace warning found by the checkpatch.pl tool Signed-off-by:
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Andreas Klinger authored
Return value in hx711_reset() should indicate status of dout otherwise the calling function is reporting an error as false positive If there are two reads too close to each other, then the second one will never succeed. This happens especially when using buffered mode with both channels enabled. When changing the channel on every trigger event the former 100 ms are not enough for waiting until the device indicates normal mode. Wait up to 1 second until the device turns into normal mode. Signed-off-by:
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Andreas Klinger authored
Add buffer to device data struct and add trigger function Data format is quite simple: voltage - channel 0 32 Bit voltage - channel 1 32 Bit timestamp 64 Bit Using both channels at the same time is working quite slow because of changing the channel which needs a dummy read. Signed-off-by: -
Stefan Brüns authored
The conversion time can be up to 16 seconds (8 ms per channel, 2 channels, 1024 times averaging). Signed-off-by:
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Stefan Brüns authored
Although the datasheet states the CNVR flag is cleared by reading the BUS_VOLTAGE register, it is actually cleared by reading any of the voltage/current/power registers. The behaviour has been confirmed by TI support: http://e2e.ti.com/support/amplifiers/current-shunt-monitors/f/931/p/647053/2378282Signed-off-by:
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Stefan Brüns authored
The timestamp is inserted into the buffer after the sample data by iio_push_to_buffers_with_timestamp, document the space requirement for the timestamp. Signed-off-by:
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Stefan Brüns authored
iio_push_to_buffers_with_timestamp expects a void pointer, so the cast is both unnecessary and misleading. Signed-off-by:
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Martin Blumenstingl authored
On some Meson8 devices the channel muxes are not programmed. This results in garbage values when trying to read channels that are not set up. Fix this by initializing the channel 0 and 1 muxes in MESON_SAR_ADC_CHAN_10_SW as well as the muxes for all other channels in MESON_SAR_ADC_AUX_SW based on what the vendor driver does (which is simply a 1:1 mapping of channel number and channel mux). This only showed up on Meson8 devices, because for GXBB and newer BL30 is taking care of initializing the channel muxes. This additionally fixes a typo in the MESON_SAR_ADC_AUX_SW_MUX_SEL_CHAN_MASK macro because the old definition assumed that the register fields were 2 bit wide, while they are actually 3 bit wide. Signed-off-by:
Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by:
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Martin Blumenstingl authored
GX SoCs use a 1.2 MHz ADC clock, while the older SoCs use a 1.14 MHz clock. A comment in the driver from Amlogic's GPL kernel says that it's running at 1.28 MHz. However, it's actually programming a divider of 20 + 1. With a XTAL clock of 24 MHz this results in a frequency of 1.14 MHz. (their calculation might be based on a 27 MHz XTAL clock, but this is not what we have on the Meson8 and Meson8b SoCs). The ADC was still working with the 1.2MHz clock. In my own tests I did not see a difference between 1.2 and 1.14 MHz (regardless of the clock frequency used, the ADC results were identical). Signed-off-by:
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Linus Walleij authored
The name of the file is "current_timetamp_clock" not "timestamp_clock". Fixes: bc2b7dab ("iio:core: timestamping clock selection support") Cc: Gregor Boirie <gregor.boirie@parrot.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Pravin Shedge authored
These duplicate includes have been found with scripts/checkincludes.pl but they have been removed manually to avoid removing false positives. Signed-off-by:
Pravin Shedge <pravin.shedge4linux@gmail.com> Signed-off-by:
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Andrew F. Davis authored
Found with scripts/coccinelle/misc/boolconv.cocci. Signed-off-by:
Andrew F. Davis <afd@ti.com> Signed-off-by:
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Benjamin Gaignard authored
Add SPDX identifier in stm32's files in IIO directory Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@st.com> Acked-by:
Philippe Ombredanne <pombredanne@nexb.com> Signed-off-by:
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Colin Ian King authored
Structures st_uvis25_i2c_regmap_config and st_uvis25_spi_regmap_config are local to the source and do not need to be in global scope, so make them both static. Cleans up sparse warnings: warning: symbol 'st_uvis25_i2c_regmap_config' was not declared. Should it be static? warning: symbol 'st_uvis25_spi_regmap_config' was not declared. Should it be static? Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
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Matt Fornero authored
Add a sysfs attribute that exposes buffer data available to userspace. This attribute can be checked at runtime to determine the overall buffer fill level (across all allocated buffers). Signed-off-by:
Matt Fornero <matt.fornero@mathworks.com> Signed-off-by:
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Martin Kepplinger authored
This replaces the custom license information text with the appropriate SPDX identifier. While the information here stays the same, it is easier to read. Signed-off-by:
Martin Kepplinger <martink@posteo.de> Acked-by:
Peter Meerwald-Stadler <pmeerw@pmeerw.net> Acked-by:
Harinath Nampally <harinath922@gmail.com> Signed-off-by:
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Arnd Bergmann authored
getnstimeofday() suffers from the overflow in y2038 on 32-bit architectures and requires a conversion into the nanosecond format that we want here. This changes ssp_parse_dataframe() to use ktime_get_real_ns() directly, which does not have that problem. An open question is what time base should be used here. Normally timestamps should use ktime_get_ns() or ktime_get_boot_ns() to read monotonic time instead of "real" time, which suffers from time jumps due to settimeofday() calls or leap seconds. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Bartosz Golaszewski authored
As discussed with Marc Zyngier: irq_sim_init() and its devres variant should return the base of the allocated interrupt range on success rather than 0. This will be modified later - first, change the way users handle the return value of these routines. Signed-off-by:
Bartosz Golaszewski <brgl@bgdev.pl> Signed-off-by:
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- 02 Jan, 2018 1 commit
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Greg Kroah-Hartman authored
We need the staging fixes in here as well. Signed-off-by:
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- 31 Dec, 2017 2 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 fixes from Thomas Gleixner: "A couple of fixlets for x86: - Fix the ESPFIX double fault handling for 5-level pagetables - Fix the commandline parsing for 'apic=' on 32bit systems and update documentation - Make zombie stack traces reliable - Fix kexec with stack canary - Fix the delivery mode for APICs which was missed when the x86 vector management was converted to single target delivery. Caused a regression due to the broken hardware which ignores affinity settings in lowest prio delivery mode. - Unbreak modules when AMD memory encryption is enabled - Remove an unused parameter of prepare_switch_to" * 'x86/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/apic: Switch all APICs to Fixed delivery mode x86/apic: Update the 'apic=' description of setting APIC driver x86/apic: Avoid wrong warning when parsing 'apic=' in X86-32 case x86-32: Fix kexec with stack canary (CONFIG_CC_STACKPROTECTOR) x86: Remove unused parameter of prepare_switch_to x86/stacktrace: Make zombie stack traces reliable x86/mm: Unbreak modules that use the DMA API x86/build: Make isoimage work on Debian x86/espfix/64: Fix espfix double-fault handling on 5-level systems
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