Add initial support for the Renesas Salvator-X 2nd version development
board equipped with an R-Car M3-W+ SiP with 8 (2 x 4) GiB of RAM.

The memory map is as follows:
  - Bank0: 4GiB RAM : 0x000048000000 -> 0x000bfffffff
		      0x000480000000 -> 0x004ffffffff
  - Bank1: 4GiB RAM : 0x000600000000 -> 0x006ffffffff

Based on a patch in the BSP by Takeshi Kihara
<takeshi.kihara.df@renesas.com>.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191023123342.13100-10-geert+renesas@glider.be

Add initial support for the Renesas R-Car M3-W+ (R8A77961) SoC.

This includes:
  - Cortex-A57 and Cortex-A53 CPU cores
    (incl. L2 caches and power state definitions),
  - Power Management Unit,
  - PSCI firmware,
  - Pin Function Controller,
  - Clock, Reset, System, and Interrupt Controllers,
  - SCIF2 serial console,
  - Product Register,
  - ARM Architectured Timer,
and various placeholders to allow to use salvator-xs.dtsi.

Based on r8a7796.dtsi.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191023123342.13100-9-geert+renesas@glider.be

CONFIG_ARCH_R8A7796 for R-Car M3-W (R8A77960) will be renamed to
CONFIG_ARCH_R8A77960, to avoid confusion with R-Car M3-W+ (R8A77961),
which will use CONFIG_ARCH_R8A77961.

Relax dependencies by handling both symbols.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191023123342.13100-8-geert+renesas@glider.be

Renesas R-Car M3-W+ DT Binding Definitions

Clock and Power Domain definitions for the Renesas R-Car M3-W+
(R8A77961) SoC, shared by driver and DT source files.

Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
M3-W+ (R8A77961) SoC, as listed in Table 8.2b ("List of Clocks [R-Car
M3-W/R-Car M3-W+]") of the R-Car Series, 3rd Generation Hardware User's
Manual (Rev. 2.00, Jul. 31, 2019).  A gap is added for CSIREF, to
preserve compatibility with the definitions for R-Car M3-W (R8A77960).

Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, SSPSRC, and POST2)
are not included, as they are used as internal clock sources only, and
never referenced from DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20191023122941.12342-3-geert+renesas@glider.be

Add power domain indices for the R-Car M3-W+ (R8A77961) SoC.

Based on Rev. 2.00 of the R-Car Series, 3rd Generation, Hardware User’s
Manual (Jul. 31, 2019).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Link: https://lore.kernel.org/r/20191023122911.12166-6-geert+renesas@glider.be

Add the SATA controller node to the RZ/G2N SoC specific
dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1571761279-17347-3-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add CMM units to Renesas R-Car Gen3 SoC that support it, and reference them
from the Display Unit they are connected to.

Sort the 'vsps', 'renesas,cmm' and 'status' properties in the DU unit
consistently in all the involved DTS.
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Link: https://lore.kernel.org/r/20191016085548.105703-8-jacopo+renesas@jmondi.orgSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add VIN and CSI-2 support to the RZ/G2N SoC specific dtsi.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1571137271-33973-1-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add CAN and CAN FD support to the RZ/G2N SoC specific dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570717560-7431-4-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds iommus properties to the R-Car Gen3 SoCs' SDHI/MMC
nodes.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1570437605-15804-1-git-send-email-yoshihiro.shimoda.uh@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add support for the Interrupt Controller for External Devices
(INTC-EX) on RZ/G2N.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570531132-21856-11-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add usb3.0 phy, host and function device nodes on RZ/G2N SoC dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570531132-21856-10-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add usb dmac and hsusb device nodes to the RZ/G2N SoC dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570531132-21856-9-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add USB2.0 phy and host (EHCI/OHCI) device nodes on RZ/G2N SoC dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570531132-21856-8-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Based on a similar patch of the R8A7796 device tree
by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1570200761-884-2-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

The plan for the HiHope RZ/G2N board is to enable pciec0 by default,
and use pciec1 physical interface for SATA (as SATA and PCIE1 share
the same physical interface), therefore move pciec1 enabling away
from hihope-rzg2-ex.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570178133-21532-8-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds PCIe{0,1} device nodes for R8A774B1 SoC.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Link: https://lore.kernel.org/r/1570178133-21532-7-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add the device nodes for all MSIOF SPI controllers on the RZ/G2N
SoC (a.k.a. r8a774b1).
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570178133-21532-6-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Populate the device tree node for the Watchdog Timer (RWDT)
controller on the Renesas RZ/G2N (r8a774b1) SoC.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Link: https://lore.kernel.org/r/1570178133-21532-5-git-send-email-fabrizio.castro@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds support for Advantech idk-1110wr LVDS panel.
The HiHope RZ/G2[MN] is advertised as compatible with panel
idk-1110wr from Advantech, however the panel isn't sold alongside
the board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-10-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds LVDS support for RZ/G2[MN] boards.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-9-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch enables backlight support.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-8-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds PWM device nodes to r8a774b1 SoC DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-7-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

The r8a774b1 has a single FDP1 instance.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-6-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add display clock properties for the HiHope RZ/G2N board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-5-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add the HDMI encoder to the R8A774B1 DT in disabled state.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-4-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add the DU device to r8a774b1 SoC DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-3-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

RZ/G2N board is pin compatible with RZ/G2M board. However on the SoC
side RZ/G2N uses DU3 where as RZ/G2M uses DU2 for the DPAD. In order to
reuse the common dtsi for both the boards, it is required to move du clock
properties from common dtsi to board specific dts.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/1570029619-43238-2-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add IPMMU-DS0 to the Ethernet-AVB device node.

Based on work by Magnus Damm for the r8a7795.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-8-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Hook up r8a774b1 DMAC nodes to the IPMMUs. In particular SYS-DMAC0
gets tied to IPMMU-DS0, and SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1.

Based on work for the r8a7796 by Magnus Damm.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-7-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

The r8a774b1 has 4 VSP instances.

Based on the work done for r8a77965 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-6-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add FCPF and FCPV instances to the r8a774b1 dtsi.

Based on the work done for r8a77965 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-5-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add RZ/G2N (R8A774B1) IPMMU nodes.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-4-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS)
devices nodes to the r8a774b1 device tree.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-3-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add SDHI support for the r8a774b1 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569313375-53428-2-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds TMU[01234] device tree nodes to the
r8a774b1 SoC specific DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569250648-33857-5-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds the CMT[0123] device tree nodes to the
r8a774b1 SoC specific DT.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569250648-33857-4-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add thermal support for R8A774B1 (RZ/G2N) SoC.

Based on the work done for r8a77965 SoC.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569250648-33857-3-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds OPPs table for CA57{0,1} cpu devices.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Link: https://lore.kernel.org/r/1569250648-33857-2-git-send-email-biju.das@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>