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  1. 10 Jul, 2012 1 commit
  3. 09 Jul, 2012 1 commit
    • Kevin Hilman's avatar
      ARM: OMAP2+: omap2plus_defconfig: EHCI driver is not stable, disable it · 06b4ba52
      Kevin Hilman authored 
      The EHCI driver is not stable enough to be enabled by default.  In v3.5,
it has at least the following problems:

- warning dump during bootup
- hang during suspend
- prevents CORE powerdomain from entering retention during idle (even
  when no USB devices connected.)

This demonstrates that this driver has not been thoroughly tested and
therfore should not be enabled in the default defconfig.

In addition, the problems above cause new PM regressions which need be
addressed before this driver should be enabled in the default
defconfig.
Signed-off-by: default avatarKevin Hilman <khilman@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
      06b4ba52
  5. 06 Jul, 2012 7 commits
    • Magnus Damm's avatar
      ARM: shmobile: fix platsmp.c build when ARCH_SH73A0=n · 873e9f7a
      Magnus Damm authored 
      Fix build error in the case of SMP=y but ARCH_SH73A0=n
introduced by:

9601e873 ARM: shmobile: fix smp build

The use of of_machine_is_compatible() will link in the
the SoC-specific symbols:
"sh73a0_get_core_count", "sh73a0_smp_prepare_cpus",
"sh73a0_secondary_init" and "sh73a0_boot_secondary".

This patch adds an ugly #ifdef wrapper as a stop-gap
solution.
Signed-off-by: default avatarMagnus Damm <damm@opensource.se>
Tested-by: default avatarTested-by: Simon Horman <horms@verge.net.au>
Acked-by: default avatar"Rafael J. Wysocki" <rjw@sisk.pl>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      873e9f7a
    • Arnd Bergmann's avatar
      Merge branch 'ux500/fixes-3.5' into fixes · 78ee225f
      Arnd Bergmann authored 
      From Lee Jones <lee.jones@linaro.org>:

* ux500/fixes-3.5:
  ARM: ux500: Over-ride the DT device naming scheme for pinctrl
  ARM: ux500: Fix build errors/warnings when MACH_UX500_DT is not set
  of: address: Don't fail a lookup just because a node has no reg property

I ended up rebasing Lee's branch on 3.5-rc5 because we have more patches
lined for 3.6 that depend on them, and I want to keep all branches in
arm-soc be based on -rc releases rather than random commits in the
upstream history.
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
      78ee225f
    • Lee Jones's avatar
      ARM: ux500: Over-ride the DT device naming scheme for pinctrl · 2b667a2d
      Lee Jones authored 
      When pin control mapping tables are written the registered device
name is supplied for use in name-based searches within the pinctrl
driver. In the case of the DB8500 the string "pinctrl-db8500" is
used. However, when we register the driver with Device Tree, its
naming convention uses something that looks more like "pinctrl.2".

To work around the device naming inconsistencies between devices
registered via platform code and the ones registered by Device
Tree, we use AUXDATA to over-ride the Device Tree naming scheme.
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
      2b667a2d
    • Lee Jones's avatar
      ARM: ux500: Fix build errors/warnings when MACH_UX500_DT is not set · c57920e6
      Lee Jones authored 
      When MACH_UX500_DT and all related Device Tree configurations are forced
off the warning and error below prevent the kernel from compiling. This
simple patch fixes both issues and allows for full build and boot of
ST-Ericsson's low-cost development board, Snowball.

Warnings fixed:
  arch/arm/mach-ux500/board-mop500.c:680:32: warning: ‘snowball_of_platform_devs’ defined but not used

Errors fixed:
  arch/arm/mach-ux500/timer.c: In function ‘ux500_timer_init’:
  arch/arm/mach-ux500/timer.c:66:3: error: implicit declaration of function ‘of_find_matching_node’
  arch/arm/mach-ux500/timer.c:66:6: warning: assignment makes pointer from integer without a cast

Cc: stable@vger.kernel.org
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
      c57920e6
    • Lee Jones's avatar
      of: address: Don't fail a lookup just because a node has no reg property · 84774e61
      Lee Jones authored 
      Sometimes it doesn't make any sense for a node to have an address.
In this case device lookup will always be unsuccessful because we
currently assume every node will have a reg property. This patch
changes the semantics so that the resource address and the lookup
address will only be compared if one exists.

Things like AUXDATA() rely on of_dev_lookup to return the lookup
entry of a particular device in order to do things like apply
platform_data to a device. However, this is currently broken for
nodes which do not have a reg property, meaning that platform_data
can not be passed in those cases.
Acked-by: default avatarRob Herring <rob.herring@calxeda.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
      84774e61
    • Tony Lindgren's avatar
      Merge branch 'for_3.5/fixes/pm-3' of... · 5f376097
      Tony Lindgren authored 
      Merge branch 'for_3.5/fixes/pm-3' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into fixes
      5f376097
    • Paul Walmsley's avatar
      ARM: OMAP2+: hwmod code/clockdomain data: fix 32K sync timer · 006c7f18
      Paul Walmsley authored 
      Kevin discovered that commit c8d82ff6
("ARM: OMAP2/3: hwmod data: Add 32k-sync timer data to hwmod
database") broke CORE idle on OMAP3.  This prevents device low power
states.

The root cause is that the 32K sync timer IP block does not support
smart-idle mode[1], and so the hwmod code keeps the IP block in
no-idle mode while it is active.  This in turn prevents the WKUP
clockdomain from transitioning to idle.  There is a hardcoded sleep
dependency that prevents the CORE_L3 and CORE_CM clockdomains from
transitioning to idle when the WKUP clockdomain is active[2], so the
chip cannot enter any device low power states.

It turns out that there is no need to take the 32k sync timer out of
idle.  The IP block itself probably does not have any native idle
handling at all, due to its simplicity.  Furthermore, the PRCM will
never request target idle for this IP block while the kernel is
running, due to the sleep dependency that prevents the WKUP
clockdomain from idling while the CORE_L3 clockdomain is active.  So
we can safely leave the 32k sync timer in target-force-idle mode, even
while we continue to access it.

This workaround is implemented by defining a new clockdomain flag,
CLKDM_ACTIVE_WITH_MPU, that indicates that the clockdomain is
guaranteed to be active whenever the MPU is inactive.  If an IP
block's main functional clock exists inside this clockdomain, and the
IP block does not support smart-idle modes, then the hwmod code will
place the IP block into target force-idle mode even when enabled.  The
WKUP clockdomains on OMAP3/4 are marked with this flag.  (On OMAP2xxx,
no OCP header existed on the 32k sync timer.)   Other clockdomains also
should be marked with this flag, but those changes are deferred until
a later merge window, to create a minimal fix.

Another theoretically clean fix for this problem would be to implement
PM runtime-based control for 32k sync timer accesses.  These PM
runtime calls would need to located in a custom clocksource, since the
32k sync timer is currently used as an MMIO clocksource.  But in
practice, there would be little benefit to doing so; and there would
be some cost, due to the addition of unnecessary lines of code and the
additional CPU overhead of the PM runtime and hwmod code - unnecessary
in this case.

Another possible fix would have been to modify the pm34xx.c code to
force the IP block idle before entering WFI.  But this would not have
been an acceptable approach: we are trying to remove this type of
centralized IP block idle control from the PM code.

This patch is a collaboration between Kevin Hilman <khilman@ti.com>
and Paul Walmsley <paul@pwsan.com>.

Thanks to Vaibhav Hiremath <hvaibhav@ti.com> for providing comments on
an earlier version of this patch.  Thanks to Tero Kristo
<t-kristo@ti.com> for identifying a bug in an earlier version of this
patch.  Thanks to Benoît Cousson <b-cousson@ti.com> for identifying
some bugs in several versions of this patch and for implementation
comments.

References:

1. Table 16-96 "REG_32KSYNCNT_SYSCONFIG" of the OMAP34xx TRM Rev. ZU
   (SWPU223U), available from:
   http://www.ti.com/pdfs/wtbu/OMAP34x_ES3.1.x_PUBLIC_TRM_vzU.zip

2. Table 4-72 "Sleep Dependencies" of the OMAP34xx TRM Rev. ZU
   (SWPU223U)

3. ibid.

Cc: Tony Lindgren <tony@atomide.com>
Cc: Vaibhav Hiremath <hvaibhav@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: default avatarKevin Hilman <khilman@ti.com>
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarKevin Hilman <khilman@ti.com>
      006c7f18
  7. 05 Jul, 2012 4 commits
  9. 04 Jul, 2012 7 commits
  11. 02 Jul, 2012 4 commits
  13. 01 Jul, 2012 1 commit
    • Paul Parsons's avatar
      ARM: pxa: hx4700: Fix basic suspend/resume · 6416c040
      Paul Parsons authored 
      Basic suspend/resume is fixed by ensuring that the PGSR registers are
set correctly before sleep mode is entered. In particular four of the
active low resets need to be driven high while in sleep mode, otherwise
the unit resets itself instead of suspending. Another problem was that
the PCFR_GPROD bit is set by the HTC bootloader; this caused GPIO reset
(i.e. the reset button) to fail immediately after returning from sleep
mode.
Signed-off-by: default avatarPaul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: default avatarHaojian Zhuang <haojian.zhuang@gmail.com>
      6416c040
  15. 30 Jun, 2012 13 commits
  17. 29 Jun, 2012 2 commits
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