- 04 Jun, 2013 40 commits
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Laurent Pinchart authored
Replace the GPIO-based SMSC911x pinmux configuration by a pinctrl mapping. Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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Laurent Pinchart authored
Replace the GPIO-based SDHI0 IRQ pinmux configuration by a pinctrl mapping. Signed-off-by:
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Laurent Pinchart authored
Replace the GPIO-based SCIF pinmux configuration by a pinctrl mapping. Signed-off-by:
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Laurent Pinchart authored
Replace the GPIO-based LCD pinmux configuration by a pinctrl mapping. Signed-off-by:
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Laurent Pinchart authored
Replace the GPIO-based HDMI pinmux configuration by a pinctrl mapping. Signed-off-by:
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Laurent Pinchart authored
Replace the GPIO-based FSI pinmux configuration by a pinctrl mapping. Signed-off-by:
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Laurent Pinchart authored
Replace the GPIO-based FLCTL pinmux configuration by a pinctrl mapping. Signed-off-by:
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Laurent Pinchart authored
Replace the GPIO-based CEU pinmux configuration by a pinctrl mapping. Signed-off-by:
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Laurent Pinchart authored
Replace the GPIO-based ADXL34X pinmux configuration by a pinctrl mapping. Signed-off-by:
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Laurent Pinchart authored
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Laurent Pinchart authored
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Laurent Pinchart authored
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Laurent Pinchart authored
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Laurent Pinchart authored
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Laurent Pinchart authored
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Laurent Pinchart authored
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Laurent Pinchart authored
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Laurent Pinchart authored
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Laurent Pinchart authored
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Kuninori Morimoto authored
Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by:
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Kuninori Morimoto authored
pfc-r8a7778 will have many devices pfc support in the future, and current pfc-r8a7778 is using pin/mux definition macro for SCIF. The device definition style using macro is readable code IMO, but creating new macro for each devices is not good sense. This patch adds common SH_PFC_xx() macro for each new feature devices Signed-off-by:
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Vladimir Barinov authored
Add VIN DATA[0:7]/CLK/HSYNC/VSYNC pin groups to R8A7779 PFC driver. Signed-off-by:
Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org> [horms+renesas@verge.net.au: trivial rebase on top of "sh-pfc: r8a7779: Don't group USB OVC and PENC pins"] Signed-off-by:
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Kuninori Morimoto authored
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Laurent Pinchart authored
Use the RCAR_GP_PIN macro to convert from the documentation pin number space to the linear pinctrl space. Signed-off-by:
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Bastian Hecht authored
Add SCIFA1 as preparation to switch to pinctrl in board files. Signed-off-by:
Bastian Hecht <hechtb+renesas@gmail.com> Acked-by:
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Kuninori Morimoto authored
Signed-off-by:
Simon Horman <horms@verge.net.au>
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Laurent Pinchart authored
Refactor the GPIO macro magic to use GPIO numbers directly instead of the GPIO_GP_x_y enum entries. This will allow removing the GPIO enum entries from the mach/r8a7790.h header. Signed-off-by:
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Laurent Pinchart authored
No r8a7770 platform use the function GPIOs API. Remove it. Signed-off-by:
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Laurent Pinchart authored
GPIOs are now handled by a separate driver, remove GPIO data from the SoC information structure. Signed-off-by:
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Laurent Pinchart authored
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Laurent Pinchart authored
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Laurent Pinchart authored
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Laurent Pinchart authored
Make GPIO support optional for platforms that don't support GPIOLIB. Signed-off-by:
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Bastian Hecht authored
We add all necessary entries to support the external IRQs from the INTC. Signed-off-by:
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Koji Matsuoka authored
Add initial PFC support for the r8a7790 SoC. At this point only GPIO interface is supported, move to newer interfaces planned as incremental changes. Original authors is Koji Matsuoka-san, thanks for him and his team for the heavy lifting. Adjusted by Magnus to work together with updated code in drivers/pinctrl. Signed-off-by:
Koji Matsuoka <koji.matsuoka.xm@rms.renesas.com> Signed-off-by:
Magnus Damm <damm@opensource.se> Acked-by:
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Kuninori Morimoto authored
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Kuninori Morimoto authored
R-Car series gpio_rcar driver can control GPIO IRQ today. It needs base IRQ number for gpio_rcar_config :: .irq_base This patch adds macro for GPIO IRQ. This patch was tested on Bock-W board Signed-off-by:
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Laurent Pinchart authored
Pins are numbered in the R-Car family documentation using a bank number and a pin number in the bank. As the Linux pin number space is linear, we need to flatten this by multiplying the bank number by 32 and adding the pin number. The resulting number bear no directly visible relationship to the documentation, making it error-prone. Add a RCAR_GP_PIN macro to convert from the documentation pin number space to the linear Linux space. Signed-off-by:
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Simon Horman authored
As hardware support for this feature is not universal for all SoCs a flag, has_both_edge_trigger, has been added to the platform data of the driver to allow this feature to be enabled. The motivation for this is to allow use of the gpio-keys driver on the lager board which is based on the r8a7790 SoC. The V2 of this patch has been fully exercised using that driver on that board. Signed-off-by:
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Laurent Pinchart authored
The gpio_base field is used to specify the desired GPIO base for the GPIO controller. The GPIO core can automatically allocate a GPIO number range when the base is set to -1. To make this possible, make the field signed. Signed-off-by:
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