- 31 Mar, 2015 13 commits
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Masanari Iida authored
This patch fixes a spelling typo in MODULE_DESCRIPTION in ts5500_flash.c. Signed-off-by: Masanari Iida <standby24x7@gmail.com> [ Brian: fixed grammar in a spelling patch :) ] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Graham Moore authored
The Denali Controller IP does not support sub-page writes. Signed-off-by: Graham Moore <grmoore@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Nicholas Mc Guire authored
return type of wait_for_completion_timeout is unsigned long not int, this patch uses the return value of wait_for_completion_timeout in the condition directly rather than assigning it to an incorrect type variable. The variable used for handling the return of wait_for_cmpletion_timeout was int but should be unsigned long, where it was not in use for anything else and the return value in case of completion (>0) is not used it was removed and wait_for_completion_timeout() used directly in the if condition. To make the timeout values a bit simpler to read and also handle all of the corner cases correctly the declarations are moved to msecs_to_jiffies(). The timeout declaration cleanup is just for readability Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Fabio Estevam authored
In case of scan_bbt() failure, we should better propagate it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Huang Shijie <shijie.huang@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Nicholas Mc Guire authored
return type of wait_for_completion_timeout is unsigned long not int. The return variable is renamed to reflect its use and the type adjusted to unsigned long. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Huang Shijie <shijie.huang@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Nicholas Mc Guire authored
return type of wait_for_completion_timeout is unsigned long not int, this patch uses the return value of wait_for_completion_timeout in the condition directly rather than adding a additional appropriately typed variable. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Acked-by: Han Xu <han.xu@freescale.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Fabio Estevam authored
When displaying dev_err() messages it is useful to print the error value. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Han Xu <han.xu@freescale.com> [Brian: fix up "can not" at the same time] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Dan Carpenter authored
These lines were all indented one tab more than they should be. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Dmitry Torokhov authored
Even if bus is not hot-pluggable, the devices can be unbound from the driver via sysfs, so we should not be using __exit annotations on remove() methods. The only exception is drivers registered with platform_driver_probe() which specifically disables sysfs bind/unbind attributes. Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Christophe Leroy authored
Two config options exist to define powerpc MPC8xx: * CONFIG_PPC_8xx * CONFIG_8xx In addition, CONFIG_PPC_8xx also defines CONFIG_CPM1 as communication co-processor arch/powerpc/platforms/Kconfig.cputype has contained the following comment about CONFIG_8xx item for some years: "# this is temp to handle compat with arch=ppc" It looks like not many places still have that old CONFIG_8xx used, so it is likely to be a good time to get rid of it completely ? Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Stefan Roese authored
Without this patch the timings are all set to 0 if not specified in the dts. With this patch the driver falls back to use the defaults that are already present in the driver and are known to work okay for some (older) boards. Tested on a custom SPEAr600 based board. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Viresh Kumar <viresh.linux@gmail.com> Cc: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Dan Carpenter authored
We know "rc" is set so there is no need to check again. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Roger Quadros authored
If a NAND device is not really present or pin muxes are not correctly configured we can lock up the kernel waiting infinitely for NAND_STATUS to be ready. This can be easily reproduced on TI's DRA7-evm board by booting it without NAND support in u-boot and disabling NAND pin muxes in the kernel. Add timeout when waiting for NAND_CMD_RESET completion. As per ONFi v4.0 tRST can be upto 250ms for EZ-NAND and 5ms for raw NAND. Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Nishanth Menon <nm@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 27 Mar, 2015 1 commit
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Brian Norris authored
Flash lock/unlock is a flash-specific operations. Factor out a callback for it to more readily support other vendors. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: VIET NGA DAO <vndao@altera.com>
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- 24 Mar, 2015 2 commits
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Brian Norris authored
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Brian Norris authored
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 11 Mar, 2015 16 commits
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Arnd Bergmann authored
As the only comments I got for the "mtd: cfi: reduce stack size" patch were about whitespace changes, it appears necessary to fix up the rest of the file as well, which contains the exact same mistakes. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Arnd Bergmann authored
The cfi_staa_write_buffers function uses a large amount of kernel stack whenever CONFIG_MTD_MAP_BANK_WIDTH_32 is set, and that results in a warning on ARM allmodconfig builds: drivers/mtd/chips/cfi_cmdset_0020.c: In function 'cfi_staa_write_buffers': drivers/mtd/chips/cfi_cmdset_0020.c:651:1: warning: the frame size of 1208 bytes is larger than 1024 bytes [-Wframe-larger-than=] It turns out that this is largely a result of a suboptimal implementation of map_word_andequal(). Replacing this function with a straightforward one reduces the stack size in this function by exactly 200 bytes, shrinks the .text segment for this file from 27648 bytes to 26608 bytes, and makes the warning go away. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Brian Norris authored
We're not initializing the ooblen field. Our users don't care, since they check that oobbuf == NULL first, but it's good practice to zero unused fields out. We can drop the NULL initializations since we're memset()ing the whole thing. Noticed by Coverity, CID #200821, #200822 Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Brian Norris authored
The only exit (break) from the preceding loop is nested within a condition which yields req == NULL. This code is dead. Coverity CID #752669 Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Brian Norris authored
TclsRising is always 1. Caught by Coverity. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
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Brian Norris authored
Coverity noticed that these 'ret' assignments weren't being used. Let's use them. Note that nand_lock() and nand_unlock() are still not officially used by any drivers. Coverity CIDs #1227054 and #1227037 Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Brian Norris authored
Caught by Coverity (CID #200625 and others) Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Akinobu Mita <akinobu.mita@gmail.com>
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Brian Norris authored
'ret' is always zero, so this is all dead code. This should quiet Coverity CID #1226739. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Kyungmin Park <kyungmin.park@samsung.com>
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Brian Norris authored
If no devices were found, we would already have skipped over this code. Detected by Coverity, CID #744270 Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
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Uwe Kleine-König authored
The PARAM command was long unimplemented and it probably wasn't noticed because chip probing using only the few bytes returned by the READID command are good enough in most cases to determine the chip in use. Still to notice such a shortcoming earlier in the future would be nice in case it's something more vital. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Uwe Kleine-König authored
The mxc-nand driver never supported the PARAM command to read out the ONFI parameter page and so always relied on probing my manufacturer and device id (as provided by the READID command). This patch implements reading out the first parameter page copy at least which should be good enough in practise. This makes the boot log change from nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xb1 nand: Micron NAND 128MiB 1,8V 16-bit to nand: device found, Manufacturer ID: 0x2c, Chip ID: 0xb1 nand: Micron MT29F1G16ABBDAH4 on my machine. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Uwe Kleine-König authored
The mxc-nand controller works pagewise and so usually only sends commands to the flash chip with column == 0. A request with column != 0 from the upper layer is then fulfilled by indexing appropriately into the device's RAM buffer. To be able to access the ONFI marker at offset 0x20 in reply to the READID command however it's invalid to read 32 bytes starting from column 0. So let the function used to send the address cycles send the column address actually passed instead of 0 and fix all callers to pass 0 instead appropriately. Also add some warnings in case this patch changes the drivers semantics. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Uwe Kleine-König authored
When the hardware operates in 16 bit mode it always reads 16 bits even for operations that only have the lower 8 bits defined. So the upper bits must be discarded. Do this in the read_byte callback instead of when reading the NAND id to support reading byte wise more than 5 bytes and at other occations (like reading the ONFI parameter page). Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Uwe Kleine-König authored
At least on i.MX25 (i.e. NFCv2) preset_v2 is called with mtd->writesize == 0 that is before the connect flash chip is detected. It then configures for 8 bit ECC mode which needs 26 bytes of OOB per 512 bytes main section. For flashes with a smaller OOB area issuing a read page command makes the controller stuck with this config. Note that this currently doesn't hurt because the first read page command is issued only after detection is complete and preset is called once more. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Uwe Kleine-König authored
While extending the mxc-nand driver it happend to me a few times that the device was stuck and this made the machine hang during boot. So implement a timeout and print a stack trace the first time this happens to make it debuggable. The return type of the waiting function is also changed to int to be able to handle the timeout in the caller. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Boris Brezillon authored
Currently the driver read NFC command registers to get NFC busy flag. Actually this flag also can be get by reading HSMC_SR register. Use the read NFC command registers need mapping a huge memory region. To save the mapped memory region, we change to check NFC busy flag by reading HSMC_SR register. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 03 Mar, 2015 1 commit
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Colin Ian King authored
Fix typo, "Unkown" -> "Unknown" Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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- 28 Feb, 2015 7 commits
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Brian Norris authored
s3c2410_nand_probe is not the name of the function. These prints have little utility, so let's just kill them. Reported-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Antoine Ténart authored
pxa3xx_flash_ids wasn't initialized to 0, which in certain cases could end up containing corrupted values in its members. Fix this to avoid possible issues. Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Brian Norris authored
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Robert Jarzmik authored
As the devicetree binding doesn't require num_cs to exist or be strictly positive, and neither does the platform data case, a bug appear when num_cs is set to 0 and panics the kernel. The issue is that in alloc_nand_resource(), chip is dereferenced without having a value assigned when num_cs == 0. Fix this by returning ENODEV is num_cs == 0. The panic seen is : Unable to handle kernel NULL pointer dereference at virtual address 000002b8 pgd = c0004000 [000002b8] *pgd=00000000 Internal error: Oops: 5 [#1] PREEMPT ARM Modules linked in: Hardware name: Marvell PXA3xx (Device Tree Support) task: c3822aa0 ti: c3826000 task.ti: c3826000 PC is at alloc_nand_resource+0x180/0x4a8 LR is at alloc_nand_resource+0xa0/0x4a8 pc : [<c0275b90>] lr : [<c0275ab0>] psr: 68000013 sp : c3827d90 ip : 00000000 fp : 00000000 r10: c3862200 r9 : 0000005e r8 : 00000000 r7 : c3865610 r6 : c3862210 r5 : c3924210 r4 : c3862200 r3 : 00000000 r2 : 00000000 r1 : 00000000 r0 : 00000000 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 0000397f Table: 80004018 DAC: 00000035 Process swapper (pid: 1, stack limit = 0xc3826198) Stack: (0xc3827d90 to 0xc3828000) ...zip... [<c0275b90>] (alloc_nand_resource) from [<c0275ff8>] (pxa3xx_nand_probe+0x140/0x978) [<c0275ff8>] (pxa3xx_nand_probe) from [<c0258c40>] (platform_drv_probe+0x48/0xa4) [<c0258c40>] (platform_drv_probe) from [<c0257650>] (driver_probe_device+0x80/0x21c) [<c0257650>] (driver_probe_device) from [<c0257878>] (__driver_attach+0x8c/0x90) [<c0257878>] (__driver_attach) from [<c0255ec4>] (bus_for_each_dev+0x58/0x88) [<c0255ec4>] (bus_for_each_dev) from [<c0256ec8>] (bus_add_driver+0xd8/0x1d4) [<c0256ec8>] (bus_add_driver) from [<c0257f14>] (driver_register+0x78/0xf4) [<c0257f14>] (driver_register) from [<c00088a8>] (do_one_initcall+0x80/0x1e4) [<c00088a8>] (do_one_initcall) from [<c048ed08>] (kernel_init_freeable+0xec/0x1b4) [<c048ed08>] (kernel_init_freeable) from [<c0377d8c>] (kernel_init+0x8/0xe4) [<c0377d8c>] (kernel_init) from [<c00095f8>] (ret_from_fork+0x14/0x3c) Code: e503b234 e5953008 e1530001 caffffd1 (e59002b8) ---[ end trace a5770060c8441895 ]--- Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Robert Jarzmik authored
Change the handling of the data stage in the driver : don't pump data in the top-half interrupt, but rather schedule a thread for non dma cases. This will enable latencies in the data pumping, especially if delays are required. Moreover platform shall be more reactive as other interrupts can be served while pumping data. No throughput degradation was observed, at least on the zylonite platform, while a slight degradation was being expected. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Brian Norris authored
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Maxime Ripard authored
The NDDB register holds the data that are needed by the read and write commands. However, during a read PIO access, the datasheet specifies that after each 32 bytes read in that register, when BCH is enabled, we have to make sure that the RDDREQ bit is set in the NDSR register. This fixes an issue that was seen on the Armada 385, and presumably other mvebu SoCs, when a read on a newly erased page would end up in the driver reporting a timeout from the NAND. Cc: <stable@vger.kernel.org> # v3.14 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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