- 21 Jan, 2015 40 commits
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Hans de Goede authored
The mk802_a10s re-uses is the "classic" mk802 case and functionality, but has an A10s SoC inside rather then the A10, it features 512M or 1G RAM, 4G nand, a mini-hdmi female connector, USB-A receptacle, mini-usb receptacle (OTG) and a sdio realtek wifi chip. Unlike the original mk802 it does have a pmic, the axp152. For more details see: http://linux-sunxi.org/Semitime_g2Signed-off-by: Hans de Goede <hdegoede@redhat.com> [Maxime: Changed the compatible and node names labels] Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
The mk802ii is a revised version of the mk802 A10 based hdmi tv-stick, it features 1G RAM, 4G nand, a hdmi male connector, USB-A receptacle, 2 micro usb receptacles (OTG & power) and USB-wifi, and does come with an axp209 pmic. For more details see: http://linux-sunxi.org/Rikomagic_mk802iiSigned-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
The mk802 is the "classic" Allwinner A10 based hdmi tv-stick, it features 512M or 1G RAM, 4G nand, a mini-hdmi female connector, USB-A receptacle, mini-usb receptacle (OTG) and USB-wifi. Somewhat unique the mk802 does not use the AXP209 pmic, it does not have a pmic at all. For more details see: http://linux-sunxi.org/Rikomagic_mk802Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
The Chuwi V7 is an A10 (sun4i) based tablet with 1G of RAM, 16G of nand flash, microsd slot, 7" 1024x768 lvds ips panel, mini hdmi out, headphones out, stereo speakers, front & back camera and usb wifi. It is clearly marked "CHUWI", "V7" and "Model: CW0825" on the back of the tablet. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
Add support for the new Bananapro A20 development board from lemaker.org. This board features 1G RAM, 2 USB A receptacles, 1 micro USB receptacle for OTG, 1 micro USB receptacle for power, HDMI, sata, Gbit ethernet, ir receiver, 3.5 mm jack for a/v out, on board microphone, 40 gpio pins and sdio wifi. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
The A31 has non-initialized architected timers, without CNTFRQ or CNTVOFF set by the Allwinner's bootloader. Use the new DT property for such case, and enable the arch timers. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
Using label references is preferred when override settings from the included dtsi. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
mmc0 is only available on port F, and is always used with a 4 bit wide bus for the onboard micro-sd slot. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
Use the label to reference the pin controller node, so that we can use sunxi-common-regulators with sunxi families that don't share the same address space mappings, such as sun9i. This patch is mostly space changes due to the reduction of node parents. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
of_clk_get_parent_name() uses the clock-indices property to resolve clock phandle arguments in case that the argument index does not match the clock-output-names sequence. This is the case on sunxi, where we use the actual bit index as the argument to the phandle. Add the clock-indices property so that of_clk_get_parent_name() resolves the names correctly. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The mmc module clocks are A80 specific module 0 (storage) type clocks. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
The current GPL only licensing on the DTSI makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Alexander Bersenev <bay@hackerdom.ru> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Carlo Caione <carlo@caione.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Olliver Schinagl <oliver@schinagl.nl>
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Maxime Ripard authored
The current GPL only licensing on the DTSI makes it very impractical for other software components licensed under another license. In order to make it easier for them to reuse our device trees, relicense our device trees under a GPL/X11 dual-license. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Alexander Bersenev <bay@hackerdom.ru> Acked-by: Carlo Caione <carlo@caione.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Roman Byshko <rbyshko@gmail.com>
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Hans de Goede authored
The Ippo Q8H v1.2 is almost identical to the v5, still it needs a separate dtb file since some gpio-s surrounding the wlan/bluetooth are different, it uses different camera sensors, and different DRAM timings. Note that atm neither the wlan/bluetooth nor the camera are supported, so atm their is no difference between the dts files, but because of the different DRAM timings there are already separate u-boot configs for the 2 different versions, and the 1.2 config refers to sun8i-a23-ippo-q8h-v1.2.dtb to be future proof, so we need to provide a sun8i-a23-ippo-q8h-v1.2.dtb file. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
The a23-ippo-q8h tablets have volume up/down buttons using the lradc. This has been tested on both a v5 and a v1.2 tablet. Tested-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
The A23 has the same lradc controller as previous Allwinner SoCs. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
This patch adds the regulator nodes for the axp209 by including the axp209 dtsi. As the inputs of these regulators are from the axp209's PS output, which is basically just a mux over the 2 inputs, it is considered to be unregulated. Thus we do not provide input supply properties for them. The regulator names and constraints are based on the board schematics and the SoC datasheet. DCDC2 is used as the cpu power supply. This patch also references it from the cpu node. Also get rid of axp209 properties already set in axp209.dtsi. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
This patch adds the regulator nodes for the axp209 by including the axp209 dtsi. As the inputs of these regulators are from the axp209's PS output, which is basically just a mux over the 2 inputs, it is considered to be unregulated. Thus we do not provide input supply properties for them. The regulator names and constraints are based on the board schematics and the SoC datasheet. DCDC2 is used as the cpu power supply. This patch also references it from the cpu node. LDO3 powers the USB WiFi module. This patch also references it from the usb-phy node. Also get rid of axp209 properties already set in axp209.dtsi. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
This patch adds the regulator nodes for the axp209 by including the axp209 dtsi. As the inputs of these regulators are from the axp209's PS output, which is basically just a mux over the 2 inputs, it is considered to be unregulated. Thus we do not provide input supply properties for them. The regulator names and constraints are based on the board schematics and the SoC datasheet. DCDC2 is used as the cpu power supply. This patch also references it from the cpu node. Also get rid of axp209 properties already set in axp209.dtsi. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
This patch adds the regulator nodes for the axp209 by including the axp209 dtsi. As the inputs of these regulators are from the axp209's PS output, which is basically just a mux over the 2 inputs, it is considered to be unregulated. Thus we do not provide input supply properties for them. The regulator names and constraints are based on the board schematics and the SoC datasheet. DCDC2 is used as the cpu power supply. This patch also references it from the cpu node. Also get rid of axp209 properties already set in axp209.dtsi. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The core temperature sensor now supports thermal zones. Add a thermal zone mapping for the cpus with passive cooling (cpufreq throttling). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The core temperature sensor now supports thermal zones. Add a thermal zone mapping for the cpus with passive cooling (cpufreq throttling). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The core temperature sensor now supports thermal zones. Add a thermal zone mapping for the cpus with passive cooling (cpufreq throttling). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The AXP209 PMIC is used with some Allwinner SoCs. This patch adds a dtsi file listing all the regulator nodes. The regulators are initialized based on their device node names. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Zoltan HERPAI authored
The pcDuino board has LEDs connected to PH15/PH16, and back/home/menu buttons to PH17/18/19 respectively. Enable these via gpio-leds and gpio-keys. This is shared across the v1 and v2 versions of the board. Tested on a v2 and verified against the schematics of a v1. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> Acked-by: Hans de Goede <hdegoede@redhat.com> [Maxime: Added some newlines between the button nodes] Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
Add simplefb nodes for "[de_fe0-]de_be0-lcd0" and "[de_fe0-]de_be0-lcd0-tve0" display pipelines for when u-boot has set up a pipeline to drive a LCD panel / VGA output rather then the HDMI output. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The cpu core is clocked from the "cpu" clock. Add a reference to it in the first cpu node. Also add "cpu0" label to the node. The operating points were taken from the A10 FEX files in the sunxi-boards repository. All FEX files have the same settings. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The cpu core is clocked from the "cpu" clock. Add a reference to it in the first cpu node. Also add "cpu0" label to the node. The operating points were taken from the A13 FEX files in the sunxi-boards repository. All FEX files have the same settings. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The cpu core is clocked from the "cpu" clock. Add a reference to it in the first cpu node. Also add "cpu0" label to the node. The operating points were taken from the A20 FEX files in the sunxi-boards repository. Not all boards have the same settings. The settings in this patch are the most generic ones. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
Now that the resistive touchpanel driver supports thermal sensors, add the "#thermal-sensor-cells" property as required by the thermal framework. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
The NMI IRQ controller uses the standard flags definition for the IRQ level and edges. Use the common header to use defines instead of opaque numbers. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
The GIC requires some extra opaque arguments to set the IRQ type and flags. Convert the DTs to using the common defines. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
The pinctrl nodes require some extra opaque arguments for the pull up and drive strength values. Introduce a new header file and convert the device trees to replace these opaque numbers by defines. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
The DMA engine for the A10/A20 and derivatives require an opaque extra argument. Add a dt-bindings header, and convert the device trees to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
Replace the various raw GPIO flags by their definition in the common dt-bindings header. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
Prepare the device trees to use the C preprocessor. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
The CSQ CS908 is an A31s based top-set box, with 1G RAM, 8G NAND, rtl8188etv usb wifi, 2 USB A receptacles (1 connected through the OTG controller), ethernet, 3.5 mm jack with a/v out and hdmi out. Note it has no sdcard slot and therefore can only be fel booted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
Add a dtsi file for A31s based boards. Since the A31s is the same die as the A31 in a different package, this dtsi simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to reflect the different package, everything else is identical. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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